mirrors/Bochs
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Improve debug messages and optimize

Browse Source
This commit is contained in:
Stanislav Shwartsman 2006-02-22 20:58:16 +00:00
parent 8ba6c1178a
commit 0150904e9d
4 changed files with 24 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
bochs/cpu/access.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: access.cc,v 1.62 2005-11-19 19:38:45 sshwarts Exp $
// $Id: access.cc,v 1.63 2006-02-22 20:58:16 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -245,8 +245,8 @@ BX_CPU_C::read_virtual_checks(bx_segment_reg_t *seg, bx_address offset,
BX_CPU_C::strseg(bx_segment_reg_t *seg)
{
if (seg == &BX_CPU_THIS_PTR sregs[0]) return("ES");
else if (seg == & BX_CPU_THIS_PTR sregs[1]) return("CS");
else if (seg == & BX_CPU_THIS_PTR sregs[2]) return("SS");
else if (seg == &BX_CPU_THIS_PTR sregs[1]) return("CS");
else if (seg == &BX_CPU_THIS_PTR sregs[2]) return("SS");
else if (seg == &BX_CPU_THIS_PTR sregs[3]) return("DS");
else if (seg == &BX_CPU_THIS_PTR sregs[4]) return("FS");
else if (seg == &BX_CPU_THIS_PTR sregs[5]) return("GS");

20
bochs/cpu/mmx.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: mmx.cc,v 1.50 2006-02-17 13:34:31 sshwarts Exp $
// $Id: mmx.cc,v 1.51 2006-02-22 20:58:16 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2002 Stanislav Shwartsman
@ -1288,12 +1288,7 @@ void BX_CPU_C::PSRAW_PqQq(bxInstruction_c *i)
read_virtual_qword(i->seg(), RMAddr(i), (Bit64u *) &op2);
}
if(!MMXUQ(op2)) {
BX_WRITE_MMX_REG(i->nnn(), op1);
return;
}
Bit8u shift = MMXUB0(op2);
if(!MMXUQ(op2)) return;
if(MMXUQ(op2) > 15) {
MMXUW0(result) = (MMXUW0(op1) & 0x8000) ? 0xffff : 0;
@ -1302,6 +1297,8 @@ void BX_CPU_C::PSRAW_PqQq(bxInstruction_c *i)
MMXUW3(result) = (MMXUW3(op1) & 0x8000) ? 0xffff : 0;
}
else {
Bit8u shift = MMXUB0(op2);
MMXUW0(result) = MMXUW0(op1) >> shift;
MMXUW1(result) = MMXUW1(op1) >> shift;
MMXUW2(result) = MMXUW2(op1) >> shift;
@ -1338,18 +1335,15 @@ void BX_CPU_C::PSRAD_PqQq(bxInstruction_c *i)
read_virtual_qword(i->seg(), RMAddr(i), (Bit64u *) &op2);
}
if(!MMXUQ(op2)) {
BX_WRITE_MMX_REG(i->nnn(), op1);
return;
}
Bit8u shift = MMXUB0(op2);
if(!MMXUQ(op2)) return;
if(MMXUQ(op2) > 31) {
MMXUD0(result) = (MMXUD0(op1) & 0x80000000) ? 0xffffffff : 0;
MMXUD1(result) = (MMXUD1(op1) & 0x80000000) ? 0xffffffff : 0;
}
else {
Bit8u shift = MMXUB0(op2);
MMXUD0(result) = MMXUD0(op1) >> shift;
MMXUD1(result) = MMXUD1(op1) >> shift;

22
bochs/cpu/segment_ctrl_pro.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: segment_ctrl_pro.cc,v 1.51 2006-01-09 19:34:52 sshwarts Exp $
// $Id: segment_ctrl_pro.cc,v 1.52 2006-02-22 20:58:16 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -49,7 +49,7 @@ BX_CPU_C::load_seg_reg(bx_segment_reg_t *seg, Bit16u new_value)
return;
}
#endif
BX_ERROR(("load_seg_reg: SS: new_value == 0"));
BX_ERROR(("load_seg_reg(SS): new_value == 0"));
exception(BX_GP_EXCEPTION, 0, 0);
}
@ -62,14 +62,14 @@ BX_CPU_C::load_seg_reg(bx_segment_reg_t *seg, Bit16u new_value)
/* selector's RPL must = CPL, else #GP(selector) */
if (ss_selector.rpl != CPL) {
BX_ERROR(("load_seg_reg(): rpl != CPL"));
BX_ERROR(("load_seg_reg(SS): rpl != CPL"));
exception(BX_GP_EXCEPTION, new_value & 0xfffc, 0);
}
parse_descriptor(dword1, dword2, &descriptor);
if (descriptor.valid==0) {
BX_ERROR(("load_seg_reg(): valid bit cleared"));
BX_ERROR(("load_seg_reg(SS): valid bit cleared"));
exception(BX_GP_EXCEPTION, new_value & 0xfffc, 0);
}
@ -78,19 +78,19 @@ BX_CPU_C::load_seg_reg(bx_segment_reg_t *seg, Bit16u new_value)
descriptor.u.segment.executable ||
descriptor.u.segment.r_w==0 )
{
BX_ERROR(("load_seg_reg(): not writable data segment"));
BX_ERROR(("load_seg_reg(SS): not writable data segment"));
exception(BX_GP_EXCEPTION, new_value & 0xfffc, 0);
}
/* DPL in the AR byte must equal CPL else #GP(selector) */
if (descriptor.dpl != CPL) {
BX_ERROR(("load_seg_reg(): dpl != CPL"));
BX_ERROR(("load_seg_reg(SS): dpl != CPL"));
exception(BX_GP_EXCEPTION, new_value & 0xfffc, 0);
}
/* segment must be marked PRESENT else #SS(selector) */
if (! IS_PRESENT(descriptor)) {
BX_ERROR(("load_seg_reg(): not present"));
BX_ERROR(("load_seg_reg(SS): not present"));
exception(BX_SS_EXCEPTION, new_value & 0xfffc, 0);
}
@ -138,7 +138,7 @@ BX_CPU_C::load_seg_reg(bx_segment_reg_t *seg, Bit16u new_value)
parse_descriptor(dword1, dword2, &descriptor);
if (descriptor.valid==0) {
BX_ERROR(("load_seg_reg(): valid bit cleared"));
BX_ERROR(("load_seg_reg(%s): valid bit cleared", strseg(seg)));
exception(BX_GP_EXCEPTION, new_value & 0xfffc, 0);
}
@ -147,7 +147,7 @@ BX_CPU_C::load_seg_reg(bx_segment_reg_t *seg, Bit16u new_value)
(descriptor.u.segment.executable==1 &&
descriptor.u.segment.r_w==0) )
{
BX_ERROR(("load_seg_reg(): not data or readable code"));
BX_ERROR(("load_seg_reg(%s): not data or readable code", strseg(seg)));
exception(BX_GP_EXCEPTION, new_value & 0xfffc, 0);
}
@ -157,14 +157,14 @@ BX_CPU_C::load_seg_reg(bx_segment_reg_t *seg, Bit16u new_value)
descriptor.u.segment.c_ed==0 )
{
if ((selector.rpl > descriptor.dpl) || (CPL > descriptor.dpl)) {
BX_ERROR(("load_seg_reg: RPL & CPL must be <= DPL"));
BX_ERROR(("load_seg_reg(%s): RPL & CPL must be <= DPL", strseg(seg)));
exception(BX_GP_EXCEPTION, new_value & 0xfffc, 0);
}
}
/* segment must be marked PRESENT else #NP(selector) */
if (! IS_PRESENT(descriptor)) {
BX_ERROR(("load_seg_reg: segment not present"));
BX_ERROR(("load_seg_reg(%s): segment not present", strseg(seg)));
exception(BX_NP_EXCEPTION, new_value & 0xfffc, 0);
}

14
bochs/cpu/sse.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: sse.cc,v 1.36 2006-02-17 13:34:31 sshwarts Exp $
// $Id: sse.cc,v 1.37 2006-02-22 20:58:16 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2003 Stanislav Shwartsman
@ -908,11 +908,7 @@ void BX_CPU_C::PSRAW_VdqWdq(bxInstruction_c *i)
readVirtualDQwordAligned(i->seg(), RMAddr(i), (Bit8u *) &op2);
}
if(op2.xmm64u(0) == 0)
{
BX_WRITE_XMM_REG(i->nnn(), op1);
return;
}
if(op2.xmm64u(0) == 0) return;
if(op2.xmm64u(0) > 15) /* looking only to low 64 bits */
{
@ -973,11 +969,7 @@ void BX_CPU_C::PSRAD_VdqWdq(bxInstruction_c *i)
readVirtualDQwordAligned(i->seg(), RMAddr(i), (Bit8u *) &op2);
}
if(op2.xmm64u(0) == 0)
{
BX_WRITE_XMM_REG(i->nnn(), op1);
return;
}
if(op2.xmm64u(0) == 0) return;
if(op2.xmm64u(0) > 31) /* looking only to low 64 bits */
{