mirrors/Bochs
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Roll back the try to move Local APIC memory access to CPU.

Browse Source 
It was fast and fine but had serious correctness problems with RMW apic access
This commit is contained in:
Stanislav Shwartsman 2006-03-02 23:16:13 +00:00
parent 6d513ed6f2
commit e297df457a
3 changed files with 22 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
bochs/cpu/apic.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: apic.cc,v 1.78 2006-03-02 20:17:54 sshwarts Exp $
// $Id: apic.cc,v 1.79 2006-03-02 23:16:12 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -173,7 +173,7 @@ bx_bool bx_generic_apic_c::is_selected(bx_phy_address addr, unsigned len)
{
if((addr & ~0xfff) == get_base()) {
if(((addr & 0xf) != 0) || (len != 4))
BX_INFO(("warning: misaligned or wrong-size APIC access. len=%d, addr=" FMT_ADDRX "", len, addr));
BX_INFO(("warning: misaligned or wrong-size APIC access. len=%d, addr=%08x", len, addr));
return 1;
}
return 0;
@ -288,7 +288,7 @@ void bx_local_apic_c::set_id(Bit8u newid)
void bx_local_apic_c::write(bx_phy_address addr, Bit32u *data, unsigned len)
{
if(len != 4) {
BX_PANIC(("local apic write with len=%d(should be 4)", len));
BX_PANIC(("local apic write with len=%d (should be 4)", len));
}
BX_DEBUG(("%s: write 0x%08x to APIC address %08x", cpu->name, *data, addr));
addr &= 0xff0;
@ -491,7 +491,7 @@ void bx_local_apic_c::startup_msg(Bit32u vector)
void bx_local_apic_c::read_aligned(bx_phy_address addr, Bit32u *data, unsigned len)
{
if(len != 4) {
BX_PANIC(("local apic read with len=%d(should be 4)", len));
BX_PANIC(("local apic read with len=%d (should be 4)", len));
}
*data = 0; // default value for unimplemented registers
bx_phy_address addr2 = addr & 0xff0;

26
bochs/cpu/paging.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: paging.cc,v 1.65 2006-03-01 22:32:24 sshwarts Exp $
// $Id: paging.cc,v 1.66 2006-03-02 23:16:12 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -1222,23 +1222,11 @@ BX_CPU_C::access_linear(bx_address laddr, unsigned length, unsigned pl,
if (rw == BX_READ) {
BX_INSTR_LIN_READ(BX_CPU_ID, laddr, BX_CPU_THIS_PTR address_xlation.paddress1, length);
#if BX_SUPPORT_APIC
if (BX_CPU_THIS_PTR local_apic.is_selected(BX_CPU_THIS_PTR address_xlation.paddress1, length)) {
BX_CPU_THIS_PTR local_apic.read(BX_CPU_THIS_PTR address_xlation.paddress1, data, length);
return;
}
#endif
BX_CPU_THIS_PTR mem->readPhysicalPage(BX_CPU_THIS,
BX_CPU_THIS_PTR address_xlation.paddress1, length, data);
}
else {
BX_INSTR_LIN_WRITE(BX_CPU_ID, laddr, BX_CPU_THIS_PTR address_xlation.paddress1, length);
#if BX_SUPPORT_APIC
if (BX_CPU_THIS_PTR local_apic.is_selected(BX_CPU_THIS_PTR address_xlation.paddress1, length)) {
BX_CPU_THIS_PTR local_apic.write(BX_CPU_THIS_PTR address_xlation.paddress1, (Bit32u*) data, length);
return;
}
#endif
BX_CPU_THIS_PTR mem->writePhysicalPage(BX_CPU_THIS,
BX_CPU_THIS_PTR address_xlation.paddress1, length, data);
}
@ -1325,12 +1313,6 @@ BX_CPU_C::access_linear(bx_address laddr, unsigned length, unsigned pl,
BX_CPU_THIS_PTR address_xlation.pages = 1;
if (rw == BX_READ) {
BX_INSTR_LIN_READ(BX_CPU_ID, laddr, laddr, length);
#if BX_SUPPORT_APIC
if (BX_CPU_THIS_PTR local_apic.is_selected(laddr, length)) {
BX_CPU_THIS_PTR local_apic.read(laddr, data, length);
return;
}
#endif
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -1372,12 +1354,6 @@ BX_CPU_C::access_linear(bx_address laddr, unsigned length, unsigned pl,
}
else { // Write
BX_INSTR_LIN_WRITE(BX_CPU_ID, laddr, laddr, length);
#if BX_SUPPORT_APIC
if (BX_CPU_THIS_PTR local_apic.is_selected(laddr, length)) {
BX_CPU_THIS_PTR local_apic.write(laddr, (Bit32u*) data, length);
return;
}
#endif
#if BX_SupportGuest2HostTLB
Bit32u tlbIndex = BX_TLB_INDEX_OF(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];

18
bochs/memory/memory.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: memory.cc,v 1.46 2006-03-01 22:32:24 sshwarts Exp $
// $Id: memory.cc,v 1.47 2006-03-02 23:16:13 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -56,6 +56,14 @@ BX_MEM_C::writePhysicalPage(BX_CPU_C *cpu, Bit32u addr, unsigned len, void *data
}
#endif
#if BX_SUPPORT_APIC
bx_generic_apic_c *local_apic = &cpu->local_apic;
if (local_apic->is_selected (a20addr, len)) {
local_apic->write(a20addr, (Bit32u *)data, len);
return;
}
#endif
struct memory_handler_struct *memory_handler = memory_handlers[a20addr >> 20];
while (memory_handler) {
if (memory_handler->begin <= a20addr &&
@ -201,6 +209,14 @@ BX_MEM_C::readPhysicalPage(BX_CPU_C *cpu, Bit32u addr, unsigned len, void *data)
}
#endif
#if BX_SUPPORT_APIC
bx_generic_apic_c *local_apic = &cpu->local_apic;
if (local_apic->is_selected (a20addr, len)) {
local_apic->read(a20addr, data, len);
return;
}
#endif
struct memory_handler_struct *memory_handler = memory_handlers[a20addr >> 20];
while (memory_handler) {
if (memory_handler->begin <= a20addr &&