Fix code duplication in tas
This commit is contained in:
Stanislav Shwartsman
parent
246d89d6a3
commit
086ee4c9aa
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.cc,v 1.110 2005-08-15 15:43:04 akrisak Exp $
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// $Id: cpu.cc,v 1.111 2005-08-28 17:37:36 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -858,8 +858,7 @@ BX_CPU_THIS_PTR eipPageWindowSize = 0; // Fixme
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#if BX_EXTERNAL_DEBUGGER
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void
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BX_CPU_C::ask (int level, const char *prefix, const char *fmt, va_list ap)
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void BX_CPU_C::ask (int level, const char *prefix, const char *fmt, va_list ap)
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{
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char buf1[1024];
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vsprintf (buf1, fmt, ap);
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@ -867,8 +866,7 @@ BX_CPU_C::ask (int level, const char *prefix, const char *fmt, va_list ap)
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trap_debugger(1);
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}
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void
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BX_CPU_C::trap_debugger (bx_bool callnow)
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void BX_CPU_C::trap_debugger (bx_bool callnow)
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{
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regs.debug_state = debug_step;
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if (callnow) {
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@ -882,10 +880,9 @@ BX_CPU_C::trap_debugger (bx_bool callnow)
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#if BX_DEBUGGER
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extern unsigned int dbg_show_mask;
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bx_bool
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BX_CPU_C::dbg_is_begin_instr_bpoint(Bit32u cs, Bit32u eip, Bit32u laddr,
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Bit32u is_32)
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{ Bit64u tt = bx_pc_system.time_ticks();
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bx_bool BX_CPU_C::dbg_is_begin_instr_bpoint(Bit32u cs, Bit32u eip, Bit32u laddr, Bit32u is_32)
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{
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Bit64u tt = bx_pc_system.time_ticks();
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//fprintf (stderr, "begin_instr_bp: checking cs:eip %04x:%08x\n", cs, eip);
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BX_CPU_THIS_PTR guard_found.cs = cs;
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@ -917,7 +914,8 @@ BX_CPU_C::dbg_is_begin_instr_bpoint(Bit32u cs, Bit32u eip, Bit32u laddr,
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#if BX_DBG_SUPPORT_VIR_BPOINT
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if (bx_guard.guard_for & BX_DBG_GUARD_IADDR_VIR) {
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if ((BX_CPU_THIS_PTR guard_found.icount!=0) ||
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(tt != BX_CPU_THIS_PTR guard_found.time_tick)) {
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(tt != BX_CPU_THIS_PTR guard_found.time_tick))
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{
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for (unsigned i=0; i<bx_guard.iaddr.num_virtual; i++) {
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if ( bx_guard.iaddr.vir[i].enabled &&
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(bx_guard.iaddr.vir[i].cs == cs) &&
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@ -934,7 +932,8 @@ BX_CPU_C::dbg_is_begin_instr_bpoint(Bit32u cs, Bit32u eip, Bit32u laddr,
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#if BX_DBG_SUPPORT_LIN_BPOINT
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if (bx_guard.guard_for & BX_DBG_GUARD_IADDR_LIN) {
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if ((BX_CPU_THIS_PTR guard_found.icount!=0) ||
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(tt != BX_CPU_THIS_PTR guard_found.time_tick)) {
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(tt != BX_CPU_THIS_PTR guard_found.time_tick))
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{
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for (unsigned i=0; i<bx_guard.iaddr.num_linear; i++) {
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if (bx_guard.iaddr.lin[i].enabled &&
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(bx_guard.iaddr.lin[i].addr == BX_CPU_THIS_PTR guard_found.laddr) ) {
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@ -958,12 +957,11 @@ BX_CPU_C::dbg_is_begin_instr_bpoint(Bit32u cs, Bit32u eip, Bit32u laddr,
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// and once you get to a breakpoint you are stuck there forever.
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// Not pretty.
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if (valid && ((BX_CPU_THIS_PTR guard_found.icount!=0) ||
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(tt != BX_CPU_THIS_PTR guard_found.time_tick))) {
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(tt != BX_CPU_THIS_PTR guard_found.time_tick)))
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{
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for (unsigned i=0; i<bx_guard.iaddr.num_physical; i++) {
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if ( bx_guard.iaddr.phy[i].enabled &&
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(bx_guard.iaddr.phy[i].addr == phy) ) {
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if (bx_guard.iaddr.phy[i].enabled && (bx_guard.iaddr.phy[i].addr == phy))
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{
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BX_CPU_THIS_PTR guard_found.guard_found = BX_DBG_GUARD_IADDR_PHY;
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BX_CPU_THIS_PTR guard_found.iaddr_index = i;
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BX_CPU_THIS_PTR guard_found.time_tick = tt;
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@ -974,10 +972,10 @@ BX_CPU_C::dbg_is_begin_instr_bpoint(Bit32u cs, Bit32u eip, Bit32u laddr,
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}
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#endif
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}
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return(0); // not on a breakpoint
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}
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bx_bool
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BX_CPU_C::dbg_is_end_instr_bpoint(Bit32u cs, Bit32u eip, Bit32u laddr,
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Bit32u is_32)
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@ -1019,9 +1017,7 @@ BX_CPU_C::dbg_is_end_instr_bpoint(Bit32u cs, Bit32u eip, Bit32u laddr,
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return(0); // no breakpoint
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}
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void
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BX_CPU_C::dbg_take_irq(void)
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void BX_CPU_C::dbg_take_irq(void)
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{
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unsigned vector;
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@ -1039,8 +1035,7 @@ BX_CPU_C::dbg_take_irq(void)
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}
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}
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void
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BX_CPU_C::dbg_force_interrupt(unsigned vector)
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void BX_CPU_C::dbg_force_interrupt(unsigned vector)
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{
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// Used to force slave simulator to take an interrupt, without
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// regard to IF
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@ -1054,8 +1049,7 @@ BX_CPU_C::dbg_force_interrupt(unsigned vector)
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}
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}
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void
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BX_CPU_C::dbg_take_dma(void)
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void BX_CPU_C::dbg_take_dma(void)
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{
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// NOTE: similar code in ::cpu_loop()
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if ( BX_HRQ ) {
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.238 2005-08-23 20:01:54 sshwarts Exp $
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// $Id: cpu.h,v 1.239 2005-08-28 17:37:36 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -2797,10 +2797,9 @@ public: // for now...
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#endif
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BX_SMF void init_v8086_mode(void);
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BX_SMF void v8086_message(void);
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BX_SMF void task_switch(bx_selector_t *selector,
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bx_descriptor_t *descriptor,
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unsigned source,
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Bit32u dword1, Bit32u dword2);
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BX_SMF void task_switch_load_selector(bx_segment_reg_t *seg, Bit16u raw_selector, Bit8u cs_rpl);
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BX_SMF void task_switch(bx_selector_t *selector, bx_descriptor_t *descriptor,
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unsigned source, Bit32u dword1, Bit32u dword2);
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BX_SMF void get_SS_ESP_from_TSS(unsigned pl, Bit16u *ss, Bit32u *esp);
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#if BX_SUPPORT_X86_64
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BX_SMF void get_RSP_from_TSS(unsigned pl, Bit64u *rsp);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: stack_pro.cc,v 1.24 2005-07-31 17:57:27 sshwarts Exp $
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// $Id: stack_pro.cc,v 1.25 2005-08-28 17:37:37 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -44,7 +44,7 @@ BX_CPU_C::push_16(Bit16u value16)
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else
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#endif
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* StackAddrSize = 32 */
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write_virtual_word(BX_SEG_REG_SS, ESP-2, &value16);
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write_virtual_word(BX_SEG_REG_SS, (Bit32u) (ESP-2), &value16);
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ESP -= 2;
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}
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else
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@ -69,7 +69,7 @@ void BX_CPU_C::push_32(Bit32u value32)
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else
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#endif
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* StackAddrSize = 32 */
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write_virtual_dword(BX_SEG_REG_SS, ESP-4, &value32);
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write_virtual_dword(BX_SEG_REG_SS, (Bit32u) (ESP-4), &value32);
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ESP -= 4;
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}
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else
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@ -93,7 +93,7 @@ void BX_CPU_C::push_64(Bit64u value64)
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else
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#endif
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* StackAddrSize = 32 */
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write_virtual_qword(BX_SEG_REG_SS, ESP-8, &value64);
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write_virtual_qword(BX_SEG_REG_SS, (Bit32u) (ESP-8), &value64);
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ESP -= 8;
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}
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else
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@ -223,7 +223,6 @@ BX_CPU_C::can_push(bx_descriptor_t *descriptor, Bit32u esp, Bit32u bytes)
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return(0);
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}
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if (descriptor->u.segment.c_ed) { /* expand down segment */
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Bit32u expand_down_limit;
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: tasking.cc,v 1.23 2005-08-21 18:23:36 sshwarts Exp $
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// $Id: tasking.cc,v 1.24 2005-08-28 17:37:37 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -138,14 +138,11 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
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Bit16u temp16, trap_word;
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bx_selector_t cs_selector, ss_selector, ds_selector, es_selector,
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fs_selector, gs_selector, ldt_selector;
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bx_descriptor_t cs_descriptor, ss_descriptor, ds_descriptor, es_descriptor,
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fs_descriptor, gs_descriptor, ldt_descriptor;
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bx_descriptor_t cs_descriptor, ss_descriptor, ldt_descriptor;
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Bit32u old_TSS_max, new_TSS_max, old_TSS_limit, new_TSS_limit;
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Bit32u newEAX, newECX, newEDX, newEBX;
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Bit32u newESP, newEBP, newESI, newEDI;
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Bit32u newEFLAGS, oldEFLAGS, newEIP;
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unsigned exception_no;
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Bit16u error_code;
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BX_DEBUG(( "TASKING: ENTER" ));
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@ -166,8 +163,8 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
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// Privilege and busy checks done in CALL, JUMP, INT, IRET
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exception_no = 256; // no exception
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error_code = 0;
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unsigned exception_no = 256; // no exception
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Bit16u error_code = 0;
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oldEFLAGS = read_eflags();
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// Gather info about old TSS
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@ -196,6 +193,11 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
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new_TSS_limit = tss_descriptor->u.tss386.limit_scaled;
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}
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if (obase32 == nbase32)
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{
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BX_PANIC(("Task switching to the same TSS might be not implemented correctly !"));
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}
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// Task State Seg must be present, else #NP(TSS selector)
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if (tss_descriptor->p==0) {
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BX_ERROR(("task_switch: TSS.p == 0"));
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@ -303,15 +305,6 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
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// I/O Map Base Address ???
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}
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#if 0
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if (ss_descriptor.u.segment.d_b && (tss_descriptor->type<9)) {
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BX_DEBUG(( "++++++++++++++++++++++++++" ));
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.valid = 0;
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exception(BX_SS_EXCEPTION, raw_ss_selector & 0xfffc, 0);
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//exception(BX_TS_EXCEPTION, tss_selector->value & 0xfffc, 0);
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}
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#endif
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//
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// Step 6: If JMP or IRET, clear busy bit in old task TSS descriptor,
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// otherwise leave set.
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@ -320,8 +313,7 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
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// effect on Busy bit of old task
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if ( (source==BX_TASK_FROM_JUMP) || (source==BX_TASK_FROM_IRET) ) {
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// Bit is cleared
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Bit32u laddr;
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laddr = BX_CPU_THIS_PTR gdtr.base +
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Bit32u laddr = BX_CPU_THIS_PTR gdtr.base +
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(BX_CPU_THIS_PTR tr.selector.index<<3) + 4;
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access_linear(laddr, 4, 0, BX_READ, &temp32);
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temp32 &= ~0x00000200;
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@ -427,8 +419,7 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
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if ( (source==BX_TASK_FROM_JUMP) || (source==BX_TASK_FROM_CALL_OR_INT) ) {
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// set the new task's busy bit
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Bit32u laddr;
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laddr = BX_CPU_THIS_PTR gdtr.base + (tss_selector->index<<3) + 4;
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Bit32u laddr = BX_CPU_THIS_PTR gdtr.base + (tss_selector->index<<3) + 4;
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access_linear(laddr, 4, 0, BX_READ, &dword2);
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dword2 |= 0x00000200;
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access_linear(laddr, 4, 0, BX_WRITE, &dword2);
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@ -506,7 +497,6 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.valid = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.valid = 0;
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// need to test valid bit in fetch_raw_descriptor?()
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// or set limit to 0 instead when LDT is loaded with
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// null. ??? +++
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@ -569,6 +559,15 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
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}
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else {
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// if new selector is not null then perform following checks:
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// index must be within its descriptor table limits else #TS(selector)
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// AR byte must indicate data or readable code else #TS(selector)
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// if data or non-conforming code then:
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// DPL must be >= CPL else #TS(selector)
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// DPL must be >= RPL else #TS(selector)
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// AR byte must indicate PRESENT else #NP(selector)
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// load cache with new segment descriptor and set valid bit
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// CS
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if ( (raw_cs_selector & 0xfffc) != 0 ) {
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bx_bool good = fetch_raw_descriptor2(&cs_selector, &dword1, &dword2);
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@ -593,7 +592,7 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
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// if non-conforming then DPL must equal selector RPL else #TS(CS)
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if (cs_descriptor.u.segment.c_ed==0 &&
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cs_descriptor.dpl!=cs_selector.rpl)
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cs_descriptor.dpl!=cs_selector.rpl)
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{
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BX_INFO(("task_switch: non-conforming: CS.dpl!=CS.RPL"));
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exception_no = BX_TS_EXCEPTION;
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@ -645,8 +644,7 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
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// SS selector must be within its descriptor table limits else #TS(SS)
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// SS descriptor AR byte must must indicate writable data segment,
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// else #TS(SS)
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if (ss_descriptor.valid==0 ||
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ss_descriptor.segment==0 ||
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if (ss_descriptor.valid==0 || ss_descriptor.segment==0 ||
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ss_descriptor.u.segment.executable ||
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ss_descriptor.u.segment.r_w==0)
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{
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@ -657,7 +655,7 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
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}
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//
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// Stack segment is present in memory, else #SF(new stack segment)
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// Stack segment is present in memory, else #SS(new stack segment)
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//
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if (! IS_PRESENT(ss_descriptor)) {
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BX_PANIC(("task_switch: SS not present"));
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@ -682,15 +680,6 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
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goto post_exception;
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}
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#if 0
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if (ss_descriptor.u.segment.d_b && (tss_descriptor->type<9)) {
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BX_DEBUG(( "++++++++++++++++++++++++++" ));
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exception_no = BX_TS_EXCEPTION;
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error_code = raw_ss_selector & 0xfffc;
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goto post_exception;
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}
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#endif
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// All checks pass, fill in shadow cache
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache = ss_descriptor;
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}
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@ -702,200 +691,14 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
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goto post_exception;
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}
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// if new selector is not null then perform following checks:
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// index must be within its descriptor table limits else #TS(selector)
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// AR byte must indicate data or readable code else #TS(selector)
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// if data or non-conforming code then:
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// DPL must be >= CPL else #TS(selector)
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// DPL must be >= RPL else #TS(selector)
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// AR byte must indicate PRESENT else #NP(selector)
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// load cache with new segment descriptor and set valid bit
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// DS
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if ( (raw_ds_selector & 0xfffc) != 0 ) {
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bx_bool good = fetch_raw_descriptor2(&ds_selector, &dword1, &dword2);
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if (!good) {
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BX_INFO(("task_switch: bad DS fetch"));
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exception_no = BX_TS_EXCEPTION;
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error_code = raw_ds_selector & 0xfffc;
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goto post_exception;
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}
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parse_descriptor(dword1, dword2, &ds_descriptor);
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if (ds_descriptor.valid==0 || ds_descriptor.segment==0 ||
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(ds_descriptor.u.segment.executable &&
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ds_descriptor.u.segment.r_w==0))
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{
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BX_PANIC(("task_switch: DS not valid"));
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exception_no = BX_TS_EXCEPTION;
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error_code = raw_ds_selector & 0xfffc;
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goto post_exception;
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}
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// if data or non-conforming code
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if (ds_descriptor.type<12 &&
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(ds_descriptor.dpl<cs_selector.rpl ||
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ds_descriptor.dpl<ds_selector.rpl))
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{
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BX_PANIC(("task_switch: DS.dpl not valid"));
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exception_no = BX_TS_EXCEPTION;
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error_code = raw_ds_selector & 0xfffc;
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goto post_exception;
|
||||
}
|
||||
|
||||
if (! IS_PRESENT(ds_descriptor)) {
|
||||
BX_PANIC(("task_switch: DS.p==0"));
|
||||
exception_no = BX_NP_EXCEPTION;
|
||||
error_code = raw_ds_selector & 0xfffc;
|
||||
goto post_exception;
|
||||
}
|
||||
|
||||
// All checks pass, fill in shadow cache
|
||||
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache = ds_descriptor;
|
||||
}
|
||||
else {
|
||||
// NULL DS selector is OK, leave cache invalid
|
||||
}
|
||||
|
||||
// ES
|
||||
if ( (raw_es_selector & 0xfffc) != 0 ) {
|
||||
bx_bool good = fetch_raw_descriptor2(&es_selector, &dword1, &dword2);
|
||||
if (!good) {
|
||||
BX_INFO(("task_switch: bad ES fetch"));
|
||||
exception_no = BX_TS_EXCEPTION;
|
||||
error_code = raw_es_selector & 0xfffc;
|
||||
goto post_exception;
|
||||
}
|
||||
|
||||
parse_descriptor(dword1, dword2, &es_descriptor);
|
||||
|
||||
if (es_descriptor.valid==0 || es_descriptor.segment==0 ||
|
||||
(es_descriptor.u.segment.executable &&
|
||||
es_descriptor.u.segment.r_w==0))
|
||||
{
|
||||
BX_PANIC(("task_switch: ES not valid"));
|
||||
exception_no = BX_TS_EXCEPTION;
|
||||
error_code = raw_es_selector & 0xfffc;
|
||||
goto post_exception;
|
||||
}
|
||||
|
||||
// if data or non-conforming code
|
||||
if (es_descriptor.type<12 &&
|
||||
(es_descriptor.dpl<cs_selector.rpl ||
|
||||
es_descriptor.dpl<es_selector.rpl))
|
||||
{
|
||||
BX_PANIC(("task_switch: ES.dpl not valid"));
|
||||
exception_no = BX_TS_EXCEPTION;
|
||||
error_code = raw_es_selector & 0xfffc;
|
||||
goto post_exception;
|
||||
}
|
||||
|
||||
if (! IS_PRESENT(es_descriptor)) {
|
||||
BX_PANIC(("task_switch: ES.p==0"));
|
||||
exception_no = BX_NP_EXCEPTION;
|
||||
error_code = raw_es_selector & 0xfffc;
|
||||
goto post_exception;
|
||||
}
|
||||
|
||||
// All checks pass, fill in shadow cache
|
||||
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache = es_descriptor;
|
||||
}
|
||||
else {
|
||||
// NULL ES selector is OK, leave cache invalid
|
||||
}
|
||||
|
||||
// FS
|
||||
if ( (raw_fs_selector & 0xfffc) != 0 ) { // not NULL
|
||||
bx_bool good = fetch_raw_descriptor2(&fs_selector, &dword1, &dword2);
|
||||
if (!good) {
|
||||
BX_INFO(("task_switch: bad FS fetch"));
|
||||
exception_no = BX_TS_EXCEPTION;
|
||||
error_code = raw_fs_selector & 0xfffc;
|
||||
goto post_exception;
|
||||
}
|
||||
|
||||
parse_descriptor(dword1, dword2, &fs_descriptor);
|
||||
if (fs_descriptor.valid==0 || fs_descriptor.segment==0 ||
|
||||
(fs_descriptor.u.segment.executable &&
|
||||
fs_descriptor.u.segment.r_w==0))
|
||||
{
|
||||
BX_PANIC(("task_switch: FS not valid"));
|
||||
exception_no = BX_TS_EXCEPTION;
|
||||
error_code = raw_fs_selector & 0xfffc;
|
||||
goto post_exception;
|
||||
}
|
||||
|
||||
// if data or non-conforming code
|
||||
if (fs_descriptor.type<12 &&
|
||||
(fs_descriptor.dpl<cs_selector.rpl ||
|
||||
fs_descriptor.dpl<fs_selector.rpl))
|
||||
{
|
||||
BX_PANIC(("task_switch: FS.dpl not valid"));
|
||||
exception_no = BX_TS_EXCEPTION;
|
||||
error_code = raw_fs_selector & 0xfffc;
|
||||
goto post_exception;
|
||||
}
|
||||
|
||||
if (! IS_PRESENT(fs_descriptor)) {
|
||||
BX_PANIC(("task_switch: FS.p==0"));
|
||||
exception_no = BX_NP_EXCEPTION;
|
||||
error_code = raw_fs_selector & 0xfffc;
|
||||
goto post_exception;
|
||||
}
|
||||
|
||||
// All checks pass, fill in shadow cache
|
||||
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache = fs_descriptor;
|
||||
}
|
||||
else {
|
||||
// NULL FS selector is OK, leave cache invalid
|
||||
}
|
||||
|
||||
// GS
|
||||
if ( (raw_gs_selector & 0xfffc) != 0 ) {
|
||||
bx_bool good = fetch_raw_descriptor2(&gs_selector, &dword1, &dword2);
|
||||
if (!good) {
|
||||
BX_INFO(("task_switch: bad GS fetch"));
|
||||
exception_no = BX_TS_EXCEPTION;
|
||||
error_code = raw_gs_selector & 0xfffc;
|
||||
goto post_exception;
|
||||
}
|
||||
|
||||
parse_descriptor(dword1, dword2, &gs_descriptor);
|
||||
if (gs_descriptor.valid==0 || gs_descriptor.segment==0 ||
|
||||
(gs_descriptor.u.segment.executable &&
|
||||
gs_descriptor.u.segment.r_w==0))
|
||||
{
|
||||
BX_PANIC(("task_switch: GS not valid"));
|
||||
exception_no = BX_TS_EXCEPTION;
|
||||
error_code = raw_gs_selector & 0xfffc;
|
||||
goto post_exception;
|
||||
}
|
||||
|
||||
// if data or non-conforming code
|
||||
if (gs_descriptor.type<12 &&
|
||||
(gs_descriptor.dpl<cs_selector.rpl ||
|
||||
gs_descriptor.dpl<gs_selector.rpl))
|
||||
{
|
||||
BX_PANIC(("task_switch: GS.dpl not valid"));
|
||||
exception_no = BX_TS_EXCEPTION;
|
||||
error_code = raw_gs_selector & 0xfffc;
|
||||
goto post_exception;
|
||||
}
|
||||
|
||||
if (! IS_PRESENT(gs_descriptor)) {
|
||||
BX_PANIC(("task_switch: GS.p==0"));
|
||||
exception_no = BX_NP_EXCEPTION;
|
||||
error_code = raw_gs_selector & 0xfffc;
|
||||
goto post_exception;
|
||||
}
|
||||
|
||||
// All checks pass, fill in shadow cache
|
||||
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache = gs_descriptor;
|
||||
}
|
||||
else {
|
||||
// NULL GS selector is OK, leave cache invalid
|
||||
}
|
||||
task_switch_load_selector(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS],
|
||||
raw_ds_selector, cs_selector.rpl);
|
||||
task_switch_load_selector(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES],
|
||||
raw_es_selector, cs_selector.rpl);
|
||||
task_switch_load_selector(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS],
|
||||
raw_fs_selector, cs_selector.rpl);
|
||||
task_switch_load_selector(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS],
|
||||
raw_gs_selector, cs_selector.rpl);
|
||||
}
|
||||
|
||||
if ((tss_descriptor->type>=9) && (trap_word & 0x0001)) {
|
||||
@ -917,6 +720,48 @@ post_exception:
|
||||
exception(exception_no, error_code, 0);
|
||||
}
|
||||
|
||||
void BX_CPU_C::task_switch_load_selector(bx_segment_reg_t *seg, Bit16u raw_selector, Bit8u cs_rpl)
|
||||
{
|
||||
bx_selector_t selector;
|
||||
bx_descriptor_t descriptor;
|
||||
Bit32u dword1, dword2;
|
||||
|
||||
// NULL selector is OK, will leave cache invalid
|
||||
if ( (raw_selector & 0xfffc) != 0 )
|
||||
{
|
||||
bx_bool good = fetch_raw_descriptor2(&selector, &dword1, &dword2);
|
||||
if (!good) {
|
||||
BX_ERROR(("task_switch(%s): bad selector fetch !", strseg(seg)));
|
||||
exception(BX_TS_EXCEPTION, raw_selector & 0xfffc, 0);
|
||||
}
|
||||
|
||||
parse_descriptor(dword1, dword2, &descriptor);
|
||||
|
||||
if (descriptor.valid==0 || descriptor.segment==0 ||
|
||||
(descriptor.u.segment.executable &&
|
||||
descriptor.u.segment.r_w==0))
|
||||
{
|
||||
BX_ERROR(("task_switch(%s): not a writeable data segment !", strseg(seg)));
|
||||
exception(BX_TS_EXCEPTION, raw_selector & 0xfffc, 0);
|
||||
}
|
||||
|
||||
if (descriptor.type < 12 &&
|
||||
(descriptor.dpl < cs_rpl || descriptor.dpl < selector.rpl))
|
||||
{
|
||||
BX_ERROR(("task_switch(%s): descriptor DPL check failed !", strseg(seg)));
|
||||
exception(BX_TS_EXCEPTION, raw_selector & 0xfffc, 0);
|
||||
}
|
||||
|
||||
if (! IS_PRESENT(descriptor)) {
|
||||
BX_ERROR(("task_switch(%s): descriptor not present !", strseg(seg)));
|
||||
exception(BX_NP_EXCEPTION, raw_selector & 0xfffc, 0);
|
||||
}
|
||||
|
||||
// All checks pass, fill in shadow cache
|
||||
seg->cache = descriptor;
|
||||
}
|
||||
}
|
||||
|
||||
void BX_CPU_C::get_SS_ESP_from_TSS(unsigned pl, Bit16u *ss, Bit32u *esp)
|
||||
{
|
||||
if (BX_CPU_THIS_PTR tr.cache.valid==0)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user