Remove code duplication from SMM code
This commit is contained in:
Stanislav Shwartsman
parent
41204ede1a
commit
c8cc6bcd14
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: smm.cc,v 1.13 2006-04-05 17:31:32 sshwarts Exp $
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// $Id: smm.cc,v 1.14 2006-04-06 16:47:29 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2006 Stanislav Shwartsman
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@ -218,6 +218,13 @@ void BX_CPU_C::enter_system_management_mode(void)
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#if BX_SUPPORT_X86_64
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BX_CPP_INLINE Bit64u SMRAM_FIELD64(const Bit32u *saved_state, unsigned hi, unsigned lo)
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{
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Bit64u tmp = ((Bit64u) SMRAM_FIELD(saved_state, hi)) << 32;
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tmp |= (Bit64u) SMRAM_FIELD(saved_state, lo);
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return tmp;
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}
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void BX_CPU_C::smram_save_state(Bit32u *saved_state)
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{
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// --- General Purpose Registers --- //
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@ -344,8 +351,6 @@ void BX_CPU_C::smram_save_state(Bit32u *saved_state)
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(((Bit32u) get_segment_ar_data(&seg->cache)) << 16);
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}
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#define SMRAM_FIELD64(state, addr) ((Bit64u) state[SMRAM_TRANSLATE(addr)])
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bx_bool BX_CPU_C::smram_restore_state(const Bit32u *saved_state)
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{
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Bit32u temp_cr0 = SMRAM_FIELD(saved_state, SMRAM_OFFSET_CR0);
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@ -406,60 +411,38 @@ bx_bool BX_CPU_C::smram_restore_state(const Bit32u *saved_state)
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SetCR0(temp_cr0);
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setEFlags(temp_eflags);
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bx_address temp_cr3 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RAX_HI32) << 32;
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temp_cr3 |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RAX_LO32);
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bx_phy_address temp_cr3 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RAX_HI32, SMRAM_OFFSET_RAX_LO32);
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CR3_change(temp_cr3);
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RAX = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RAX_HI32) << 32;
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RAX |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RAX_LO32);
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RBX = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RBX_HI32) << 32;
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RBX |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RBX_LO32);
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RCX = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RCX_HI32) << 32;
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RCX |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RCX_LO32);
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RDX = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RDX_HI32) << 32;
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RDX |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RDX_LO32);
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RSP = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RSP_HI32) << 32;
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RSP |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RSP_LO32);
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RBP = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RBP_HI32) << 32;
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RBP |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RBP_LO32);
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RSI = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RSI_HI32) << 32;
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RSI |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RSI_LO32);
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RDI = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RDI_HI32) << 32;
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RDI |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RDI_LO32);
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R8 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R8_HI32) << 32;
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R8 |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R8_LO32);
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R9 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R9_HI32) << 32;
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R9 |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R9_LO32);
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R10 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R10_HI32) << 32;
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R10 |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R10_LO32);
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R11 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R11_HI32) << 32;
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R11 |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R11_LO32);
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R12 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R12_HI32) << 32;
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R12 |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R12_LO32);
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R13 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R13_HI32) << 32;
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R13 |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R13_LO32);
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R14 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R14_HI32) << 32;
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R14 |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R14_LO32);
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R15 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R15_HI32) << 32;
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R15 |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R15_LO32);
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RIP = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RIP_HI32) << 32;
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RIP |= SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RIP_LO32);
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RAX = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RAX_HI32, SMRAM_OFFSET_RAX_LO32);
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RBX = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RBX_HI32, SMRAM_OFFSET_RBX_LO32);
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RCX = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RCX_HI32, SMRAM_OFFSET_RCX_LO32);
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RDX = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RDX_HI32, SMRAM_OFFSET_RDX_LO32);
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RSP = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RSP_HI32, SMRAM_OFFSET_RSP_LO32);
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RBP = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RBP_HI32, SMRAM_OFFSET_RBP_LO32);
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RSI = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RSI_HI32, SMRAM_OFFSET_RSI_LO32);
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RDI = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RDI_HI32, SMRAM_OFFSET_RDI_LO32);
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R8 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R8_HI32, SMRAM_OFFSET_R8_LO32);
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R9 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R9_HI32, SMRAM_OFFSET_R9_LO32);
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R10 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R10_HI32, SMRAM_OFFSET_R10_LO32);
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R11 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R11_HI32, SMRAM_OFFSET_R11_LO32);
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R12 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R12_HI32, SMRAM_OFFSET_R12_LO32);
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R13 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R13_HI32, SMRAM_OFFSET_R13_LO32);
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R14 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R14_HI32, SMRAM_OFFSET_R14_LO32);
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R15 = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_R15_HI32, SMRAM_OFFSET_R15_LO32);
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RIP = SMRAM_FIELD64(saved_state, SMRAM_OFFSET_RIP_HI32, SMRAM_OFFSET_RIP_LO32);
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BX_CPU_THIS_PTR dr6 = SMRAM_FIELD(saved_state, SMRAM_OFFSET_DR6);
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BX_CPU_THIS_PTR dr7 = SMRAM_FIELD(saved_state, SMRAM_OFFSET_DR7);
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BX_CPU_THIS_PTR gdtr.base = SMRAM_FIELD64(saved_state, SMRAM_GDTR_BASE_HI32) << 32;
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BX_CPU_THIS_PTR gdtr.base |= SMRAM_FIELD64(saved_state, SMRAM_GDTR_BASE_LO32);
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BX_CPU_THIS_PTR gdtr.base = SMRAM_FIELD64(saved_state, SMRAM_GDTR_BASE_HI32, SMRAM_GDTR_BASE_LO32);
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BX_CPU_THIS_PTR gdtr.limit = SMRAM_FIELD(saved_state, SMRAM_GDTR_LIMIT);
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BX_CPU_THIS_PTR idtr.base = SMRAM_FIELD64(saved_state, SMRAM_IDTR_BASE_HI32) << 32;
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BX_CPU_THIS_PTR idtr.base |= SMRAM_FIELD64(saved_state, SMRAM_IDTR_BASE_LO32);
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BX_CPU_THIS_PTR idtr.base = SMRAM_FIELD64(saved_state, SMRAM_IDTR_BASE_HI32, SMRAM_IDTR_BASE_LO32);
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BX_CPU_THIS_PTR idtr.limit = SMRAM_FIELD(saved_state, SMRAM_IDTR_LIMIT);
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if (set_segment_ar_data(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS],
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SMRAM_FIELD(saved_state, SMRAM_CS_SELECTOR_AR) & 0xffff,
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SMRAM_FIELD64(saved_state, SMRAM_CS_BASE_LO32) |
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SMRAM_FIELD64(saved_state, SMRAM_CS_BASE_HI32) << 32,
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SMRAM_FIELD64(saved_state, SMRAM_CS_BASE_HI32, SMRAM_CS_BASE_LO32),
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SMRAM_FIELD(saved_state, SMRAM_CS_LIMIT),
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SMRAM_FIELD(saved_state, SMRAM_CS_SELECTOR_AR) >> 16))
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{
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@ -473,8 +456,7 @@ bx_bool BX_CPU_C::smram_restore_state(const Bit32u *saved_state)
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if (set_segment_ar_data(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS],
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SMRAM_FIELD(saved_state, SMRAM_DS_SELECTOR_AR) & 0xffff,
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SMRAM_FIELD64(saved_state, SMRAM_DS_BASE_LO32) |
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SMRAM_FIELD64(saved_state, SMRAM_DS_BASE_HI32) << 32,
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SMRAM_FIELD64(saved_state, SMRAM_DS_BASE_HI32, SMRAM_DS_BASE_LO32),
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SMRAM_FIELD(saved_state, SMRAM_DS_LIMIT),
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SMRAM_FIELD(saved_state, SMRAM_DS_SELECTOR_AR) >> 16))
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{
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@ -486,8 +468,7 @@ bx_bool BX_CPU_C::smram_restore_state(const Bit32u *saved_state)
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if (set_segment_ar_data(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS],
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SMRAM_FIELD(saved_state, SMRAM_SS_SELECTOR_AR) & 0xffff,
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SMRAM_FIELD64(saved_state, SMRAM_SS_BASE_LO32) |
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SMRAM_FIELD64(saved_state, SMRAM_SS_BASE_HI32) << 32,
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SMRAM_FIELD64(saved_state, SMRAM_SS_BASE_HI32, SMRAM_SS_BASE_LO32),
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SMRAM_FIELD(saved_state, SMRAM_SS_LIMIT),
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SMRAM_FIELD(saved_state, SMRAM_SS_SELECTOR_AR) >> 16))
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{
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@ -499,8 +480,7 @@ bx_bool BX_CPU_C::smram_restore_state(const Bit32u *saved_state)
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if (set_segment_ar_data(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES],
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SMRAM_FIELD(saved_state, SMRAM_ES_SELECTOR_AR) & 0xffff,
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SMRAM_FIELD64(saved_state, SMRAM_ES_BASE_LO32) |
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SMRAM_FIELD64(saved_state, SMRAM_ES_BASE_HI32) << 32,
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SMRAM_FIELD64(saved_state, SMRAM_ES_BASE_HI32, SMRAM_ES_BASE_LO32),
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SMRAM_FIELD(saved_state, SMRAM_ES_LIMIT),
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SMRAM_FIELD(saved_state, SMRAM_ES_SELECTOR_AR) >> 16))
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{
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@ -512,8 +492,7 @@ bx_bool BX_CPU_C::smram_restore_state(const Bit32u *saved_state)
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if (set_segment_ar_data(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS],
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SMRAM_FIELD(saved_state, SMRAM_FS_SELECTOR_AR) & 0xffff,
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SMRAM_FIELD64(saved_state, SMRAM_FS_BASE_LO32) |
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SMRAM_FIELD64(saved_state, SMRAM_FS_BASE_HI32) << 32,
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SMRAM_FIELD64(saved_state, SMRAM_FS_BASE_HI32, SMRAM_FS_BASE_LO32),
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SMRAM_FIELD(saved_state, SMRAM_FS_LIMIT),
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SMRAM_FIELD(saved_state, SMRAM_FS_SELECTOR_AR) >> 16))
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{
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@ -525,8 +504,7 @@ bx_bool BX_CPU_C::smram_restore_state(const Bit32u *saved_state)
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if (set_segment_ar_data(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS],
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SMRAM_FIELD(saved_state, SMRAM_GS_SELECTOR_AR) & 0xffff,
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SMRAM_FIELD64(saved_state, SMRAM_GS_BASE_LO32) |
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SMRAM_FIELD64(saved_state, SMRAM_GS_BASE_HI32) << 32,
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SMRAM_FIELD64(saved_state, SMRAM_GS_BASE_HI32, SMRAM_GS_BASE_LO32),
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SMRAM_FIELD(saved_state, SMRAM_GS_LIMIT),
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SMRAM_FIELD(saved_state, SMRAM_GS_SELECTOR_AR) >> 16))
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{
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@ -538,8 +516,7 @@ bx_bool BX_CPU_C::smram_restore_state(const Bit32u *saved_state)
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if (set_segment_ar_data(&BX_CPU_THIS_PTR ldtr,
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SMRAM_FIELD(saved_state, SMRAM_LDTR_SELECTOR_AR) & 0xffff,
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SMRAM_FIELD64(saved_state, SMRAM_LDTR_BASE_HI32) |
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SMRAM_FIELD64(saved_state, SMRAM_LDTR_BASE_LO32) << 32,
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SMRAM_FIELD64(saved_state, SMRAM_LDTR_BASE_HI32, SMRAM_LDTR_BASE_LO32),
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SMRAM_FIELD(saved_state, SMRAM_LDTR_LIMIT),
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SMRAM_FIELD(saved_state, SMRAM_LDTR_SELECTOR_AR) >> 16))
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{
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@ -551,8 +528,7 @@ bx_bool BX_CPU_C::smram_restore_state(const Bit32u *saved_state)
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if (set_segment_ar_data(&BX_CPU_THIS_PTR tr,
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SMRAM_FIELD(saved_state, SMRAM_TR_SELECTOR_AR) & 0xffff,
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SMRAM_FIELD64(saved_state, SMRAM_TR_BASE_HI32) |
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SMRAM_FIELD64(saved_state, SMRAM_TR_BASE_LO32) << 32,
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SMRAM_FIELD64(saved_state, SMRAM_TR_BASE_HI32, SMRAM_TR_BASE_LO32),
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SMRAM_FIELD(saved_state, SMRAM_TR_LIMIT),
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SMRAM_FIELD(saved_state, SMRAM_TR_SELECTOR_AR) >> 16))
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{
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