Roll back several incorrect changes in iret.cc
This commit is contained in:
Stanislav Shwartsman
parent
b6f484f606
commit
681db0fd86
@ -1,5 +1,5 @@
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////////////////////////////////////////////////////////////////////////
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// $Id: iret.cc,v 1.4 2005-08-03 21:19:11 sshwarts Exp $
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// $Id: iret.cc,v 1.5 2005-08-14 17:23:03 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -121,216 +121,228 @@ BX_CPU_C::iret_protected(bxInstruction_c *i)
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return;
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}
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else {
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/* NT = 0: INTERRUPT RETURN ON STACK -or STACK_RETURN_TO_V86 */
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unsigned top_nbytes_outer, ss_offset;
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Bit16u new_flags;
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Bit32u new_eip, new_esp, new_eflags;
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Bit32u temp_ESP;
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/* NT = 0: INTERRUPT RETURN ON STACK -or STACK_RETURN_TO_V86 */
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unsigned top_nbytes_same, top_nbytes_outer;
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Bit32u new_eip, new_esp, temp_ESP, new_eflags;
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Bit16u new_ip, new_flags;
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Bit32u ss_offset;
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/* 16bit opsize | 32bit opsize
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* ==============================
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* SS eSP+8 | SS eSP+16
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* SP eSP+6 | ESP eSP+12
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* -------------------------------
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* FLAGS eSP+4 | EFLAGS eSP+8
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* CS eSP+2 | CS eSP+4
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* IP eSP+0 | EIP eSP+0
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*/
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if (i->os32L()) {
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top_nbytes_same = 12;
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top_nbytes_outer = 20;
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ss_offset = 16;
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}
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else {
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top_nbytes_same = 6;
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top_nbytes_outer = 10;
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ss_offset = 8;
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}
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/* CS on stack must be within stack limits, else #SS(0) */
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if ( !can_pop(top_nbytes_same) ) {
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BX_ERROR(("iret: CS not within stack limits"));
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exception(BX_SS_EXCEPTION, 0, 0);
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}
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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temp_ESP = ESP;
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else
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temp_ESP = SP;
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if (i->os32L()) {
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 4,
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2, CPL==3, BX_READ, &raw_cs_selector);
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 0,
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4, CPL==3, BX_READ, &new_eip);
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 8,
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4, CPL==3, BX_READ, &new_eflags);
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// if VM=1 in flags image on stack then STACK_RETURN_TO_V86
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if (new_eflags & 0x00020000) {
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if (CPL == 0) {
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BX_CPU_THIS_PTR stack_return_to_v86(new_eip, raw_cs_selector, new_eflags);
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return;
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}
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else BX_INFO(("iret: VM set on stack, CPL!=0"));
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}
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}
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else {
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 2,
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2, CPL==3, BX_READ, &raw_cs_selector);
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 0,
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2, CPL==3, BX_READ, &new_ip);
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 4,
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2, CPL==3, BX_READ, &new_flags);
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}
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parse_selector(raw_cs_selector, &cs_selector);
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// return CS selector must be non-null, else #GP(0)
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if ( (raw_cs_selector & 0xfffc) == 0 ) {
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BX_ERROR(("iret: return CS selector null"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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// selector index must be within descriptor table limits,
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// else #GP(return selector)
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fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &cs_descriptor);
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// return CS selector RPL must be >= CPL, else #GP(return selector)
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if (cs_selector.rpl < CPL) {
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BX_ERROR(("iret: return selector RPL < CPL"));
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exception(BX_GP_EXCEPTION, raw_cs_selector & 0xfffc, 0);
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}
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// check code-segment descriptor
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check_cs(&cs_descriptor, raw_cs_selector, 0, cs_selector.rpl);
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if (cs_selector.rpl == CPL) { /* INTERRUPT RETURN TO SAME LEVEL */
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/* top 6/12 bytes on stack must be within limits, else #SS(0) */
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/* satisfied above */
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if (i->os32L()) {
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/* load CS-cache with new code segment descriptor */
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branch_far32(&cs_selector, &cs_descriptor, new_eip, cs_selector.rpl);
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/* load EFLAGS with 3rd doubleword from stack */
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write_eflags(new_eflags, CPL==0, CPL<=BX_CPU_THIS_PTR get_IOPL (), 0, 1);
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}
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else {
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/* load CS-cache with new code segment descriptor */
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branch_far32(&cs_selector, &cs_descriptor, (Bit32u) new_ip, cs_selector.rpl);
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/* load flags with third word on stack */
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write_flags(new_flags, CPL==0, CPL<=BX_CPU_THIS_PTR get_IOPL ());
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}
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/* increment stack by 6/12 */
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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ESP += top_nbytes_same;
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else
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SP += top_nbytes_same;
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return;
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}
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else { /* INTERRUPT RETURN TO OUTER PRIVILEGE LEVEL */
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/* 16bit opsize | 32bit opsize
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* ==============================
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* SS eSP+8 | SS eSP+16
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* SP eSP+6 | ESP eSP+12
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* -------------------------------
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* FLAGS eSP+4 | EFLAGS eSP+8
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* CS eSP+2 | CS eSP+4
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* IP eSP+0 | EIP eSP+0
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*/
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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temp_ESP = ESP;
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else
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temp_ESP = SP;
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if (i->os32L()) {
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/* CS on stack must be within stack limits, else #SS(0) */
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if (! can_pop(12) ) {
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BX_ERROR(("iret: CS not within stack limits"));
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exception(BX_SS_EXCEPTION, 0, 0);
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}
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 4,
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2, CPL==3, BX_READ, &raw_cs_selector);
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 0,
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4, CPL==3, BX_READ, &new_eip);
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 8,
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4, CPL==3, BX_READ, &new_eflags);
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// if VM=1 in flags image on stack then STACK_RETURN_TO_V86
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if (new_eflags & 0x00020000) {
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if (CPL == 0) {
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BX_CPU_THIS_PTR stack_return_to_v86(new_eip, raw_cs_selector, new_eflags);
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return;
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}
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else BX_INFO(("iret: VM set on stack, CPL!=0"));
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}
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top_nbytes_outer = 20;
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ss_offset = 16;
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}
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else {
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/* CS on stack must be within stack limits, else #SS(0) */
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if (! can_pop(6) ) {
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BX_ERROR(("iret: CS not within stack limits"));
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exception(BX_SS_EXCEPTION, 0, 0);
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}
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Bit16u new_ip = 0;
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 2,
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2, CPL==3, BX_READ, &raw_cs_selector);
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 0,
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2, CPL==3, BX_READ, &new_ip);
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 4,
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2, CPL==3, BX_READ, &new_flags);
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new_eip = new_ip;
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top_nbytes_outer = 10;
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ss_offset = 8;
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/* top 10/20 bytes on stack must be within limits else #SS(0) */
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if ( !can_pop(top_nbytes_outer) ) {
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BX_ERROR(("iret: top 10/20 bytes not within stack limits"));
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exception(BX_SS_EXCEPTION, 0, 0);
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}
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parse_selector(raw_cs_selector, &cs_selector);
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/* examine return SS selector and associated descriptor */
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + ss_offset,
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2, 0, BX_READ, &raw_ss_selector);
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// return CS selector must be non-null, else #GP(0)
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if ( (raw_cs_selector & 0xfffc) == 0 ) {
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BX_ERROR(("iret: return CS selector null"));
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/* selector must be non-null, else #GP(0) */
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if ( (raw_ss_selector & 0xfffc) == 0 ) {
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BX_ERROR(("iret: SS selector null"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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// selector index must be within descriptor table limits,
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// else #GP(return selector)
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fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &cs_descriptor);
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parse_selector(raw_ss_selector, &ss_selector);
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// return CS selector RPL must be >= CPL, else #GP(return selector)
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if (cs_selector.rpl < CPL) {
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BX_ERROR(("iret: return selector RPL < CPL"));
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exception(BX_GP_EXCEPTION, raw_cs_selector & 0xfffc, 0);
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/* selector RPL must = RPL of return CS selector,
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* else #GP(SS selector) */
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if ( ss_selector.rpl != cs_selector.rpl) {
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BX_ERROR(("iret: SS.rpl != CS.rpl"));
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exception(BX_GP_EXCEPTION, raw_ss_selector & 0xfffc, 0);
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}
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// check code-segment descriptor
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check_cs(&cs_descriptor, raw_cs_selector, 0, cs_selector.rpl);
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/* selector index must be within its descriptor table limits,
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* else #GP(SS selector) */
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fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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/* INTERRUPT RETURN TO SAME LEVEL */
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if (cs_selector.rpl == CPL)
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parse_descriptor(dword1, dword2, &ss_descriptor);
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/* AR byte must indicate a writable data segment,
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* else #GP(SS selector) */
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if ( ss_descriptor.valid==0 ||
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ss_descriptor.segment==0 ||
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ss_descriptor.u.segment.executable ||
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ss_descriptor.u.segment.r_w==0 )
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{
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/* top 6/12 bytes on stack must be within limits, else #SS(0) */
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/* satisfied above */
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branch_far32(&cs_selector, &cs_descriptor, new_eip, CPL);
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if (i->os32L()) {
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/* load eflags with 3rd doubleword from stack */
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write_eflags(new_eflags, CPL==0, CPL<=BX_CPU_THIS_PTR get_IOPL (), 0, 1);
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}
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else {
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/* load flags with third word on stack */
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write_flags(new_flags, CPL==0, CPL<=BX_CPU_THIS_PTR get_IOPL ());
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}
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/* increment stack by 6/12 */
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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ESP += 12;
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else
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SP += 6;
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return;
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BX_ERROR(("iret: SS AR byte not writable code segment"));
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exception(BX_GP_EXCEPTION, raw_ss_selector & 0xfffc, 0);
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}
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else { /* INTERRUPT RETURN TO OUTER PRIVILEGE LEVEL */
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/* 16bit opsize | 32bit opsize
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* ==============================
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* SS eSP+8 | SS eSP+16
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* SP eSP+6 | ESP eSP+12
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* FLAGS eSP+4 | EFLAGS eSP+8
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* CS eSP+2 | CS eSP+4
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* IP eSP+0 | EIP eSP+0
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*/
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/* top 10/20 bytes on stack must be within limits else #SS(0) */
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if ( !can_pop(top_nbytes_outer) ) {
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BX_ERROR(("iret: top 10/20 bytes not within stack limits"));
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exception(BX_SS_EXCEPTION, 0, 0);
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}
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/* examine return SS selector and associated descriptor */
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + ss_offset,
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2, 0, BX_READ, &raw_ss_selector);
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/* selector must be non-null, else #GP(0) */
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if ( (raw_ss_selector & 0xfffc) == 0 ) {
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BX_ERROR(("iret: SS selector null"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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parse_selector(raw_ss_selector, &ss_selector);
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/* selector RPL must = RPL of return CS selector,
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* else #GP(SS selector) */
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if ( ss_selector.rpl != cs_selector.rpl) {
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BX_ERROR(("iret: SS.rpl != CS.rpl"));
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exception(BX_GP_EXCEPTION, raw_ss_selector & 0xfffc, 0);
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}
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/* selector index must be within its descriptor table limits,
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* else #GP(SS selector) */
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fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_GP_EXCEPTION);
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parse_descriptor(dword1, dword2, &ss_descriptor);
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/* AR byte must indicate a writable data segment,
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* else #GP(SS selector) */
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if ( ss_descriptor.valid==0 ||
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ss_descriptor.segment==0 ||
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ss_descriptor.u.segment.executable ||
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ss_descriptor.u.segment.r_w==0 )
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{
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BX_ERROR(("iret: SS AR byte not writable code segment"));
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exception(BX_GP_EXCEPTION, raw_ss_selector & 0xfffc, 0);
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}
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/* stack segment DPL must equal the RPL of the return CS selector,
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* else #GP(SS selector) */
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if ( ss_descriptor.dpl != cs_selector.rpl ) {
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BX_ERROR(("iret: SS.dpl != CS selector RPL"));
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exception(BX_GP_EXCEPTION, raw_ss_selector & 0xfffc, 0);
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}
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/* SS must be present, else #NP(SS selector) */
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if (! IS_PRESENT(ss_descriptor)) {
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BX_ERROR(("iret: SS not present!"));
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exception(BX_NP_EXCEPTION, raw_ss_selector & 0xfffc, 0);
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}
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if (i->os32L()) {
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 12,
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4, 0, BX_READ, &new_esp);
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}
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else {
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Bit16u new_sp = 0;
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 6,
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2, 0, BX_READ, &new_sp);
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new_esp = new_sp;
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}
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Bit8u prev_cpl = CPL; /* previous CPL */
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branch_far32(&cs_selector, &cs_descriptor, new_eip, cs_selector.rpl);
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/* load flags from stack */
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// perhaps I should always write_eflags(), thus zeroing
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// out the upper 16bits of eflags for CS.D_B==0 ???
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if (cs_descriptor.u.segment.d_b)
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write_eflags(new_eflags, prev_cpl==0, prev_cpl<=BX_CPU_THIS_PTR get_IOPL (), 0, 1);
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else
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write_flags(new_flags, prev_cpl==0, prev_cpl<=BX_CPU_THIS_PTR get_IOPL ());
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// load SS:eSP from stack
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// load the SS-cache with SS descriptor
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load_ss(&ss_selector, &ss_descriptor, cs_selector.rpl);
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if (ss_descriptor.u.segment.d_b)
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ESP = new_esp;
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else
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SP = new_esp;
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validate_seg_regs();
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/* stack segment DPL must equal the RPL of the return CS selector,
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* else #GP(SS selector) */
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if ( ss_descriptor.dpl != cs_selector.rpl ) {
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BX_ERROR(("iret: SS.dpl != CS selector RPL"));
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exception(BX_GP_EXCEPTION, raw_ss_selector & 0xfffc, 0);
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}
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/* SS must be present, else #NP(SS selector) */
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if (! IS_PRESENT(ss_descriptor)) {
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BX_ERROR(("iret: SS not present!"));
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exception(BX_NP_EXCEPTION, raw_ss_selector & 0xfffc, 0);
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}
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if (i->os32L()) {
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 0,
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4, 0, BX_READ, &new_eip);
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 8,
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4, 0, BX_READ, &new_eflags);
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 12,
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4, 0, BX_READ, &new_esp);
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}
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else {
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Bit16u new_sp = 0;
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 0,
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2, 0, BX_READ, &new_ip);
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 4,
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2, 0, BX_READ, &new_flags);
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access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_ESP + 6,
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2, 0, BX_READ, &new_sp);
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new_eip = new_ip;
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new_esp = new_sp;
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new_eflags = new_flags;
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}
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Bit8u prev_cpl = CPL; /* previous CPL */
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/* load CS:EIP from stack */
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/* load the CS-cache with CS descriptor */
|
||||
/* set CPL to the RPL of the return CS selector */
|
||||
branch_far32(&cs_selector, &cs_descriptor, new_eip, cs_selector.rpl);
|
||||
|
||||
/* load flags from stack */
|
||||
// perhaps I should always write_eflags(), thus zeroing
|
||||
// out the upper 16bits of eflags for CS.D_B==0 ???
|
||||
if (cs_descriptor.u.segment.d_b)
|
||||
write_eflags(new_eflags, prev_cpl==0, prev_cpl<=BX_CPU_THIS_PTR get_IOPL (), 0, 1);
|
||||
else
|
||||
write_flags((Bit16u) new_eflags, prev_cpl==0, prev_cpl<=BX_CPU_THIS_PTR get_IOPL ());
|
||||
|
||||
// load SS:eSP from stack
|
||||
// load the SS-cache with SS descriptor
|
||||
load_ss(&ss_selector, &ss_descriptor, cs_selector.rpl);
|
||||
if (ss_descriptor.u.segment.d_b)
|
||||
ESP = new_esp;
|
||||
else
|
||||
SP = new_esp;
|
||||
|
||||
validate_seg_regs();
|
||||
}
|
||||
}
|
||||
|
||||
@ -364,6 +376,8 @@ BX_CPU_C::long_iret(bxInstruction_c *i)
|
||||
else temp_RSP = SP;
|
||||
}
|
||||
|
||||
unsigned top_nbytes_same = 0; /* stop compiler warnings */
|
||||
|
||||
if (i->os64L()) {
|
||||
Bit64u new_rflags = 0;
|
||||
access_linear(BX_CPU_THIS_PTR get_segment_base(BX_SEG_REG_SS) + temp_RSP + 8,
|
||||
@ -392,6 +406,7 @@ BX_CPU_C::long_iret(bxInstruction_c *i)
|
||||
4, CPL==3, BX_READ, &new_eflags);
|
||||
new_rip = return_EIP;
|
||||
top_nbytes_outer = 20;
|
||||
top_nbytes_same = 12;
|
||||
ss_offset = 16;
|
||||
}
|
||||
else {
|
||||
@ -411,6 +426,7 @@ BX_CPU_C::long_iret(bxInstruction_c *i)
|
||||
new_rip = return_IP;
|
||||
new_eflags = (Bit32u) new_flags;
|
||||
top_nbytes_outer = 10;
|
||||
top_nbytes_same = 6;
|
||||
ss_offset = 8;
|
||||
}
|
||||
|
||||
@ -456,8 +472,10 @@ BX_CPU_C::long_iret(bxInstruction_c *i)
|
||||
write_eflags(new_eflags, CPL==0, CPL<=BX_CPU_THIS_PTR get_IOPL(), 0, 1);
|
||||
|
||||
/* we are NOT in 64-bit mode */
|
||||
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) ESP += 12;
|
||||
else SP += 6;
|
||||
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
|
||||
ESP += top_nbytes_same;
|
||||
else
|
||||
SP += top_nbytes_same;
|
||||
}
|
||||
else { /* INTERRUPT RETURN TO OUTER PRIVILEGE LEVEL or 64 BIT MODE */
|
||||
/* 64bit opsize
|
||||
|
||||
Loading…
Reference in New Issue
Block a user