Change Bit32u -> bx_phy_address in memory
This commit is contained in:
Stanislav Shwartsman
parent
42aac37624
commit
4fd9bd53c3
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.273 2006-03-27 18:02:07 sshwarts Exp $
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// $Id: cpu.h,v 1.274 2006-03-28 16:53:02 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -2718,10 +2718,10 @@ public: // for now...
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BX_SMF void access_linear(bx_address address, unsigned length, unsigned pl,
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unsigned rw, void *data) BX_CPP_AttrRegparmN(3);
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BX_SMF Bit32u translate_linear(bx_address laddr,
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BX_SMF bx_phy_address translate_linear(bx_address laddr,
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unsigned pl, unsigned rw, unsigned access_type) BX_CPP_AttrRegparmN(3);
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BX_SMF Bit32u itranslate_linear(bx_address laddr, unsigned pl) BX_CPP_AttrRegparmN(2);
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BX_SMF Bit32u dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw) BX_CPP_AttrRegparmN(3);
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BX_SMF bx_phy_address itranslate_linear(bx_address laddr, unsigned pl) BX_CPP_AttrRegparmN(2);
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BX_SMF bx_phy_address dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw) BX_CPP_AttrRegparmN(3);
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BX_SMF void TLB_flush(bx_bool invalidateGlobal);
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BX_SMF void TLB_invlpg(bx_address laddr);
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BX_SMF void TLB_init(void);
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@ -2741,7 +2741,6 @@ public: // for now...
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BX_SMF void exception(unsigned vector, Bit16u error_code, bx_bool is_INT)
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BX_CPP_AttrNoReturn();
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#endif
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BX_SMF bx_bool smram_write(bx_phy_address a20addr);
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BX_SMF void smram_save_state(void);
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BX_SMF bx_bool smram_restore_state(void);
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BX_SMF int int_number(bx_segment_reg_t *seg);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: paging.cc,v 1.69 2006-03-26 19:39:37 sshwarts Exp $
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// $Id: paging.cc,v 1.70 2006-03-28 16:53:02 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -606,7 +606,7 @@ void BX_CPU_C::INVLPG(bxInstruction_c* i)
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// Translate a linear address to a physical address, for
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// a data access (D)
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Bit32u BX_CPP_AttrRegparmN(3)
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bx_phy_address BX_CPP_AttrRegparmN(3)
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BX_CPU_C::translate_linear(bx_address laddr, unsigned pl, unsigned rw, unsigned access_type)
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{
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bx_address lpf;
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@ -1057,13 +1057,13 @@ page_fault_not_present:
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return(0); // keep compiler happy
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}
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Bit32u BX_CPP_AttrRegparmN(3)
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bx_phy_address BX_CPP_AttrRegparmN(3)
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BX_CPU_C::dtranslate_linear(bx_address laddr, unsigned pl, unsigned rw)
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{
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return translate_linear(laddr, pl, rw, DATA_ACCESS);
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}
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Bit32u BX_CPP_AttrRegparmN(2)
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bx_phy_address BX_CPP_AttrRegparmN(2)
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BX_CPU_C::itranslate_linear(bx_address laddr, unsigned pl)
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{
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return translate_linear(laddr, pl, BX_READ, CODE_ACCESS);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: smm.cc,v 1.9 2006-03-27 20:09:37 sshwarts Exp $
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// $Id: smm.cc,v 1.10 2006-03-28 16:53:02 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2006 Stanislav Shwartsman
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@ -47,13 +47,18 @@ void BX_CPU_C::RSM(bxInstruction_c *i)
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BX_CPU_THIS_PTR in_smm = 0;
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UndefinedOpcode(i);
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// restore the CPU state from SMRAM
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if (! smram_restore_state()) {
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BX_PANIC(("RSM: Incorrect state when restoring CPU state - shutdown !"));
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}
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}
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void BX_CPU_C::enter_system_management_mode(void)
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{
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invalidate_prefetch_q();
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// save processor state to the SMRAM
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// save CPU state to the SMRAM
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BX_CPU_THIS_PTR smram_save_state();
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// all status flags at known values, use BX_CPU_THIS_PTR eflags structure
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@ -64,6 +69,30 @@ void BX_CPU_C::enter_system_management_mode(void)
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BX_CPU_THIS_PTR prev_eip = RIP = 0x000080000;
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// DR7
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BX_CPU_THIS_PTR dr7 = 0x00000400;
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// CR0 - PE, EM, TS, and PG flags set to 0; others unmodified
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BX_CPU_THIS_PTR cr0.pe = 0; // real mode (bit 0)
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BX_CPU_THIS_PTR cr0.em = 0; // emulate math coprocessor (bit 2)
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BX_CPU_THIS_PTR cr0.ts = 0; // no task switch (bit 3)
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BX_CPU_THIS_PTR cr0.pg = 0; // paging disabled (bit 31)
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BX_CPU_THIS_PTR cr0.val32 &= 0x7ffffff2;
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// paging mode was changed - flush TLB
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TLB_flush(1); // 1 = Flush Global entries also
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#if BX_CPU_LEVEL >= 4
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BX_CPU_THIS_PTR cr4.setRegister(0);
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#endif
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// EFER.LME = 0, EFER.LME = 1
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#if BX_SUPPORT_X86_64
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BX_CPU_THIS_PTR msr.lme = 0;
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BX_CPU_THIS_PTR msr.lma = 0;
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#endif
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value = BX_CPU_THIS_PTR smbase << 4;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.index = 0;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.ti = 0;
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@ -122,35 +151,6 @@ void BX_CPU_C::enter_system_management_mode(void)
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES] = BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS];
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS] = BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS];
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS] = BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS];
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// DR7
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BX_CPU_THIS_PTR dr7 = 0x00000400;
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// CR0 - PE, EM, TS, and PG flags set to 0; others unmodified
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BX_CPU_THIS_PTR cr0.pe = 0; // real mode (bit 0)
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BX_CPU_THIS_PTR cr0.em = 0; // emulate math coprocessor (bit 2)
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BX_CPU_THIS_PTR cr0.ts = 0; // no task switch (bit 3)
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BX_CPU_THIS_PTR cr0.pg = 0; // paging disabled (bit 31)
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BX_CPU_THIS_PTR cr0.val32 &= 0x7ffffff2;
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// paging mode was changed - flush TLB
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TLB_flush(1); // 1 = Flush Global entries also
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#if BX_CPU_LEVEL >= 4
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BX_CPU_THIS_PTR cr4.setRegister(0);
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#endif
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// EFER.LME = 0, EFER.LME = 1
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#if BX_SUPPORT_X86_64
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BX_CPU_THIS_PTR msr.lme = 0;
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BX_CPU_THIS_PTR msr.lma = 0;
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#endif
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}
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bx_bool BX_CPU_C::smram_write(bx_phy_address a20addr)
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{
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return 1; // for now
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}
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#define SMRAM_TRANSLATE(addr) (((0x8000 - (addr)) >> 2) - 1)
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@ -318,7 +318,7 @@ void BX_CPU_C::smram_save_state(void)
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/* base+0x7f9c to base+0x7f04 is reserved */
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/* base+0x7f02 is Auto HALT restart field (2 byte) */
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/* base+0x7f00 is I/O restart field (2 byte) */
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/* base+0x7efc is SMM Revision Identifier field */
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/* base+0x7efc is SMM Revision Identifier field */
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saved_state[SMRAM_TRANSLATE(0x7ef8)] = BX_CPU_THIS_PTR smbase;
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/* base+0x7ef4 to base+0x7e00 is reserved */
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: memory.cc,v 1.52 2006-03-26 22:15:07 sshwarts Exp $
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// $Id: memory.cc,v 1.53 2006-03-28 16:53:02 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -44,10 +44,10 @@
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//
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void BX_CPP_AttrRegparmN(3)
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BX_MEM_C::writePhysicalPage(BX_CPU_C *cpu, Bit32u addr, unsigned len, void *data)
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BX_MEM_C::writePhysicalPage(BX_CPU_C *cpu, bx_phy_address addr, unsigned len, void *data)
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{
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Bit8u *data_ptr;
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Bit32u a20addr = A20ADDR(addr);
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bx_phy_address a20addr = A20ADDR(addr);
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// Note: accesses should always be contained within a single page now
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@ -161,7 +161,7 @@ inc_one:
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// SMMRAM
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if (a20addr <= 0x000bffff) {
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// devices are not allowed to access SMMRAM under VGA memory
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if (cpu && cpu->smram_write(a20addr)) {
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if (cpu) {
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vector[a20addr] = *data_ptr;
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BX_DBG_DIRTY_PAGE(a20addr >> 12);
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}
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@ -202,10 +202,10 @@ inc_one:
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}
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void BX_CPP_AttrRegparmN(3)
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BX_MEM_C::readPhysicalPage(BX_CPU_C *cpu, Bit32u addr, unsigned len, void *data)
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BX_MEM_C::readPhysicalPage(BX_CPU_C *cpu, bx_phy_address addr, unsigned len, void *data)
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{
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Bit8u *data_ptr;
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Bit32u a20addr = A20ADDR(addr);
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bx_phy_address a20addr = A20ADDR(addr);
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// Note: accesses should always be contained within a single page now
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@ -361,7 +361,7 @@ inc_one:
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#endif
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for (unsigned i = 0; i < len; i++) {
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if (a20addr >= (Bit32u)~BIOS_MASK)
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if (a20addr >= (bx_phy_address)~BIOS_MASK)
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*data_ptr = rom[a20addr & BIOS_MASK];
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else
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*data_ptr = 0xff;
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: memory.h,v 1.36 2006-03-27 18:02:07 sshwarts Exp $
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// $Id: memory.h,v 1.37 2006-03-28 16:53:02 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -54,8 +54,8 @@ typedef bx_bool (*memory_handler_t)(unsigned long addr, unsigned long len, void
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struct memory_handler_struct {
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struct memory_handler_struct *next;
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void *param;
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unsigned long begin;
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unsigned long end;
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bx_phy_address begin;
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bx_phy_address end;
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memory_handler_t read_handler;
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memory_handler_t write_handler;
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};
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@ -93,21 +93,21 @@ public:
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BX_MEM_SMF void enable_smram(bx_bool enable, bx_bool restricted);
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BX_MEM_SMF void disable_smram(void);
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BX_MEM_SMF bx_bool is_smram_accessible(void);
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BX_MEM_SMF void readPhysicalPage(BX_CPU_C *cpu, Bit32u addr,
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BX_MEM_SMF void readPhysicalPage(BX_CPU_C *cpu, bx_phy_address addr,
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unsigned len, void *data) BX_CPP_AttrRegparmN(3);
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BX_MEM_SMF void writePhysicalPage(BX_CPU_C *cpu, Bit32u addr,
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BX_MEM_SMF void writePhysicalPage(BX_CPU_C *cpu, bx_phy_address addr,
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unsigned len, void *data) BX_CPP_AttrRegparmN(3);
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BX_MEM_SMF void load_ROM(const char *path, Bit32u romaddress, Bit8u type);
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BX_MEM_SMF void load_RAM(const char *path, Bit32u romaddress, Bit8u type);
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BX_MEM_SMF void load_ROM(const char *path, bx_phy_address romaddress, Bit8u type);
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BX_MEM_SMF void load_RAM(const char *path, bx_phy_address romaddress, Bit8u type);
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BX_MEM_SMF Bit32u get_memory_in_k(void);
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BX_MEM_SMF bx_bool dbg_fetch_mem(Bit32u addr, unsigned len, Bit8u *buf);
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BX_MEM_SMF bx_bool dbg_set_mem(Bit32u addr, unsigned len, Bit8u *buf);
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BX_MEM_SMF bx_bool dbg_crc32(Bit32u addr1, Bit32u addr2, Bit32u *crc);
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BX_MEM_SMF Bit8u* getHostMemAddr(BX_CPU_C *cpu, Bit32u a20Addr, unsigned op, unsigned access_type);
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BX_MEM_SMF bx_bool dbg_fetch_mem(bx_phy_address addr, unsigned len, Bit8u *buf);
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BX_MEM_SMF bx_bool dbg_set_mem(bx_phy_address addr, unsigned len, Bit8u *buf);
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BX_MEM_SMF bx_bool dbg_crc32(bx_phy_address addr1, bx_phy_address addr2, Bit32u *crc);
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BX_MEM_SMF Bit8u* getHostMemAddr(BX_CPU_C *cpu, bx_phy_address a20Addr, unsigned op, unsigned access_type);
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BX_MEM_SMF bx_bool registerMemoryHandlers(void *param, memory_handler_t read_handler,
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memory_handler_t write_handler, Bit32u begin_addr, Bit32u end_addr);
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BX_MEM_SMF bx_bool unregisterMemoryHandlers(memory_handler_t read_handler, memory_handler_t write_handler,
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Bit32u begin_addr, Bit32u end_addr);
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memory_handler_t write_handler, bx_phy_address begin_addr, bx_phy_address end_addr);
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BX_MEM_SMF bx_bool unregisterMemoryHandlers(memory_handler_t read_handler, memory_handler_t write_handler,
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bx_phy_address begin_addr, bx_phy_address end_addr);
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};
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#if BX_PROVIDE_CPU_MEMORY==1
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: misc_mem.cc,v 1.86 2006-03-27 18:02:07 sshwarts Exp $
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// $Id: misc_mem.cc,v 1.87 2006-03-28 16:53:02 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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@ -94,7 +94,7 @@ void BX_MEM_C::init_memory(int memsize)
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{
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int idx;
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BX_DEBUG(("Init $Id: misc_mem.cc,v 1.86 2006-03-27 18:02:07 sshwarts Exp $"));
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BX_DEBUG(("Init $Id: misc_mem.cc,v 1.87 2006-03-28 16:53:02 sshwarts Exp $"));
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// you can pass 0 if memory has been allocated already through
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// the constructor, or the desired size of memory if it hasn't
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@ -179,7 +179,7 @@ Bit8u mp_checksum(const Bit8u *p, int len)
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// 1 : VGA Bios
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// 2 : Optional ROM Bios
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//
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void BX_MEM_C::load_ROM(const char *path, Bit32u romaddress, Bit8u type)
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void BX_MEM_C::load_ROM(const char *path, bx_phy_address romaddress, Bit8u type)
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{
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struct stat stat_buf;
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int fd, ret, i, start_idx, end_idx;
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@ -244,7 +244,7 @@ void BX_MEM_C::load_ROM(const char *path, Bit32u romaddress, Bit8u type)
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return;
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}
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} else {
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romaddress = (Bit32u)-size;
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romaddress = (bx_phy_address)-size;
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}
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offset = romaddress & BIOS_MASK;
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if ((romaddress & 0xf0000) < 0xf0000) {
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@ -385,7 +385,7 @@ void BX_MEM_C::load_ROM(const char *path, Bit32u romaddress, Bit8u type)
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path));
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}
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void BX_MEM_C::load_RAM(const char *path, Bit32u ramaddress, Bit8u type)
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void BX_MEM_C::load_RAM(const char *path, bx_phy_address ramaddress, Bit8u type)
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{
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struct stat stat_buf;
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int fd, ret;
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@ -432,7 +432,7 @@ void BX_MEM_C::load_RAM(const char *path, Bit32u ramaddress, Bit8u type)
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#if ( BX_DEBUGGER || BX_DISASM || BX_GDBSTUB)
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bx_bool BX_MEM_C::dbg_fetch_mem(Bit32u addr, unsigned len, Bit8u *buf)
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bx_bool BX_MEM_C::dbg_fetch_mem(bx_phy_address addr, unsigned len, Bit8u *buf)
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{
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bx_bool ret = 1;
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@ -497,7 +497,7 @@ bx_bool BX_MEM_C::dbg_fetch_mem(Bit32u addr, unsigned len, Bit8u *buf)
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#endif
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#if BX_DEBUGGER || BX_GDBSTUB
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bx_bool BX_MEM_C::dbg_set_mem(Bit32u addr, unsigned len, Bit8u *buf)
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bx_bool BX_MEM_C::dbg_set_mem(bx_phy_address addr, unsigned len, Bit8u *buf)
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{
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if ((addr + len) > BX_MEM_THIS len) {
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return(0); // error, beyond limits of memory
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@ -535,7 +535,7 @@ bx_bool BX_MEM_C::dbg_set_mem(Bit32u addr, unsigned len, Bit8u *buf)
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}
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#endif
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bx_bool BX_MEM_C::dbg_crc32(Bit32u addr1, Bit32u addr2, Bit32u *crc)
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bx_bool BX_MEM_C::dbg_crc32(bx_phy_address addr1, bx_phy_address addr2, Bit32u *crc)
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{
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*crc = 0;
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if (addr1 > addr2)
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@ -573,7 +573,7 @@ bx_bool BX_MEM_C::dbg_crc32(Bit32u addr1, Bit32u addr2, Bit32u *crc)
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// 0xf0000 - 0xfffff Upper BIOS Area (64K)
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//
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Bit8u *BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, Bit32u a20Addr, unsigned op, unsigned access_type)
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Bit8u *BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, bx_phy_address a20Addr, unsigned op, unsigned access_type)
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{
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BX_ASSERT(cpu != 0); // getHostMemAddr could be used only inside the CPU
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@ -641,7 +641,7 @@ Bit8u *BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, Bit32u a20Addr, unsigned op, unsi
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return( (Bit8u *) & rom[(a20Addr & EXROM_MASK) + BIOSROMSZ]);
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}
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}
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else if (a20Addr >= (Bit32u)~BIOS_MASK)
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else if (a20Addr >= (bx_phy_address)~BIOS_MASK)
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{
|
||||
return (Bit8u *) & rom[a20Addr & BIOS_MASK];
|
||||
}
|
||||
@ -658,7 +658,7 @@ Bit8u *BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, Bit32u a20Addr, unsigned op, unsi
|
||||
return(NULL); // Error, requested addr is out of bounds.
|
||||
else if ((a20Addr & 0xfffe0000) == 0x000a0000)
|
||||
return(NULL); // Vetoed! Mem mapped IO (VGA)
|
||||
else if (a20Addr >= (Bit32u)~BIOS_MASK)
|
||||
else if (a20Addr >= (bx_phy_address)~BIOS_MASK)
|
||||
return(NULL); // Vetoed! ROMs
|
||||
#if BX_SUPPORT_PCI
|
||||
else if (pci_enabled && ((a20Addr & 0xfffc0000) == 0x000c0000))
|
||||
@ -700,7 +700,7 @@ Bit8u *BX_MEM_C::getHostMemAddr(BX_CPU_C *cpu, Bit32u a20Addr, unsigned op, unsi
|
||||
*/
|
||||
bx_bool
|
||||
BX_MEM_C::registerMemoryHandlers(void *param, memory_handler_t read_handler,
|
||||
memory_handler_t write_handler, Bit32u begin_addr, Bit32u end_addr)
|
||||
memory_handler_t write_handler, bx_phy_address begin_addr, bx_phy_address end_addr)
|
||||
{
|
||||
if (end_addr < begin_addr)
|
||||
return false;
|
||||
@ -722,7 +722,7 @@ BX_MEM_C::registerMemoryHandlers(void *param, memory_handler_t read_handler,
|
||||
|
||||
bx_bool
|
||||
BX_MEM_C::unregisterMemoryHandlers(memory_handler_t read_handler, memory_handler_t write_handler,
|
||||
Bit32u begin_addr, Bit32u end_addr)
|
||||
bx_phy_address begin_addr, bx_phy_address end_addr)
|
||||
{
|
||||
bx_bool ret = true;
|
||||
BX_INFO(("Memory access handlers unregistered: %08x-%08x", begin_addr, end_addr));
|
||||
|
||||
Loading…
Reference in New Issue
Block a user