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Fixed several PANIC cases:

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the PANIC message TSS.limit < 103 should never appear anymore
This commit is contained in:
Stanislav Shwartsman 2005-06-22 18:13:45 +00:00
parent ce8f1ade07
commit a9dd851fd6
3 changed files with 29 additions and 28 deletions
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19
bochs/cpu/io_pro.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: io_pro.cc,v 1.16 2005-03-09 22:01:13 sshwarts Exp $
// $Id: io_pro.cc,v 1.17 2005-06-22 18:13:45 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -131,30 +131,27 @@ BX_CPU_C::outp8(Bit16u addr, Bit8u value)
BX_OUTP(addr, value, 1);
}
bx_bool
BX_CPU_C::allow_io(Bit16u addr, unsigned len)
bx_bool BX_CPU_C::allow_io(Bit16u addr, unsigned len)
{
Bit16u io_base, permission16;
unsigned bit_index, i;
if (BX_CPU_THIS_PTR tr.cache.valid==0 || BX_CPU_THIS_PTR tr.cache.type!=9) {
BX_INFO(("allow_io(): TR doesn't point to a valid 32bit TSS"));
if (BX_CPU_THIS_PTR tr.cache.valid==0 ||
BX_CPU_THIS_PTR tr.cache.type != BX_SYS_SEGMENT_AVAIL_386_TSS)
{
BX_ERROR(("allow_io(): TR doesn't point to a valid 32bit TSS"));
return(0);
}
if (BX_CPU_THIS_PTR tr.cache.u.tss386.limit_scaled < 103) {
BX_PANIC(("allow_io(): TR.limit < 103"));
BX_ERROR(("allow_io(): TR.limit < 103"));
return(0);
}
access_linear(BX_CPU_THIS_PTR tr.cache.u.tss386.base + 102,
2, 0, BX_READ, &io_base);
if (io_base <= 103) {
BX_INFO(("PE is %u", BX_CPU_THIS_PTR cr0.pe));
BX_INFO(("VM is %u", BX_CPU_THIS_PTR getB_VM ()));
BX_INFO(("CPL is %u, IOPL is %u", CPL, BX_CPU_THIS_PTR get_IOPL ()));
BX_INFO(("addr is %u, len = %u", addr, len));
BX_PANIC(("allow_io(): TR:io_base (%u) <= 103",io_base));
return(0);
}

28
bochs/cpu/protect_ctrl.cc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: protect_ctrl.cc,v 1.38 2005-03-29 21:37:06 sshwarts Exp $
// $Id: protect_ctrl.cc,v 1.39 2005-06-22 18:13:45 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -430,7 +430,7 @@ void BX_CPU_C::LTR_Ew(bxInstruction_c *i)
/* #GP(0) if the current privilege level is not 0 */
if (CPL != 0) {
BX_INFO(("LTR: The current priveledge level is not 0"));
BX_ERROR(("LTR: The current priveledge level is not 0"));
exception(BX_GP_EXCEPTION, 0, 0);
}
@ -455,7 +455,8 @@ void BX_CPU_C::LTR_Ew(bxInstruction_c *i)
parse_selector(raw_selector, &selector);
if (selector.ti) {
BX_PANIC(("LTR: selector.ti != 0"));
BX_ERROR(("LTR: selector.ti != 0"));
exception(BX_GP_EXCEPTION, raw_selector & 0xfffc, 0);
return;
}
@ -466,35 +467,40 @@ void BX_CPU_C::LTR_Ew(bxInstruction_c *i)
#if BX_SUPPORT_X86_64
if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
// set upper 32 bits of tss base
access_linear(BX_CPU_THIS_PTR gdtr.base + selector.index*8 + 8, 4, 0,
BX_READ, &dword3);
access_linear(BX_CPU_THIS_PTR gdtr.base + selector.index*8 + 8, 4, 0, BX_READ, &dword3);
descriptor.u.tss386.base |= ((Bit64u)dword3 << 32);
BX_INFO(("64 bit tss base = 0x%08x%08x",(Bit32u)(descriptor.u.tss386.base >> 32),(Bit32u)descriptor.u.tss386.base));
BX_INFO(("64 bit tss base = 0x%08x%08x",
(Bit32u)(descriptor.u.tss386.base >> 32),
(Bit32u) descriptor.u.tss386.base));
}
#endif
/* #GP(selector) if object is not a TSS or is already busy */
if (descriptor.valid==0 || descriptor.segment ||
(descriptor.type!=1 && descriptor.type!=9))
(descriptor.type!=BX_SYS_SEGMENT_AVAIL_286_TSS &&
descriptor.type!=BX_SYS_SEGMENT_AVAIL_386_TSS))
{
BX_PANIC(("LTR: doesn't point to an available TSS descriptor!"));
exception(BX_GP_EXCEPTION, raw_selector & 0xfffc, 0); /* 0 ? */
BX_ERROR(("LTR: doesn't point to an available TSS descriptor!"));
exception(BX_GP_EXCEPTION, raw_selector & 0xfffc, 0);
return;
}
/* #NP(selector) if TSS descriptor is not present */
if (descriptor.p==0) {
BX_PANIC(("LTR: LDT descriptor not present!"));
exception(BX_NP_EXCEPTION, raw_selector & 0xfffc, 0); /* 0 ? */
BX_ERROR(("LTR: LDT descriptor not present!"));
exception(BX_NP_EXCEPTION, raw_selector & 0xfffc, 0);
return;
}
/*
// the real hardware CPU allow loading of tss with limit < minimum
if (descriptor.type==1 && descriptor.u.tss286.limit<43) {
BX_PANIC(("LTR:286TSS: loading tr.limit < 43"));
}
else if (descriptor.type==9 && descriptor.u.tss386.limit_scaled<103) {
BX_PANIC(("LTR:386TSS: loading tr.limit < 103"));
}
*/
BX_CPU_THIS_PTR tr.selector = selector;
BX_CPU_THIS_PTR tr.cache = descriptor;

10
bochs/cpu/tasking.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: tasking.cc,v 1.20 2005-03-04 21:03:22 sshwarts Exp $
// $Id: tasking.cc,v 1.21 2005-06-22 18:13:45 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -198,16 +198,15 @@ void BX_CPU_C::task_switch(bx_selector_t *tss_selector,
// Task State Seg must be present, else #NP(TSS selector)
if (tss_descriptor->p==0) {
BX_INFO(("task_switch: TSS.p == 0"));
BX_ERROR(("task_switch: TSS.p == 0"));
exception(BX_NP_EXCEPTION, tss_selector->value & 0xfffc, 0);
}
// TSS must have valid limit, else #TS(TSS selector)
if (tss_selector->ti ||
tss_descriptor->valid==0 ||
if (tss_selector->ti || tss_descriptor->valid==0 ||
new_TSS_limit < new_TSS_max)
{
BX_PANIC(("task_switch(): TR not valid"));
BX_ERROR(("task_switch(): TR not valid"));
exception(BX_TS_EXCEPTION, tss_selector->value & 0xfffc, 0);
}
@ -919,7 +918,6 @@ post_exception:
BX_CPU_THIS_PTR inhibit_mask = 0;
BX_INFO(("task switch: posting exception %u after commit point", exception_no));
exception(exception_no, error_code, 0);
return;
}
void BX_CPU_C::get_SS_ESP_from_TSS(unsigned pl, Bit16u *ss, Bit32u *esp)