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Getting ready for long mode disasm support, patch will posted soon

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This commit is contained in:
Stanislav Shwartsman 2005-11-14 18:09:22 +00:00
parent d21416209e
commit 7b7ac565f9
4 changed files with 25 additions and 43 deletions
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14
bochs/bx_debug/dbg_main.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: dbg_main.cc,v 1.25 2005-11-10 18:14:18 sshwarts Exp $
// $Id: dbg_main.cc,v 1.26 2005-11-14 18:09:22 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -1943,7 +1943,7 @@ void bx_dbg_disassemble_current (int which_cpu, int print_time)
Base=BX_CPU(which_cpu)->sregs[BX_SEG_REG_CS].selector.value<<4;
}
ilen = bx_disassemble.disasm(BX_CPU(which_cpu)->guard_found.is_32bit_code,
ilen = bx_disassemble.disasm(BX_CPU(which_cpu)->guard_found.is_32bit_code, 0 /* is_64 */,
Base, BX_CPU(which_cpu)->guard_found.eip, bx_disasm_ibuf, bx_disasm_tbuf);
// Note: it would be nice to display only the modified registers here, the easy
@ -3283,7 +3283,7 @@ void bx_dbg_disassemble_command(const char *format, bx_num_range range)
dis_size = 32;
}
BX_MEM(0)->dbg_fetch_mem(paddr, 16, bx_disasm_ibuf);
ilen = bx_disassemble.disasm(dis_size==32,
ilen = bx_disassemble.disasm(dis_size==32, dis_size==32
0, (Bit32u)range.from, bx_disasm_ibuf, bx_disasm_tbuf);
char *Sym=bx_dbg_disasm_symbolic_address((Bit32u)range.from, 0);
@ -3295,14 +3295,14 @@ void bx_dbg_disassemble_command(const char *format, bx_num_range range)
for (unsigned j=0; j<ilen; j++)
dbg_printf ( "%02x", (unsigned) bx_disasm_ibuf[j]);
dbg_printf ( "\n");
}
}
else {
dbg_printf ( "??? (physical address not available)\n");
ilen = 0; // keep compiler happy
range.from = range.to; // bail out
}
range.from += ilen;
} while ((range.from < range.to) && numlines > 0);
}
range.from += ilen;
} while ((range.from < range.to) && numlines > 0);
}
void bx_dbg_instrument_command(const char *comm)

6
bochs/cpu/debugstuff.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: debugstuff.cc,v 1.40 2005-09-29 17:32:32 sshwarts Exp $
// $Id: debugstuff.cc,v 1.41 2005-11-14 18:09:22 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -213,8 +213,8 @@ void BX_CPU_C::debug(bx_address offset)
BX_CPU_THIS_PTR mem->dbg_fetch_mem(phy_addr, 16, instr_buf);
isize = bx_disassemble.disasm(
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b,
Base,
EIP, instr_buf, char_buf);
BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64,
Base, EIP, instr_buf, char_buf);
#if BX_SUPPORT_X86_64
if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) isize = 16;
#endif

42
bochs/disasm/dis_decode.cc
View File

@ -5,10 +5,6 @@
#include "disasm.h"
#include "dis_tables.h"
/* ******************** */
// INSTRUCTION PREFIXES //
/* ******************** */
static const unsigned char instruction_has_modrm[512] = {
/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
/* ------------------------------- */
@ -50,35 +46,17 @@ static const unsigned char instruction_has_modrm[512] = {
/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
};
/*
* Group 1:
*
* F0h - LOCK
* F2h - REPNE/REPZ (used only with string instructions)
* F3h - REP or REPE/REPZ (used only with string instructions)
*
* Group 2 :
*
* - segment override prefixes
* 2Eh - CS segment override
* 36h - SS segment override
* 3Eh - DS segment override
* 26h - ES segment override
* 64h - FS segment override
* 65h - GS segment override
*
* - branch hints
* 2Eh - branch not taken (branch hint for Jcc instructions only)
* 3Eh - branch taken (branch hint for Jcc instructions only)
*
* Group 3:
*
* 66h - operand size override prefix
* 67h - address size override prefix
*/
unsigned disassembler::disasm16(bx_address base, bx_address ip, Bit8u *instr, char *disbuf)
{
return disasm(0, 0, base, ip, instr, disbuf);
}
unsigned disassembler::disasm(bx_bool is_32,
bx_address base, bx_address ip, Bit8u *instr, char *disbuf)
unsigned disassembler::disasm32(bx_address base, bx_address ip, Bit8u *instr, char *disbuf)
{
return disasm(1, 0, base, ip, instr, disbuf);
}
unsigned disassembler::disasm(bx_bool is_32, bx_bool is_64, bx_address base, bx_address ip, Bit8u *instr, char *disbuf)
{
os_32 = is_32;
as_32 = is_32;

6
bochs/disasm/disasm.h
View File

@ -133,7 +133,11 @@ struct BxDisasmOpcodeInfo_t
class disassembler {
public:
disassembler() { set_syntax_intel(); }
unsigned disasm(bx_bool is_32, bx_address base, bx_address ip, Bit8u *instr, char *disbuf);
unsigned disasm16(bx_address base, bx_address ip, Bit8u *instr, char *disbuf);
unsigned disasm32(bx_address base, bx_address ip, Bit8u *instr, char *disbuf);
unsigned disasm(bx_bool is_32, bx_bool is_64, bx_address base, bx_address ip, Bit8u *instr, char *disbuf);
void set_syntax_intel();
void set_syntax_att ();