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749 Commits

Author SHA1 Message Date
Stanislav Shwartsman
c482fbed43 Add additional debug info 2004-11-15 19:38:42 +00:00
Stanislav Shwartsman
a75280d757 Fix CS.BASE wrong value on reset 2004-11-14 21:47:58 +00:00
Stanislav Shwartsman
730b8c0243 Fix this pointers in the code 2004-11-14 21:25:42 +00:00
Stanislav Shwartsman
71c1275b21 dos2unix 2004-11-14 19:39:01 +00:00
Stanislav Shwartsman
7b62a6e206 Fix reset registers in CPU for #RESET signal 
Extract ICACHE from cpu.h to separate icache.h
 2004-11-14 19:29:34 +00:00
Stanislav Shwartsman
08810d54c4 Fix fetchdecode for FPU instructions when FPU is not present 2004-11-12 16:47:35 +00:00
Volker Ruppert
3cad938b05 - gdbstub support turned into a runtime option (SF patch #1021740 by Charles Duffy) 
- gdb_* options moved to the new gdbstub option
 2004-11-06 10:50:03 +00:00
Stanislav Shwartsman
41daacdf80 fixed BX_CPU_THIS pointers 2004-11-05 10:13:15 +00:00
Stanislav Shwartsman
1a6656ce91 Fixed compilation warnings (g++, -Wall) 
Improve speed and precision of FPATAN FPU instruction
 2004-11-04 22:41:24 +00:00
Stanislav Shwartsman
2ce5495d38 Fixed compilation errors 2004-11-03 06:35:48 +00:00
Stanislav Shwartsman
8191201e17 If exception occured register should not be modified. 
Fix for x86-64
 2004-11-02 20:39:45 +00:00
Stanislav Shwartsman
4e3bc367b6 Fixed all JUMP near, CALL near and RET near cases 
for problem EIP>CS.limit was not checked in real mode
 2004-11-02 18:05:19 +00:00
Stanislav Shwartsman
2ed7e4eed5 EIP > CS.limit should be checked in real mode too. 
Enable for now for JUMP instructions, still todo - CALL and RET
 2004-11-02 17:31:14 +00:00
Stanislav Shwartsman
f06c8b6b95 EIP > CS.limit should not be a problem 
Manual says that GP(0) shouldd be generated in this case ALWAYS
Fixed instructions PANIC messages to ERROR for this case
And ... do not leave PANIC messages w/o taking care that user could push CONTINUE button and program should know to continue after the PANIC code line. Mainly in rerurn instructions were several problems ...
 2004-11-02 16:10:02 +00:00
Stanislav Shwartsman
79bd13c46c iret32_real implemented right for 386+, not only for Pentium CPU. 
Removed ifdef's
 2004-10-30 16:04:58 +00:00
Stanislav Shwartsman
a9022ac5cb Fixed compilation prroblem reported in bug 
[ bochs-Bugs-913418 ] compiler errors with --enable-external-debugger option
Remove code duplication
 2004-10-29 21:15:48 +00:00
Stanislav Shwartsman
5e23909c7c prepations for NX bit implementation 2004-10-21 18:20:40 +00:00
Stanislav Shwartsman
95c894d403 Removed unused code 2004-10-19 20:05:07 +00:00
Stanislav Shwartsman
75e0c5b421 Little speed optimizations in cpu_loop function 
change apic classes to more c++ friendly
 2004-10-16 19:34:17 +00:00
Stanislav Shwartsman
4a9bd714d8 Fix init values for system registers 2004-10-16 10:18:01 +00:00
Stanislav Shwartsman
80ee150d83 Imlemented CR8 register for X86-64 mode 2004-10-13 20:58:16 +00:00
Stanislav Shwartsman
4f1f070c37 Fix comments for code 2004-10-08 19:29:04 +00:00
Stanislav Shwartsman
3adc5c8659 Fix lock prefix for XOR instruction in 64-bit mode 2004-10-08 19:07:18 +00:00
Stanislav Shwartsman
d1af05cbe2 Fix typo in stack64 2004-10-06 20:10:01 +00:00
Stanislav Shwartsman
6a9e8e6011 Drop unnecessary warning 2004-10-05 20:25:06 +00:00
Stanislav Shwartsman
4988a098f5 Small optimizations 2004-10-03 21:52:10 +00:00
Stanislav Shwartsman
a28a2c6ce1 Added comments 2004-10-03 20:25:19 +00:00
Stanislav Shwartsman
a21018e1db Fixed bug 
[ 766020 ] info registers / dump_cpu get old eflags
 2004-09-30 16:50:03 +00:00
Stanislav Shwartsman
c9bc4eaf02 1. add comments to CPUID instruction 
2. small cleanup
 2004-09-26 20:29:04 +00:00
Stanislav Shwartsman
3f096fdb9f Fix FISTTP instruction opcode table 2004-09-21 21:19:59 +00:00
Stanislav Shwartsman
040be015d8 1. Added required GP(0) exception when setting conficting flags in CR0 
2. APIC disabled compilation error fixed
 2004-09-21 20:19:19 +00:00
Stanislav Shwartsman
b6657b1322 NX feature still not implemented in Bochs. 
The change forces CPUID do not report bit 20 (NX bit support)
May be some OS that really checks it will boot better now
 2004-09-17 21:01:50 +00:00
Stanislav Shwartsman
760a195c9d * Fix LOCK prefix handling for x86-64 
* Split BT*_EvGv functions to 3 different function according to exec mode
 2004-09-17 20:47:19 +00:00
Stanislav Shwartsman
c780a15e6f dos2unix for apic.h 2004-09-15 22:02:19 +00:00
Stanislav Shwartsman
bbd55fe16f Merge and commit patch.apic-zwane from CVS patches directory. 
the patch release notes by Zwane:

o Define symbols for constants like
o APIC arbitration
o Processor priority
o Various interrupt delivery fixes
o Focus processor checking
o ExtINT delivery

I need to release this now so that i don't fall too far behind CVS, when
it was part of the bochs-smp patch it could boot 2.4.18 4way. Apologies
for the whitespace changes.


Also remove patch.apic-ppr-zwane patch because it already included in
patch.apic-zwane.

I hope it will help to boot x86-64 or cmp systems required missed APIC
features !
 2004-09-15 21:48:57 +00:00
Stanislav Shwartsman
283f9ae5d2 Simplify cpu.h 
Speedup FYL2X and FYL2XP1 instructions
 2004-09-14 20:19:54 +00:00
Stanislav Shwartsman
6cdb42d909 Little bit optimize memory access functions. Now values are calculated only if they actually needed. 2004-09-13 20:48:11 +00:00
Stanislav Shwartsman
fc631037ff remove obsolete comments from fetchdecode 2004-09-06 20:22:39 +00:00
Stanislav Shwartsman
ce459276c3 Fixed problem in previous commit ... 2004-09-04 20:19:39 +00:00
Stanislav Shwartsman
3916754e30 speedup and cleanup 2004-09-04 19:37:37 +00:00
Stanislav Shwartsman
6dc8a1cafd Very small code cleanup 2004-09-04 18:22:22 +00:00
Stanislav Shwartsman
193c7332aa 1. Small optimization for lazy_flags.cc 
2. Merge patch 1013516
Avoid invalidate_prefetch_q on enter, leave and cpuid
 2004-09-04 10:21:28 +00:00
Stanislav Shwartsman
75006eed8a Fix MUL/IMUL instructions flags handling 2004-08-31 19:43:58 +00:00
Stanislav Shwartsman
016207b222 Commented problematic check in misc_mem.cc 
Implemnted lazy-flags and undocumented flags handling for IMUL instructions
 2004-08-30 21:47:24 +00:00
Stanislav Shwartsman
77b3886f8b Cleanup and optimize 2004-08-28 08:41:46 +00:00
Stanislav Shwartsman
8953bfaffb Fixed flags handling for SHLD and rotate instrructions 2004-08-27 20:13:32 +00:00
Stanislav Shwartsman
27897c925e Fix undocumented flags handling for SHL instruction 
remove invalidate_prefetch_q from CPUID
 2004-08-27 18:43:23 +00:00
Stanislav Shwartsman
f2294e7c29 LAZY-FLAGS for MUL instructions 
undocumented flags handling for MUL instructions
 2004-08-26 20:37:50 +00:00
Stanislav Shwartsman
fcc54c7f82 Add missed flags modification 2004-08-18 21:38:50 +00:00
Stanislav Shwartsman
1f5aa2696f Fix compilation errors ;) 2004-08-18 21:29:07 +00:00
Stanislav Shwartsman
8c618be951 Fix comments 2004-08-18 20:49:31 +00:00
Stanislav Shwartsman
b370a417a4 Optimize lazy-flags for ADC and SBB instructions 2004-08-18 20:47:35 +00:00
Stanislav Shwartsman
729e0abd2a Fixed bug [ 912496 ] IDIV can cause simulator divide error 2004-08-18 19:27:52 +00:00
Stanislav Shwartsman
571617bcda Optimize lazy flags for NEG instruction 
Removed duplicate flags modification in CMPXCHG instruction
 2004-08-17 17:34:47 +00:00
Stanislav Shwartsman
231cd533c6 1. Update changes 
2. Fix lazy_flags duplicate instruction patterns
 2004-08-16 20:18:01 +00:00
Stanislav Shwartsman
c2b7f183af more correct implementation 2004-08-15 20:31:27 +00:00
Stanislav Shwartsman
eefdcece6f Speed-up BTC instruction 
Speed-up SAR instruction with implementing lazy-flags for it
 2004-08-15 20:12:05 +00:00
Stanislav Shwartsman
12b68ede54 XADD and ADD instructions have same flags modification rules - remove redundant switch case 2004-08-14 20:44:48 +00:00
Stanislav Shwartsman
88a19a8594 Speedup lazy-flags for NEG instruction 2004-08-14 20:09:22 +00:00
Stanislav Shwartsman
1b7b791493 Speedup lazy-flags for INC and DEC instructions 2004-08-14 20:00:24 +00:00
Stanislav Shwartsman
1732e54baa Fixed undocumented flags handling for some instructions. 
Bugfix for CF flag handling for SHL64 instruction
 2004-08-14 19:34:02 +00:00
Stanislav Shwartsman
a1f830d429 Implemented FAST lazy flags version for logic instructions. 
Small code cleanup/simplification for others.
 2004-08-13 20:00:03 +00:00
Stanislav Shwartsman
5de51f67d9 Prepare lazy flags macroses for more efficient lazy flags handling 2004-08-11 21:26:23 +00:00
Stanislav Shwartsman
8f0cf91fff This commit is the first commit in long series of changes the have several purposes: 
1. Review and commit patch

	[ 896733 ] Lazy flags, for more instructions, only 1 src op

   May be partially, but I hope to get all ideas from patch in

2. Get Bochs speedup after lazy flags optimization

3. Most important for me: improve correctness of emulation by handling several
   undocumented EFLAGS modifications. And finally pass

	UFLAGS - Undefined Flags Test v 3.0
	Copyright (C) Potemkin's Hackers Group (PHG) 1989,1995

   The test still fails on > 50% of its checks.
 2004-08-09 21:28:47 +00:00
Stanislav Shwartsman
789ed4da04 Removed debug print 2004-07-29 20:30:14 +00:00
Stanislav Shwartsman
f9bd2b74be 1. Fixed bug in FSUB instruction 
2. Fixed bug

[ 989478 ] I-Cache and undefined Instruktions

The L4 microkernel uses an undefined instruction to
trap for a special requests into the kernel (LOCK NOP).
The handler fixes this up and gives the user a special
code page with syscall stubs. If you're not using the
I-Cache optimization everthing works find on bochs. But
if you enable the I-Cache (--enable-icache), then the
undefined opcode exception is thrown only once for ever
virtual address it occurs. See the demodisk of the
L4KA::pistachio
(http://www.l4ka.org/projects/pistachio/download.php).
In this case the pingpong benchmark of this demo is of
interest. Everything runs fine until the program tries
to spawn a new task for its measurements. This new task
shares the code of the creating program. But the new
task stops executing at the undefined instruction
explained above and no exception is thrown.
 2004-07-29 20:15:19 +00:00
Stanislav Shwartsman
50aaf8ec6f Implemented FFREEP 287+ compatability instruction 2004-07-15 19:45:33 +00:00
Stanislav Shwartsman
79b1cfdc1c removed unused code 2004-07-12 19:20:55 +00:00
Stanislav Shwartsman
ddc6c33887 BX_PANIC replaced by BX_INFO 2004-07-08 20:15:23 +00:00
Stanislav Shwartsman
02dec84af9 Fix FXSAVE/FXRSTOR instructions exceptions handling 2004-07-03 11:02:43 +00:00
Stanislav Shwartsman
cc61e5d5d5 Leave aligment in floatx80 reg to compiler. 
CPU code no longer assume that floatx80 register is 16-byte aligned
 2004-07-02 20:24:47 +00:00
Stanislav Shwartsman
2a0a361298 Implemented precision lost up indication in floating point status word 2004-06-25 18:51:28 +00:00
Stanislav Shwartsman
dfd17222b0 Changed MMX regs access macros to avoid code duplication in MMX register declaration 2004-06-23 21:59:24 +00:00
Christophe Bothamy
ba13a484b5 - replace ResetCpu and ResetSystem by Reset(BX_RESET_SOFTWARE) and Reset(BX_RESET_HARDWARE) 2004-06-21 10:39:24 +00:00
Stanislav Shwartsman
a7cad86666 clean code 2004-06-19 19:16:02 +00:00
Stanislav Shwartsman
5873b26a82 Speed up compilation process. 
bochs.h already not include iodev.h which reduces compilation dependences for almost all cpu and fpu files, now cpu files will not be recompiled if iodev includes was changed
 2004-06-19 15:20:15 +00:00
Stanislav Shwartsman
5c5b556f24 Merge softfloat-fpu-implementation_ver4_branch branch 2004-06-18 14:11:11 +00:00
Stanislav Shwartsman
e6991f043f pply patch 
[ 924428 ] ET bit mismatch between CR0 and MSW
 2004-06-03 17:57:29 +00:00
Volker Ruppert
25582ed29d - fixed cpu/Makefile.in after renaming file 
- reg_ld_str.c: fixed regparm argument (bugfix found in SuSE 9.1 sources of Bochs 2.1.1)
 2004-05-17 19:50:43 +00:00
Stanislav Shwartsman
14b70fa9ed rename fpu.cc in cpu folder 
this fixed bug
[954751] Two FPU.CPP in project
 2004-05-16 18:46:42 +00:00
Stanislav Shwartsman
4eea772270 LOADALL for cpu-level=2 in fetchdecode 2004-05-11 16:44:58 +00:00
Stanislav Shwartsman
3274e0dd12 Commit patch 
[ 950905 ] Do not PANIC on rare, bad input from user-mode
by h.johansson
with little changes and fixes
 2004-05-10 21:05:51 +00:00
Stanislav Shwartsman
279d207d45 Fix fetchdecode bugs reported by Gilbert Netzer 
(opcode patches for x86_64 cpu)
 2004-05-03 17:58:36 +00:00
Christophe Bothamy
f4dbefad66 - fix bug reported by Thomas Weidner [ 877510 ] amd64 fixes... 2004-04-28 19:57:37 +00:00
Stanislav Shwartsman
0c47a35c99 Change BX_PANIC to BX_INFO if the behaviour exactly matches Intel docs 2004-04-17 17:10:58 +00:00
Stanislav Shwartsman
c2c447d301 Change BX_PANIC to BX_INFO in BOUND instruction 2004-04-17 16:42:11 +00:00
Stanislav Shwartsman
cf6d1b8bd9 port some changes from spftfloat-fpu branch to the MT 2004-04-09 15:34:59 +00:00
Stanislav Shwartsman
6de2dbeb49 these files should not be in MT 2004-04-09 14:27:06 +00:00
Christophe Bothamy
17328faa03 - triple fault now call bx_pc_system.ResetCpus 2004-04-08 20:57:33 +00:00
Stanislav Shwartsman
33b50ec4c4 For spammers o 2004-04-08 17:17:47 +00:00
Stanislav Shwartsman
f2dc00dda3 merge patch 
[ 904549 ] imul gives incorrect result in long mode
 2004-04-07 19:46:13 +00:00
Stanislav Shwartsman
bb1271cab6 little bit clean 64b code 2004-04-07 19:23:06 +00:00
Stanislav Shwartsman
9c4fd5ff36 clean soft_int code 2004-03-26 18:41:12 +00:00
Stanislav Shwartsman
6441d290f8 speedup and fix BCD instructions 2004-03-26 12:43:19 +00:00
Stanislav Shwartsman
02d18a283f backport softfloat changes 2004-03-20 20:01:03 +00:00
Stanislav Shwartsman
78a2976b49 backport some softfloat changes to CVS 2004-03-19 18:11:10 +00:00
Stanislav Shwartsman
b7b0b604ef implement undocumented flags modifications for BCD instructions 2004-03-18 21:43:18 +00:00
Stanislav Shwartsman
cf1d0d0aaa add comments about undocumented flags modifications in BCD.CC 
we are still need to study the flags modifications
 2004-03-13 19:37:57 +00:00
Stanislav Shwartsman
967297b8a4 new version of softfloat-fpu branch 
currectly stable
 2004-03-12 20:08:50 +00:00
Stanislav Shwartsman
dfef46e311 removed unused variables 2004-03-10 20:39:47 +00:00
Stanislav Shwartsman
58a7652aea fixed problems in BCD instructions 2004-03-10 20:14:56 +00:00
Stanislav Shwartsman
8484a03394 Fixed BCD instructions to be suitable with Intel docs 2004-03-09 20:45:17 +00:00
Stanislav Shwartsman
f50f664b10 * fixed convert float2int SSE instructions (bugfix in softfloat lib) 
* set default .bochssrc IPS to 10M
 2004-03-08 05:29:14 +00:00
Stanislav Shwartsman
97135a723f floatx80 bugfixes 2004-03-05 11:39:10 +00:00
Stanislav Shwartsman
f5316dad70 fixed bug in HADDPD/HSUBPD instructions 2004-03-05 09:19:58 +00:00
Stanislav Shwartsman
652d4ca24f wouldn't elliminate aligment for now 2004-03-03 21:15:19 +00:00
Stanislav Shwartsman
1706beda30 fixed bug in floatx80_class function 
mmx code optimizations
 2004-03-03 21:09:08 +00:00
Stanislav Shwartsman
f552a1c861 Apply patches: 
907163 ctrl_xfer8 clean/speed up   2004-02-29 14:32 nobody psychosmurf
907161 clean/speed up of io.cc   2004-02-29 14:31 nobody psychosmurf
 2004-03-02 20:48:48 +00:00
Stanislav Shwartsman
6b565750b7 port changes in softfloat to main trunk 2004-02-28 09:46:46 +00:00
Stanislav Shwartsman
3f7c794b26 commit patch 
899972 data xfer performance patch V 2.0.4   2004-02-18 15:38 nobody psychosmur
 2004-02-26 19:17:40 +00:00
Stanislav Shwartsman
c2959f7685 added floatx80_compares for future use with FPU code 
fixed floatx80 prototypes
 2004-02-25 19:18:56 +00:00
Stanislav Shwartsman
9d7d634ebc add these files to main trunk later 2004-02-21 14:48:42 +00:00
Stanislav Shwartsman
adbdde37e9 merge with latest CVS 2004-02-21 14:40:39 +00:00
Stanislav Shwartsman
320ae34cb9 Fix compile error 2004-02-18 05:22:07 +00:00
Stanislav Shwartsman
c3066a44bb added functions to softfloat for future fpu implementation 2004-02-17 21:59:24 +00:00
Christophe Bothamy
e17995f5db - host asms in a specific file 
- add msvcc host asm instructions, patch by suzu
 2004-02-15 17:57:45 +00:00
Stanislav Shwartsman
cc7b85ae7e just update release dates 2004-02-13 21:27:45 +00:00
Stanislav Shwartsman
196aee98d7 Fix for FWAIT instruction 2004-02-12 21:34:28 +00:00
Christophe Bothamy
45bd1edfbf - apply patch #894595 MSR_APICBASE always returns APIC ADDRESS 0 
by Kangmo Kim
 2004-02-12 00:56:21 +00:00
Christophe Bothamy
82429b5ac5 - fixes for booting OS/2 by Dmitri Froloff 
- v8086 priveleged instruction processing bug (was also reported by
  LightCone Aug  7 2003)
  - exception process bug (was reported by Diego Henriquez Sat Nov 15
  01:16:51 CET 2003)
  - segment validation with IRET instruction
  - CS segment not present exception processing with IRET
 2004-02-11 23:47:55 +00:00
Stanislav Shwartsman
75bbf3bc5f remove duplicated include 2004-02-11 20:04:34 +00:00
Daniel Gimpelevich
5366cc369e Added Brian Huffman's Sound for OSX code with a couple of tweaks. 2004-02-09 22:23:53 +00:00
Daniel Gimpelevich
126971af49 Made to compile on MacOS9 2004-02-06 22:28:00 +00:00
Stanislav Shwartsman
c84deba786 * FNOP instruction checks for pending FPU exceptions 
* prepared softfloatx80 code for future use with FPU
 2004-02-06 12:45:43 +00:00
Christophe Bothamy
4a22763b3a - fix sign comparison whenchecking io address in the tss io bitmap 2004-02-03 02:03:24 +00:00
Stanislav Shwartsman
dd38f0b021 fixed performance bug 
aligment field changed from 32bit (unsigned) to 8bit (unsigned char) as it should be
 2004-02-01 20:19:52 +00:00
Stanislav Shwartsman
ecdbf40aac fixed compilation error for case when 3dnow! enabled and sse not 2004-01-31 17:13:05 +00:00
Stanislav Shwartsman
77cb1436fb fix bug 2004-01-31 15:11:41 +00:00
Stanislav Shwartsman
9120961241 update checking for pending FPU exceptions code 2004-01-31 13:43:26 +00:00
Michael Brown
d1922bc835 Changed #ifdef MAGIC_BREAKPOINT to #if BX_MAGIC_BREAKPOINT and added a 
configure script option --enable-magic-breakpoints (enabled by default).

Documented the instruction required to trigger the magic breakpoint
(xchgw %bx,%bx).
 2004-01-29 17:49:03 +00:00
Christophe Bothamy
be57f55969 - fix FWAIT instruction acording to intel specs 
NM exception is raised only when cr0.mp and cr0.ts are set
 2004-01-18 16:42:05 +00:00
Daniel Gimpelevich
ae66bb33c0 Applied Russ Cox's CPU panic debug patch from Oct 2003. 2004-01-17 08:36:29 +00:00
Stanislav Shwartsman
49c6fd55e4 Remove redundant ifdefs 2004-01-10 19:45:53 +00:00
Stanislav Shwartsman
f3730cd784 Implemented two last SSE instructions RSQRTSS and RSQRTPS 
MSDEV workspaces updated with new file
CPUID will detect and CPU will execute FXSAVE/FXRSTOR instructions when cpu-level-hacked=6 and not only when cpu-level=6
 2003-12-31 17:35:43 +00:00
Stanislav Shwartsman
2dae51fc3f Fixed compilation error 2003-12-30 23:14:47 +00:00
Stanislav Shwartsman
52d75d7aed Fast table-based implementation of reciprocal (RCPSS/RCPPS) 
This implemntation is much more clear than old one.
RSQRTSS/RSQRTPS coming soon.
 2003-12-30 23:06:59 +00:00
Christophe Bothamy
e7e0b40bd1 - remove calculation on cr3 in dtranslate_linear, one of the most called functions (patch by Conn Clark) 2003-12-30 22:12:45 +00:00
Christophe Bothamy
e3bec02532 - fix bug preventing x86-64 detection 2003-12-30 14:14:28 +00:00
Stanislav Shwartsman
6fe8e9260b remove redundant CPU LEVEL checks for x86-64 2003-12-29 21:47:36 +00:00
Daniel Gimpelevich
fb80d47dbf *** empty log message *** 2003-12-29 21:24:35 +00:00
Stanislav Shwartsman
be9c0aeeec Enable FXSAVE/FXRESTOR instructions for BX_HACKED_CPU_LEVEL=6 also 2003-12-29 21:23:46 +00:00
Stanislav Shwartsman
b770d809d3 Clearify disagnostic messages. 
Remove redundant cpu level checks for x86-64
 2003-12-29 21:20:58 +00:00
Stanislav Shwartsman
7deb9491da Fixed compilation error for FPU disabled case 2003-12-29 20:26:05 +00:00
Daniel Gimpelevich
68fd1dc95b cleanup optimizations & fix compile error 2003-12-29 07:28:28 +00:00
Stanislav Shwartsman
fd60a984a0 Instructions that should not check pending FPU exceptions 2003-12-28 18:58:15 +00:00
Stanislav Shwartsman
0eb71999db Added missed 287 opcodes which should be executed as NOP in 387+ 2003-12-28 18:19:41 +00:00
Stanislav Shwartsman
9ccb363ec3 bochs style decode/execute of FPU instructions. 
With this coding style each instruction could be implemented separatelly even not together with current Bochs FPU emulator.
Step-by-step I am going to transfer all FPU instructions from current Bochs FPU emulator to new style and remove an old bugged emulator.
Anyway, now I could implement all currently missed FPU instructions without hacking wm-fpu-emu.
 2003-12-27 13:50:06 +00:00
Stanislav Shwartsman
ab6b9c7dcb New table-based disassembler: 
* Fully supports
	* MMX/XMM/3DNOW instruction sets
	* FPU instruction
	* SSE3 extensions
 currently only 16/32 bit mode bug anyway, it is much better that old one ;)
 2003-12-24 20:32:59 +00:00
Daniel Gimpelevich
fff74a6f83 Fixed incompatibility with gcc3.3, I think. 2003-11-28 15:07:29 +00:00
Zwane Mwaikambo
b152c966fc remove 'const' from bx_local_apic_c::get_type declaration, fix for wrong 
class member being called in bx_generic_apic_c::deliver
 2003-11-23 02:44:15 +00:00