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1116 Commits

Author SHA1 Message Date
Stanislav Shwartsman
deab206378 More useful debug prints 2006-06-09 22:39:50 +00:00
Stanislav Shwartsman
6c3420a18b Add debug prints before any #GP excepion which only possible to be generated 2006-06-09 22:29:07 +00:00
Stanislav Shwartsman
3cb38b3c45 Indent changes 2006-06-09 21:17:26 +00:00
Stanislav Shwartsman
fea9973570 Fixed failure when running 386 simulation 2006-06-09 21:14:25 +00:00
Stanislav Shwartsman
84124f29d2 Fix FPU tos value (found with save/restore logs browsing 2006-06-08 19:56:30 +00:00
Volker Ruppert
d550d71e03 - register parameters for the wx debugger only if present (fixes memory leak) 
- removed useless static variable 'counter'
 2006-06-06 18:36:50 +00:00
Stanislav Shwartsman
1deddb9f0e Fix linking problem with debugger enabled 2006-06-06 16:46:08 +00:00
Stanislav Shwartsman
c8c5772f44 1. Fix BX_INFO message in config.cc 
2. In init.cc save and restore BX_CPU_THIS__PTR trace value, allows to enable/disable tracing using save/restore.
3. in iret.cc - cleanup3. in iret.cc - cleanup3. in iret.cc - cleanup
 2006-06-05 17:33:25 +00:00
Stanislav Shwartsman
f31e03d4cb More clear debug message 2006-06-05 16:38:43 +00:00
Stanislav Shwartsman
08d7e8e305 Fixed wrong assert_check failure found during x86-64 save/restore experiments 2006-06-05 16:36:56 +00:00
Stanislav Shwartsman
1aaf19cd09 Support for partial read/write in APIC space 2006-06-05 05:39:21 +00:00
Stanislav Shwartsman
fea15294b5 Fixed compilation error in init.cc 
Move initialization of memory object to misc_mem.cc
 2006-06-03 12:59:14 +00:00
Stanislav Shwartsman
d17eb99f76 fixed allocated physical memory limit check in memory.cc 
Force eflags before saving them - register eflags using param handlers
 2006-06-01 20:05:15 +00:00
Stanislav Shwartsman
02aa59886c Fix APIC tmr/isr/irr registers reading problem 2006-06-01 14:05:23 +00:00
Stanislav Shwartsman
32a6e4c561 Added more debug messages to apic 2006-06-01 11:59:23 +00:00
Stanislav Shwartsman
4b7e7087aa Handle more fields memory management insie the bx_param_c. 
Remove more strdups
 2006-05-30 17:01:27 +00:00
Stanislav Shwartsman
fee48d74e0 Avoid doing strdup for param name field - most of the strdups elliminated ! 2006-05-29 22:33:38 +00:00
Stanislav Shwartsman
5b912c26af Fixed save/restore of segment registers for x86-64 mode 2006-05-28 19:18:29 +00:00
Stanislav Shwartsman
286b89d763 Several x86-64 MSRs were not-initilized ! 
Fixed small save-restore bug in dma.cc
First step to make save-restore code look better (only several files processed for example)
 2006-05-28 17:07:57 +00:00
Stanislav Shwartsman
8ed9a2fa4e Use MAX_LFV_ENTRIES constant 2006-05-27 21:44:40 +00:00
Stanislav Shwartsman
0977bef9a2 Fix compilation err for x86-64 2006-05-27 16:05:30 +00:00
Stanislav Shwartsman
8b0df8e99b Merge SAVE_RESTORE branch to CVS 2006-05-27 15:54:49 +00:00
Stanislav Shwartsman
7c1767d17a Partial sync with save-restore 2006-05-27 14:02:34 +00:00
Stanislav Shwartsman
65e0fea773 functionally nothing changed 2006-05-26 17:24:36 +00:00
Stanislav Shwartsman
a4129e5341 Handle NULL_SEG_REG (no segment override) case in fetchdecode.cc 2006-05-24 20:57:37 +00:00
Stanislav Shwartsman
1acdb7f274 Simplify CPU loop and fix compilation error 2006-05-24 16:46:57 +00:00
Stanislav Shwartsman
c120d5dc70 remove unused and not required apic vars 2006-05-23 16:42:50 +00:00
Stanislav Shwartsman
a010cfb8ca Fix amount of XMM registers in non-x86-64 mode 2006-05-22 21:17:27 +00:00
Stanislav Shwartsman
8b55085c76 Merge tss286 and tss386 segment descriptor cache fields to one structure 2006-05-21 20:41:48 +00:00
Stanislav Shwartsman
d00b2dec1d LDTR and TR type check in assert_check 2006-05-21 19:31:23 +00:00
Stanislav Shwartsman
73e1266cbe Add CR0 consistency checks and CS.L/CS.D consistency check 
Optimize icache writestamps - 2x more space to decrement for page-write-stamp
 2006-05-19 20:04:33 +00:00
Stanislav Shwartsman
274e17a1fc Remove unneeded function 2006-05-18 20:16:15 +00:00
Stanislav Shwartsman
8db1de7124 - Fixed several issues, each cause to NullTimer function never be called, the method is required for icache correct functionalit 
- Speed-up icache by correct purging of Icache entries
- Several new assertions for timers, to prevent bugs in future
 2006-05-16 20:55:55 +00:00
Stanislav Shwartsman
7acb46cd3d Small cleanup in cpu.cc 2006-05-16 16:47:00 +00:00
Stanislav Shwartsman
16713b309d PALIGNR fixed 2006-05-16 16:20:26 +00:00
Stanislav Shwartsman
7c2c9c41e8 Remove unused CPU vars 2006-05-15 18:00:55 +00:00
Stanislav Shwartsman
f4c7b4074e Support for x86-64 in x86 debugger (DR0-DR7) 2006-05-13 12:49:45 +00:00
Stanislav Shwartsman
9a32d0e98f Optimize debug registers handling 2006-05-13 12:29:12 +00:00
Stanislav Shwartsman
fc799ab623 FetchDecode tables are constant. Marking them const implicitly will help to compiler/linker in optimization. 2006-05-12 18:03:26 +00:00
Stanislav Shwartsman
fe644dfcbf - Code cleanup, remove x86-64 code from functions which cannot be called from x86-64 
- Fix PANIC multiple SSE prefix decoding (fetchdecode and disasm)
- More Bit32u -> bx_phy_address convert
- Lazy flags optimization
 2006-05-12 17:04:19 +00:00
Stanislav Shwartsman
b0e49a9a05 Warn if somebody used BSWAP with 16-bit opsize (behavior undefined) 2006-05-07 20:56:40 +00:00
Stanislav Shwartsman
91ada6c72c Separate RepeatSpeedups code in io.cc to stand-alone CPU methods 
FestRepINSW and FastRepOUTSW similar to that is done in string.cc
Done to simplify the code, it was just impossible to understand it.
 2006-05-07 20:45:42 +00:00
Stanislav Shwartsman
20b14aefa6 Fix in BSWAP 64-bit mode - allow to use additional R8-R15 registers 
Also fixed code duplication story with BSWAP instruction
 2006-05-07 18:58:47 +00:00
Stanislav Shwartsman
d69eba6c07 Split in/out instructions based on operand size 2006-05-07 18:27:36 +00:00
Stanislav Shwartsman
767fb77ebd Fully handle segment limits inside prefetch method. 
1. Should speed up the simulation (eliminate seg.limit check per every instruction exec)
2. Should help for DT (h.johansson request)
 2006-05-04 19:54:25 +00:00
Volker Ruppert
9340f3b3f8 - partial sync with BRANCH_SAVE_RESTORE_3 (hardware save/restore not present yet) 
* changed data format of text files for save/restore (looks like C/C++ structures,
    similar to the format used in old save/restore branches)
  * don't set the initial value of shadow bool parameters
  * don't set the initial value of bool parameters twice
  * cpu/init.cc: missing #undef added
  * ne2k.cc: variable tx_timer_active was never set to 1 (type now bx_bool)
  * floppy.cc: missing initialization of the 'eot' array in reset() added
  * pic.h: type of member 'byte_expected' changed to Bit8u
  * pit_wrap.h: unused members removed
 2006-05-01 18:24:47 +00:00
Stanislav Shwartsman
f93ab35357 Flush TLB for all CPUs when memory mapping information changed by system (A20 change, PAM write or similar events) 2006-04-29 17:21:49 +00:00
Stanislav Shwartsman
199c987ee3 Return back (modified) dbg_is_end_instr_bpoint method in cpu.cc 2006-04-29 16:14:47 +00:00
Stanislav Shwartsman
2889ed190c Removed icount guard for debugger. Implement STEPN debugger command using CPU_LOOP method capabilities 2006-04-29 09:27:49 +00:00
Stanislav Shwartsman
1a0b7ee1e3 I want to replace debugger ICOUNT guard by existent cpu_loop funtionality, first step to do that ... 2006-04-29 07:12:13 +00:00
Stanislav Shwartsman
510cbe02e2 Make fetchInstruction INLINE according to hjjhansson patch 2006-04-28 16:45:29 +00:00
Stanislav Shwartsman
003c2f59e6 Added missed CVS header to several files 2006-04-27 15:11:45 +00:00
Stanislav Shwartsman
bb1116e569 Fixed bx_cpu_c::MOVD_EdVd () always UDs 
reported in mailing list
 2006-04-27 06:09:56 +00:00
Stanislav Shwartsman
798c90ee85 Fixed comments 2006-04-26 14:05:28 +00:00
Stanislav Shwartsman
4b86ae3917 Added new ar_byte function, might be used to fix code duplication and for save-restore 2006-04-25 15:35:26 +00:00
Stanislav Shwartsman
b2408c2fca Added assertion check CPU method, could be used for "debug mode" run with checking various assumptions before each instruction emulation 2006-04-25 14:42:57 +00:00
Stanislav Shwartsman
1939544bf8 move get_descriptor_l/get_descriptor_h methods to general cpu methods (were debugger only) 2006-04-23 17:16:27 +00:00
Stanislav Shwartsman
63dc4d4e10 Fixed CR4 GP(0) condition (patch by no_mayl in mailing list) 2006-04-23 16:11:16 +00:00
Stanislav Shwartsman
cc29f3d94b Remove duplicate ';' 2006-04-23 16:03:46 +00:00
Stanislav Shwartsman
44afbdcd82 Implemented FXSAVE/FXRSTOR for FOO/FIP/FDP fields 2006-04-23 16:01:34 +00:00
Stanislav Shwartsman
ff02bc8ef0 Fixed: 
With cvs snapshot 2006-04-09, --enable-debugger does not show the executed instructions anymore after being enabled via iodebug or "trace on".
 2006-04-23 15:37:25 +00:00
Volker Ruppert
52c4666465 - partial sync with BRANCH_SAVE_RESTORE_3 (hardware save/restore not present yet) 
* fixed minimum limit of signed variable types
  * don't set the initial value of shadow parameters
  * fixed range check for shadow parameters
  * added support for setting the value base (decimal/hex) of numeric shadow parameters.
    The text format hex number is now initialized in the constructor
  * added missing newline after filename for binary data
  * fixed data size of 64-bit shadow parameters
  * fixed save/restore output format of numeric parameters (signed/unsigned/64-bit)
  * cpu/init.cc: fixed macro name and added missing #undef line
 2006-04-22 18:14:55 +00:00
Volker Ruppert
eb2104d0de - parameters for the wx debugger moved to a separate subtree to avoid conflicts 
with the proposed save/restore feature
- fixed a warning in the cpu parameter handler for the wx debugger
 2006-04-16 10:12:32 +00:00
Stanislav Shwartsman
d972e4a4b7 Fixed CR3 restore in RSM instruction 
Added HALT state indication (actually make existant one working for single CPU)
 2006-04-10 19:05:21 +00:00
Stanislav Shwartsman
e7565760f7 Fixed compilation error when DEBUGGER is enabled 2006-04-07 20:53:39 +00:00
Stanislav Shwartsman
45f30f0a4c some code written to enter CPU to shutdown state. 
finally the shutdown handling should be done exactly as in VmWare - the GUI should ask user if the CPU should reset and go to HLT/IF=0 if user choosed to stay in shutdown mode.
CPU configure option reset-on-triple-failt should be extended to shutdown-reset=0|1
small code cleanups and fixes
 2006-04-07 20:47:32 +00:00
Stanislav Shwartsman
7a1d0a53d7 Small cleanup 2006-04-06 18:45:54 +00:00
Stanislav Shwartsman
03eac64013 Added decoding of new SSE4 instructions (recently published in Intel docs) 
At least CPUID detects them correctly
The code is never tested (still) ! (but should work fine)
 2006-04-06 18:30:05 +00:00
Stanislav Shwartsman
c8cc6bcd14 Remove code duplication from SMM code 2006-04-06 16:47:29 +00:00
Stanislav Shwartsman
9dc1790f07 Simplify and optimize fetchdecode methods. 
Now fetchdecode is simpler to understand and easier to modify, for example to support 3-byte opcodes (SSE4)
 2006-04-05 20:52:40 +00:00
Stanislav Shwartsman
b9dedc8412 Added missed file from prev commit (waiting for moderator approval, message is too big) 
Summary changes:
- Fixed critical ICACHE bug from one of the recent commits
- Complete preliminary SMM implemntation, SMI still PANICs but 'alwayscont' should work fine
- Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
- Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
- Fixed ENTER and LEAVE instructions in x86-64 mode
- Disasm SSE4 instructions
- Rename PNI->SSE3 everywhere in the code
 2006-04-05 17:44:04 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash: 
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
 2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
a6c3ffeeb5 Fixed compilation error 2006-03-29 19:16:24 +00:00
Stanislav Shwartsman
ae2ea87c43 More fixes for SMM 2006-03-29 18:08:13 +00:00
Stanislav Shwartsman
4fd9bd53c3 Change Bit32u -> bx_phy_address in memory 2006-03-28 16:53:02 +00:00
Stanislav Shwartsman
42aac37624 Fixed complilation error 2006-03-27 20:09:37 +00:00
Stanislav Shwartsman
da3d26d7f4 Preliminary implemntation of SMM save statei 
Fixed fetchModeMask for load32bitOsStack
 2006-03-27 18:02:07 +00:00
Stanislav Shwartsman
b8be848943 Use access_type param in getHostMemAddr, less efficient but no copy-paste at least 2006-03-26 19:39:37 +00:00
Stanislav Shwartsman
5c3fba4399 Support access to SMRAM in memory object 
Cleanup in CPU code
 2006-03-26 18:58:01 +00:00
Stanislav Shwartsman
f347ab97bf Fixed CALL/JMP far through call gate 64 
Decode SWAPGS and RDTSCP instructions
Indent changes in fetchdecode
 2006-03-22 20:47:11 +00:00
Stanislav Shwartsman
d6f85c12f6 NMI support inside the CPU. 
Added two functions to query NMI and SMI from Bochs debugger.
In future they could be used for generating NMI or SMI by user request using GUI button (could be implemented separatelly later and under configure-time or .bocshrc option)
 2006-03-16 20:24:09 +00:00
Stanislav Shwartsman
a64b16391d Remove unused vars 2006-03-15 17:57:11 +00:00
Stanislav Shwartsman
e85a90a720 Remove cpu.h -> devices.cc dependancy, kill_bochs_request moved from CPU to bx_pc_system 
Small Icache simplification and speedup
 2006-03-14 18:11:22 +00:00
Volker Ruppert
9699eaeca4 - added SMP support in save/restore parameter subtree 
- TODO: implement tab window control for SMP CPUs in wx "show cpu" dialog
 2006-03-09 20:16:17 +00:00
Stanislav Shwartsman
d74f1b9a43 Fixed bug in ENTER instruction in long mode 2006-03-08 18:21:16 +00:00
Volker Ruppert
5597fc9cf3 - fixed wx "Show CPU" dialog to make it work with the new parameter handling 
- fixed CPU register names
- removed old parameter handling (bx_id, BXP_* symbols, param_registry, etc.)
 2006-03-08 18:10:41 +00:00
Volker Ruppert
575a17e50f - converted cpu state parameters to param-tree style 
- removed old-style parameter init methods
- NOTE: the wx CPU registers dialog (debugger) currently reports nothing
- TODO: fix wx CPU registers dialog, remove remaining bx_id related stuff
 2006-03-07 20:32:07 +00:00
Stanislav Shwartsman
da0b2ac377 Update dependencies for iodev and root project folders. 
Fixed compilation errors for 386 case
Added file header for slowdown_timer.h
 2006-03-06 22:32:03 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU 
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
 2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
fc0894bbe1 Enable A20 after system reset 2006-03-04 16:58:10 +00:00
Stanislav Shwartsman
93898e11b2 Missed } 2006-03-04 09:24:31 +00:00
Stanislav Shwartsman
324d75e749 Fix another broking change 2006-03-04 09:22:55 +00:00
Stanislav Shwartsman
e297df457a Roll back the try to move Local APIC memory access to CPU. 
It was fast and fine but had serious correctness problems with RMW apic access
 2006-03-02 23:16:13 +00:00
Stanislav Shwartsman
6d513ed6f2 Fix indent corruption 2006-03-02 20:17:54 +00:00
Stanislav Shwartsman
6c392e7f3f optimize apic code 2006-03-02 20:09:21 +00:00
Stanislav Shwartsman
7cc8bc0836 Clean and optimize 2006-03-02 17:39:10 +00:00
Stanislav Shwartsman
5fad793989 move local apic handling to the access_linear function for the memory class. 
speedup the whole simulation by 2% !
 2006-03-01 22:32:24 +00:00
Stanislav Shwartsman
9b3be40d88 Improve OS/2 hack - save full segment (including hidden part) and not only selector value 2006-02-28 20:29:03 +00:00
Stanislav Shwartsman
a527b2cfca first smm - implement cpu state when switching to SMM 
smm coming soon
fixed code duplication in init.cc
 2006-02-28 19:50:08 +00:00
Stanislav Shwartsman
55ceecf79b Small optimization in icache page-write-stamp 2006-02-28 17:47:33 +00:00
Stanislav Shwartsman
24077c071b Fixed exception generated when accessing memory w/o right permissions 2006-02-26 21:44:03 +00:00
Stanislav Shwartsman
83bb20b6f9 Diagnostic message for possible bug in exception.cc 2006-02-24 09:49:03 +00:00
Stanislav Shwartsman
79306b851c Separate fetch/decode instruction block to stand-alone method. 
The method could be reused when building instruction trace for DT
 2006-02-23 18:23:31 +00:00
Stanislav Shwartsman
0150904e9d Improve debug messages and optimize 2006-02-22 20:58:16 +00:00
Stanislav Shwartsman
8ba6c1178a Fixed PANIC in CMPxx SSE instructions 2006-02-22 20:20:21 +00:00
Stanislav Shwartsman
7cfa31492c Removed --enable-pni configure option, to compile with PNI use 
--enable-sse=3 instead (Stanislav Shwartsman)
 2006-02-20 19:28:57 +00:00
Volker Ruppert
a4bc4cc9e0 - fixed cpu parameter handling in SMP mode 2006-02-18 17:28:18 +00:00
Volker Ruppert
2a6261fba7 - cpu options rewritten to a parameter tree 
- boolean parameter type now supports new parameter handling
- new parameter object constructors now supports label initialization
- bx_list_c constructor now supports title initialization
- textconfig: initial support for new parameter handling
- wx: missing CPU config dialog added
- wx: ParamDialog now handles disabled parameters correctly
- removed unnecessary spaces from function calls
 2006-02-18 16:53:18 +00:00
Stanislav Shwartsman
5c58b22f44 Fixed opcode names according to Intel docs 
Fixed bug found during disasm validation
 2006-02-17 13:34:31 +00:00
Stanislav Shwartsman
b966703504 print CPU mode correctly again 2006-02-14 20:14:18 +00:00
Stanislav Shwartsman
203a9caf31 SMM mode could leave together with pmode or any other (according to amd docs) 
so we need separate bx_bool indicator in_smm instead
 2006-02-14 20:03:14 +00:00
Stanislav Shwartsman
024ce249bf Define SMM mode for future implementation. 
I would like all next commits be aware of SMM mode.
It can't be implemented right now (too many questions w/o answers) but it will be done till next major release definitelly.
 2006-02-14 19:00:08 +00:00
Stanislav Shwartsman
2646484dc1 Fix 'show' command in Boch debugger. 
Fully supported show-interrupts, show-mode and show-call options
Enable toggling of show options (bug report from SF)
 2006-02-12 20:21:36 +00:00
Stanislav Shwartsman
0bf03f370d Support for DC and HT in SMP configurations 
Extended format of CPU::COUNT .bochsrc option to define number of core/threads
 2006-02-11 15:28:43 +00:00
Stanislav Shwartsman
9b451f43e2 Save/restore RIP/RSP only on FAULT type exceptions, not on traps 2006-02-11 09:08:02 +00:00
Stanislav Shwartsman
5a65e1065e Decoding functionality for Bochs disassembler. 
Fixed 'step over' debugger command using bx_dbg_read_linear method.
Small debugger fix in cpu.cc
 2006-02-05 19:48:29 +00:00
Stanislav Shwartsman
9a15f59e05 Fixed bug in SYSRET legacy mode 2006-02-02 17:55:48 +00:00
Stanislav Shwartsman
6ca296de8b Move --enable-reset-on-triple-fault option to runtime CPU::reste_on_triple-fault option in .bocshrc 
Cleanup and optimize parser for debugger
 2006-02-01 18:12:08 +00:00
Stanislav Shwartsman
1d4fa8b327 Available back ability to use eip register as source in 'set reg = <expr>' cmd. 
Setting the eip register still not available (deliberatelly).
I don't want to enable it util I find some easy interface to do it.
I don't want to allow setting of part of RIP register using 'set eip=<expr>' and leave the upper part unchanged ....

Remove unused test registres from debugger
Fix compilation error in cpu.h
Change trace-on/trace-off commands. Make one 'trace' command with usage of 'trace on/trace off'
 2006-01-31 19:45:34 +00:00
Stanislav Shwartsman
24c27deae8 Recognize XF exception (0x13) when SSE is enabled 2006-01-31 17:41:08 +00:00
Stanislav Shwartsman
067f23e3da Fix set 'ah,bh,ch,dh' registers from debugger 
Enable disasm by default - in adds some useful information to debug messages in log file
Remove defines for 8bit registers from cpu.h, the x86 arch defines not match defines used by set_reg and get_reg methods.
 2006-01-27 19:50:00 +00:00
Stanislav Shwartsman
37eb82c69c Totally remove the cosimulation code from Bochs. 
The Bochs anyway even doesn't compile if cosimulation configured enabled.
But in the same time the cosimulation code only disturbs to the future development of Bochs debugger, for example adding x86-64 functionality ...
For those of you who still may want to see the cosimulation code inside I put it in patch and upload it Bochs CVS patches folder. Read comments for the patch ! ----------------------------------------------------------------------
 2006-01-25 22:20:00 +00:00
Stanislav Shwartsman
83b4f7ba05 1. remove the ability of using regnames as symbols ! 
'set $eax = <value>' is stupid when you could do expr like 'set eax = ebx + 4'

2. cleanup and optimize Bochs debugger parsing, fixed several memory leaks
 2006-01-25 18:13:44 +00:00
Stanislav Shwartsman
d257f548b9 1. implemented 'set register <name>=<expr>' command, old style 'registers <name>=<exp> command' removed, now 'r|reg|regs|registers' command shows CPU registers contents (same as 'info cpu') 
2. new command 'u|disasm|disassemble mode-switch' - switch between Intel and AT&T disasm syntax

3. new command 'u|disasm|disassemble size=n' should be used instead of old 'set $disassembler_size=n'

4. 'h' is a new alias for 'help' command
 2006-01-24 21:37:37 +00:00
Stanislav Shwartsman
f9cad8d272 Remove debug printf 2006-01-24 19:07:45 +00:00
Stanislav Shwartsman
18afa9fd2d This is cumulative patch for bochs debugger, it is only very first step towards working debugger supporting all new simulator functionalitieS. 
- move crc.cc from debugger to bochs folder and make it projct-wide and not local for debugger
 - added new 'info sse' command for debugger
 - extend 'modebp' command to break on any mode change
 - remove unimplemened 'info program' function, it is always printed fixed text
 - move debugger help to parser, cleanup and simplify it
 2006-01-24 19:03:55 +00:00
Stanislav Shwartsman
21352e50a9 Fix some bugs in debugger parser, cleanup 
Add some debugger functionality
 2006-01-23 21:44:44 +00:00
Stanislav Shwartsman
5a5854c684 Missed ; 2006-01-22 18:18:19 +00:00
Stanislav Shwartsman
de9be40256 Fixed ROL/ROR flags anomaly (h.johansson) 2006-01-22 18:17:27 +00:00
Stanislav Shwartsman
9df8079206 Write to MSR_TSC implemented (patch by Bryce) 2006-01-21 12:06:03 +00:00
Stanislav Shwartsman
08c15c67c0 Don't know how much it helps ... 
First step to make bx debugger supporting x86-64. guard_found object fields conerted to bx_address for x86-64 support.
 2006-01-19 18:32:39 +00:00
Stanislav Shwartsman
90f899fd16 Fix bug in PMULUDQ SSE instruction 2006-01-18 18:39:17 +00:00
Stanislav Shwartsman
2c8f6f7720 Merged patch: determine number of processors to emulate through .bochsrc 2006-01-18 18:35:38 +00:00
Stanislav Shwartsman
c8cd1f805a Enabled LAHF/SAHF for x86-64 mode 2006-01-17 19:50:42 +00:00
Stanislav Shwartsman
c92aba3776 Using back tracking in CVS I found the reason why CVS sources not compiled with configure --enable-debugger configuration (reported by Brendan). 
Again it is andom change which cause to debugger not to compile ;(
This is definitelly GCC bug !
 2006-01-17 07:58:11 +00:00
Stanislav Shwartsman
7bf51e48db Print FS_MSR_BASE and GS_MSR_BASE to debug registers dump (requested in bug report [ 1406387 ] JMP instruction should display absolute address) 
Fixed fetch mode mask initialization (bug report 1400027  Boundary instruction cache error for uninitialized memory)
For safety only - everytime when changing CS register update fetch mode mask.
Actually it need to be updated everytime when there is a chance for execute mode change or 16/32 bit mode change.
 2006-01-16 19:22:28 +00:00
Stanislav Shwartsman
76ac076d52 Print R8-R15 in registers dump 2006-01-15 18:14:16 +00:00
Stanislav Shwartsman
652ce3c0dc Fix for bug report: 
bochs-Bugs-1406383 ] Local APIC TPR is ignored due to signed/unsigned mismatch
 2006-01-15 17:38:40 +00:00
Stanislav Shwartsman
a74b63eb3d Allow writing PCE to CR4 2006-01-13 11:11:29 +00:00
Stanislav Shwartsman
d7d2de421f Remove code duplication in CPU and memory objects initialization 2006-01-11 18:22:12 +00:00
Stanislav Shwartsman
5899932f0c Merge APIC patch to the CVS. 
- Fix lowest priority interrupt delivery from I/O APIC
 - XAPIC support
 - Implemented APIC bus functionality
 - cleanup APIC code
 2006-01-10 06:13:26 +00:00
Stanislav Shwartsman
89e3472178 Fix validate_seg_regs check 2006-01-09 19:34:52 +00:00
Stanislav Shwartsman
393a653fb4 Fix typo 2006-01-05 21:40:07 +00:00
Stanislav Shwartsman
b07e698b3e Initialize CPU and APIC after the bx_pc_system object 2006-01-05 21:39:11 +00:00
Volker Ruppert
97e1f39d8f - I/O APIC signal handling rewritten ("backported" from qemu) 
- don't flood the logfile if APIC EOI has no effect
- fixed a warning in the APIC code
- TODO: fix IRQ 0 handling, implement ExtINT
 2006-01-01 11:33:06 +00:00
Stanislav Shwartsman
6ff8fccfc4 Fixed cross-segment boundary check, when instruction ends on the segment boundary it should generate GP(0) 2005-12-28 19:18:50 +00:00
Stanislav Shwartsman
9e4a3675d3 Cleanup APIC code 
Fixed APIC timer problem (too many registered timers) reported by Brendan
 2005-12-26 19:42:09 +00:00
Stanislav Shwartsman
279c67ae37 Fix debug message 2005-12-23 14:24:47 +00:00
Stanislav Shwartsman
dfc633ef0a New debug function in cpu 2005-12-19 17:58:08 +00:00
Stanislav Shwartsman
cd2a8da34c Add more debugging/instrumentation functionality 2005-12-14 20:05:40 +00:00