move get_descriptor_l/get_descriptor_h methods to general cpu methods (were debugger only)

This commit is contained in:
Stanislav Shwartsman 2006-04-23 17:16:27 +00:00
parent d77c4d27cd
commit 1939544bf8
3 changed files with 136 additions and 136 deletions

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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: cpu.h,v 1.279 2006-04-10 19:05:21 sshwarts Exp $
// $Id: cpu.h,v 1.280 2006-04-23 17:16:26 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -2655,8 +2655,6 @@ public: // for now...
BX_SMF Bit32u dbg_get_reg(unsigned reg);
BX_SMF bx_bool dbg_get_sreg(bx_dbg_sreg_t *sreg, unsigned sreg_no);
BX_SMF unsigned dbg_query_pending(void);
BX_SMF Bit32u dbg_get_descriptor_l(bx_descriptor_t *);
BX_SMF Bit32u dbg_get_descriptor_h(bx_descriptor_t *);
BX_SMF bx_bool dbg_is_begin_instr_bpoint(Bit16u cs, bx_address eip, bx_address laddr, bx_bool is_32, bx_bool is_64);
BX_SMF bx_bool dbg_is_end_instr_bpoint(Bit16u cs, bx_address eip, bx_address laddr, bx_bool is_32, bx_bool is_64);
#endif
@ -2841,7 +2839,9 @@ public: // for now...
BX_SMF bx_bool allow_io(Bit16u addr, unsigned len);
BX_SMF void parse_selector(Bit16u raw_selector, bx_selector_t *selector) BX_CPP_AttrRegparmN(2);
BX_SMF void parse_descriptor(Bit32u dword1, Bit32u dword2, bx_descriptor_t *temp) BX_CPP_AttrRegparmN(3);
BX_SMF Bit16u get_segment_ar_data(bx_descriptor_t *d) BX_CPP_AttrRegparmN(1);
BX_SMF Bit32u get_descriptor_l(const bx_descriptor_t *);
BX_SMF Bit32u get_descriptor_h(const bx_descriptor_t *);
BX_SMF Bit16u get_segment_ar_data(const bx_descriptor_t *d) BX_CPP_AttrRegparmN(1);
BX_SMF bx_bool set_segment_ar_data(bx_segment_reg_t *seg, Bit16u raw_selector,
bx_address base, Bit32u limit, Bit16u ar_data);
BX_SMF void load_ldtr(bx_selector_t *selector, bx_descriptor_t *descriptor);

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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: debugstuff.cc,v 1.65 2006-04-07 20:53:39 sshwarts Exp $
// $Id: debugstuff.cc,v 1.66 2006-04-23 17:16:27 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -292,7 +292,7 @@ bx_bool BX_CPU_C::dbg_set_reg(unsigned reg, Bit32u val)
current_sys_bits = ((BX_CPU_THIS_PTR getB_NT()) << 14) |
(BX_CPU_THIS_PTR get_IOPL () << 12) |
((BX_CPU_THIS_PTR getB_TF()) << 8);
if ( current_sys_bits != (val & 0x0000f100) ) {
if (current_sys_bits != (val & 0x0000f100)) {
BX_INFO(("dbg_set_reg: can not modify NT, IOPL, or TF."));
return(0);
}
@ -372,123 +372,13 @@ unsigned BX_CPU_C::dbg_query_pending(void)
return(ret);
}
Bit32u BX_CPU_C::dbg_get_descriptor_l(bx_descriptor_t *d)
{
Bit32u val;
if (d->valid == 0) {
return(0);
}
if (d->segment) {
val = ((d->u.segment.base & 0xffff) << 16) |
(d->u.segment.limit & 0xffff);
return(val);
}
else {
switch (d->type) {
case 0: // Reserved (not defined)
BX_ERROR(("#get_descriptor_l(): type %d not finished", d->type));
return(0);
case BX_SYS_SEGMENT_AVAIL_286_TSS:
case BX_SYS_SEGMENT_BUSY_286_TSS:
val = ((d->u.tss286.base & 0xffff) << 16) |
(d->u.tss286.limit & 0xffff);
return(val);
case BX_SYS_SEGMENT_LDT:
val = ((d->u.ldt.base & 0xffff) << 16) | d->u.ldt.limit;
return(val);
case BX_SYS_SEGMENT_AVAIL_386_TSS:
case BX_SYS_SEGMENT_BUSY_386_TSS:
val = ((d->u.tss386.base & 0xffff) << 16) |
(d->u.tss386.limit & 0xffff);
return(val);
default:
BX_ERROR(("#get_descriptor_l(): type %d not finished", d->type));
return(0);
}
}
}
Bit32u BX_CPU_C::dbg_get_descriptor_h(bx_descriptor_t *d)
{
Bit32u val;
if (d->valid == 0) {
return(0);
}
if (d->segment) {
val = (d->u.segment.base & 0xff000000) |
((d->u.segment.base >> 16) & 0x000000ff) |
(d->u.segment.executable << 11) |
(d->u.segment.c_ed << 10) |
(d->u.segment.r_w << 9) |
(d->u.segment.a << 8) |
(d->segment << 12) |
(d->dpl << 13) |
(d->p << 15) |
(d->u.segment.limit & 0xf0000) |
(d->u.segment.avl << 20) |
#if BX_SUPPORT_X86_64
(d->u.segment.l << 21) |
#endif
(d->u.segment.d_b << 22) |
(d->u.segment.g << 23);
return(val);
}
else {
switch (d->type) {
case 0: // Reserved (not yet defined)
BX_ERROR(("#get_descriptor_h(): type %d not finished", d->type));
return(0);
case BX_SYS_SEGMENT_AVAIL_286_TSS:
case BX_SYS_SEGMENT_BUSY_286_TSS:
val = ((d->u.tss286.base >> 16) & 0xff) |
(d->type << 8) |
(d->dpl << 13) |
(d->p << 15);
return(val);
case BX_SYS_SEGMENT_LDT:
val = ((d->u.ldt.base >> 16) & 0xff) |
(d->type << 8) |
(d->dpl << 13) |
(d->p << 15) |
(d->u.ldt.base & 0xff000000);
return(val);
case BX_SYS_SEGMENT_AVAIL_386_TSS:
case BX_SYS_SEGMENT_BUSY_386_TSS:
val = ((d->u.tss386.base >> 16) & 0xff) |
(d->type << 8) |
(d->dpl << 13) |
(d->p << 15) |
(d->u.tss386.limit & 0xf0000) |
(d->u.tss386.avl << 20) |
(d->u.tss386.g << 23) |
(d->u.tss386.base & 0xff000000);
return(val);
default:
BX_ERROR(("#get_descriptor_h(): type %d not finished", d->type));
return(0);
}
}
}
bx_bool BX_CPU_C::dbg_get_sreg(bx_dbg_sreg_t *sreg, unsigned sreg_no)
{
if (sreg_no > 5)
return(0);
sreg->sel = BX_CPU_THIS_PTR sregs[sreg_no].selector.value;
sreg->des_l = dbg_get_descriptor_l(&BX_CPU_THIS_PTR sregs[sreg_no].cache);
sreg->des_h = dbg_get_descriptor_h(&BX_CPU_THIS_PTR sregs[sreg_no].cache);
sreg->des_l = get_descriptor_l(&BX_CPU_THIS_PTR sregs[sreg_no].cache);
sreg->des_h = get_descriptor_h(&BX_CPU_THIS_PTR sregs[sreg_no].cache);
sreg->valid = BX_CPU_THIS_PTR sregs[sreg_no].cache.valid;
return(1);
}
@ -508,43 +398,43 @@ bx_bool BX_CPU_C::dbg_get_cpu(bx_dbg_cpu_t *cpu)
cpu->eflags = BX_CPU_THIS_PTR read_eflags();
cpu->cs.sel = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
cpu->cs.des_l = dbg_get_descriptor_l(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache);
cpu->cs.des_h = dbg_get_descriptor_h(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache);
cpu->cs.des_l = get_descriptor_l(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache);
cpu->cs.des_h = get_descriptor_h(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache);
cpu->cs.valid = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.valid;
cpu->ss.sel = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value;
cpu->ss.des_l = dbg_get_descriptor_l(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache);
cpu->ss.des_h = dbg_get_descriptor_h(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache);
cpu->ss.des_l = get_descriptor_l(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache);
cpu->ss.des_h = get_descriptor_h(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache);
cpu->ss.valid = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.valid;
cpu->ds.sel = BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value;
cpu->ds.des_l = dbg_get_descriptor_l(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache);
cpu->ds.des_h = dbg_get_descriptor_h(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache);
cpu->ds.des_l = get_descriptor_l(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache);
cpu->ds.des_h = get_descriptor_h(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache);
cpu->ds.valid = BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.valid;
cpu->es.sel = BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value;
cpu->es.des_l = dbg_get_descriptor_l(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache);
cpu->es.des_h = dbg_get_descriptor_h(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache);
cpu->es.des_l = get_descriptor_l(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache);
cpu->es.des_h = get_descriptor_h(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache);
cpu->es.valid = BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.valid;
cpu->fs.sel = BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value;
cpu->fs.des_l = dbg_get_descriptor_l(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache);
cpu->fs.des_h = dbg_get_descriptor_h(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache);
cpu->fs.des_l = get_descriptor_l(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache);
cpu->fs.des_h = get_descriptor_h(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache);
cpu->fs.valid = BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.valid;
cpu->gs.sel = BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value;
cpu->gs.des_l = dbg_get_descriptor_l(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache);
cpu->gs.des_h = dbg_get_descriptor_h(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache);
cpu->gs.des_l = get_descriptor_l(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache);
cpu->gs.des_h = get_descriptor_h(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache);
cpu->gs.valid = BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.valid;
cpu->ldtr.sel = BX_CPU_THIS_PTR ldtr.selector.value;
cpu->ldtr.des_l = dbg_get_descriptor_l(&BX_CPU_THIS_PTR ldtr.cache);
cpu->ldtr.des_h = dbg_get_descriptor_h(&BX_CPU_THIS_PTR ldtr.cache);
cpu->ldtr.des_l = get_descriptor_l(&BX_CPU_THIS_PTR ldtr.cache);
cpu->ldtr.des_h = get_descriptor_h(&BX_CPU_THIS_PTR ldtr.cache);
cpu->ldtr.valid = BX_CPU_THIS_PTR ldtr.cache.valid;
cpu->tr.sel = BX_CPU_THIS_PTR tr.selector.value;
cpu->tr.des_l = dbg_get_descriptor_l(&BX_CPU_THIS_PTR tr.cache);
cpu->tr.des_h = dbg_get_descriptor_h(&BX_CPU_THIS_PTR tr.cache);
cpu->tr.des_l = get_descriptor_l(&BX_CPU_THIS_PTR tr.cache);
cpu->tr.des_h = get_descriptor_h(&BX_CPU_THIS_PTR tr.cache);
cpu->tr.valid = BX_CPU_THIS_PTR tr.cache.valid;
cpu->gdtr.base = BX_CPU_THIS_PTR gdtr.base;

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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: segment_ctrl_pro.cc,v 1.58 2006-04-05 17:31:32 sshwarts Exp $
// $Id: segment_ctrl_pro.cc,v 1.59 2006-04-23 17:16:27 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -315,9 +315,119 @@ BX_CPU_C::parse_selector(Bit16u raw_selector, bx_selector_t *selector)
}
#endif
Bit32u BX_CPU_C::get_descriptor_l(const bx_descriptor_t *d)
{
Bit32u val;
if (d->valid == 0) {
return(0);
}
if (d->segment) {
val = ((d->u.segment.base & 0xffff) << 16) |
(d->u.segment.limit & 0xffff);
return(val);
}
else {
switch (d->type) {
case 0: // Reserved (not defined)
BX_ERROR(("#get_descriptor_l(): type %d not finished", d->type));
return(0);
case BX_SYS_SEGMENT_AVAIL_286_TSS:
case BX_SYS_SEGMENT_BUSY_286_TSS:
val = ((d->u.tss286.base & 0xffff) << 16) |
(d->u.tss286.limit & 0xffff);
return(val);
case BX_SYS_SEGMENT_LDT:
val = ((d->u.ldt.base & 0xffff) << 16) | d->u.ldt.limit;
return(val);
case BX_SYS_SEGMENT_AVAIL_386_TSS:
case BX_SYS_SEGMENT_BUSY_386_TSS:
val = ((d->u.tss386.base & 0xffff) << 16) |
(d->u.tss386.limit & 0xffff);
return(val);
default:
BX_PANIC(("#get_descriptor_l(): type %d not finished", d->type));
return(0);
}
}
}
Bit32u BX_CPU_C::get_descriptor_h(const bx_descriptor_t *d)
{
Bit32u val;
if (d->valid == 0) {
return(0);
}
if (d->segment) {
val = (d->u.segment.base & 0xff000000) |
((d->u.segment.base >> 16) & 0x000000ff) |
(d->u.segment.executable << 11) |
(d->u.segment.c_ed << 10) |
(d->u.segment.r_w << 9) |
(d->u.segment.a << 8) |
(d->segment << 12) |
(d->dpl << 13) |
(d->p << 15) |
(d->u.segment.limit & 0xf0000) |
(d->u.segment.avl << 20) |
#if BX_SUPPORT_X86_64
(d->u.segment.l << 21) |
#endif
(d->u.segment.d_b << 22) |
(d->u.segment.g << 23);
return(val);
}
else {
switch (d->type) {
case 0: // Reserved (not yet defined)
BX_ERROR(("#get_descriptor_h(): type %d not finished", d->type));
return(0);
case BX_SYS_SEGMENT_AVAIL_286_TSS:
case BX_SYS_SEGMENT_BUSY_286_TSS:
val = ((d->u.tss286.base >> 16) & 0xff) |
(d->type << 8) |
(d->dpl << 13) |
(d->p << 15);
return(val);
case BX_SYS_SEGMENT_LDT:
val = ((d->u.ldt.base >> 16) & 0xff) |
(d->type << 8) |
(d->dpl << 13) |
(d->p << 15) |
(d->u.ldt.base & 0xff000000);
return(val);
case BX_SYS_SEGMENT_AVAIL_386_TSS:
case BX_SYS_SEGMENT_BUSY_386_TSS:
val = ((d->u.tss386.base >> 16) & 0xff) |
(d->type << 8) |
(d->dpl << 13) |
(d->p << 15) |
(d->u.tss386.limit & 0xf0000) |
(d->u.tss386.avl << 20) |
(d->u.tss386.g << 23) |
(d->u.tss386.base & 0xff000000);
return(val);
default:
BX_PANIC(("#get_descriptor_h(): type %d not finished", d->type));
return(0);
}
}
}
#if BX_CPU_LEVEL >= 3
Bit16u BX_CPP_AttrRegparmN(1)
BX_CPU_C::get_segment_ar_data(bx_descriptor_t *d) // used for SMM
BX_CPU_C::get_segment_ar_data(const bx_descriptor_t *d) // used for SMM
{
Bit16u val = 0;