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255 Commits

Author SHA1 Message Date
Stanislav Shwartsman
5d66e8450e implemented ADCX/ADOX instructions from rev013 of arch extensions published by Intel 2012-07-12 14:51:54 +00:00
Stanislav Shwartsman
bb7a648d91 Major commit ! 
------------

Implemented SVN nested paging support - the Virtual Box boots perfectly with Nested Paging guest !
A lot of code duplication was added for now - major cleanup will follow later.

! Added AMD Phenom X3 8650 (Toliman) configuration to the CPUDB - this configuration has Nested Paging enabled.

Some CPUID modules rework done to enable Toliman configuration.

Ckean up 'executable' attribute from all CPU source files.
 2012-02-13 23:29:01 +00:00
Stanislav Shwartsman
abda3a967c added two AMD CPUs to CPUDB 2011-12-29 14:23:22 +00:00
Stanislav Shwartsman
75bda1d5cd implemented SVM emulation support for Bochs (incomplete yet) 
I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation.
Of course SVM emulation is incomplete, completely untested and not expected to work.
But someone could already take a look one the code and give some suggestions.

Also looking for anybody with existing SVM kernels - as simple as possible - for testing.

Status:
 - exceptions intercept is not implemented yet
 - IO intercept is not implemented yet
 - MSR intercept is not implemented yet
 - virtual interrupts are not implemented yet
 - CPUID is not implemented yet

No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
 2011-12-25 19:35:29 +00:00
Stanislav Shwartsman
06e88c4984 fixed uninitialized var 2011-11-26 18:38:43 +00:00
Stanislav Shwartsman
62b811e48f disasm: correctly handle VEX and XOP based opcodes 2011-11-23 19:43:50 +00:00
Stanislav Shwartsman
7158cf7228 fixed xop opcodes disasm tables 2011-11-23 16:44:38 +00:00
Stanislav Shwartsman
9be8552b80 - Implemented VM Functions support and EPTP-Switching VM Functions 
- Added VMEXIT conditions for INVPCID instruction

Now Bochs is fully aligned with latest pulished Intel's SDM rev040.
 2011-11-05 07:31:51 +00:00
Stanislav Shwartsman
42a0a178eb disasm for XOP instructions 2011-10-30 08:58:49 +00:00
Stanislav Shwartsman
5cc04b9955 Implemented AMDs Buldozer XOP and TBM extensions. 
XOP: few instructions are still missing, coming soon

  BX_PANIC(("VPERMILPS_VpsHpsWpsVIbR: not implemented yet"));
  BX_PANIC(("VPERMILPD_VpdHpdWpdVIbR: not implemented yet"));
  BX_PANIC(("VPMADCSSWD_VdqHdqWdqVIbR: not implemented yet"));
  BX_PANIC(("VPMADCSWD_VdqHdqWdqVIbR: not implemented yet"));
  BX_PANIC(("VFRCZPS_VpsWpsR: not implemented yet"));
  BX_PANIC(("VFRCZPD_VpdWpdR: not implemented yet"));
  BX_PANIC(("VFRCZSS_VssWssR: not implemented yet"));
  BX_PANIC(("VFRCZSD_VsdWsdR: not implemented yet"));
 2011-10-19 20:54:04 +00:00
Stanislav Shwartsman
aad57310c2 disasm for FMA4, better dbg print SSE rounding control with MXCSR 2011-10-06 20:33:10 +00:00
Stanislav Shwartsman
e3dae7adb1 added disasm for avx fma instructions 2011-09-29 19:50:27 +00:00
Stanislav Shwartsman
8c7a60b3cb fixed typo in sse4a disasm 2011-09-20 15:15:02 +00:00
Stanislav Shwartsman
50207eeb90 - Added support for AMD SSE4A emulation, the instructions can be enabled 
using .bochsrc CPUID option.
 2011-09-18 16:18:22 +00:00
Stanislav Shwartsman
e2f0880f1c support more than 32-bit cpu features vector 2011-09-14 20:22:24 +00:00
Stanislav Shwartsman
3f230d115e clean disasm opcodes.inc 2011-09-13 20:43:15 +00:00
Stanislav Shwartsman
cf56ffb6e0 BSF/BSR should stay, only F3 prefix change opcode 2011-08-31 21:13:50 +00:00
Stanislav Shwartsman
1f5e036695 lzcnt/tzcnt bmi instructions implemented 2011-08-31 20:43:47 +00:00
Stanislav Shwartsman
9693bacacb syscall/sysret in legacy mode is supported in k6-2. preparing code to it ... 2011-08-30 20:41:00 +00:00
Stanislav Shwartsman
1328861175 typo fix 2011-08-28 21:41:54 +00:00
Stanislav Shwartsman
1dc8f56f06 disasm for AVX2 gather 2011-08-28 21:38:53 +00:00
Stanislav Shwartsman
44241a1e56 - Added support for AVX and AVX2 instructions emulation, to enable configure 
with --enable-avx option. When compiled in, AVX still has to be enabled
    using .bochsrc CPUID option. AVX2 FMA instructions still not implemented.

  - Added support for Bit Manipulation Instructions (BMI) emulation. The BMI
    instructions support can be enabled using .bochsrc CPUID option.
 2011-08-27 13:47:16 +00:00
Stanislav Shwartsman
d841e82d87 MOVBE instruction exists only in memory form 2011-08-25 21:20:50 +00:00
Stanislav Shwartsman
e796e6a96c disasm avx2 new instructions (no gather yet) 2011-08-24 20:55:23 +00:00
Stanislav Shwartsman
638a834c4a remove redundant code 2011-08-22 17:19:04 +00:00
Stanislav Shwartsman
ed9b8478b5 undo RDTSC commit 2011-08-17 21:13:06 +00:00
Stanislav Shwartsman
165e6f0fdf separate TSC to uniq feature that can be disabled in CPU configuration 2011-08-17 20:57:44 +00:00
Stanislav Shwartsman
35ec48d17d small fixes 2011-08-13 18:39:17 +00:00
Stanislav Shwartsman
8962cfddde re-definition of x86-64 support, 1st step towards x86-64 enable/disable through .bochsrc 2011-08-12 18:04:56 +00:00
Stanislav Shwartsman
6344c6a719 Added P2 Klamath CPUID + some code reorg again 2011-08-11 18:06:09 +00:00
Stanislav Shwartsman
5ea65d1753 fix for disasm 2011-08-10 22:11:12 +00:00
Stanislav Shwartsman
d84dbcd02b fixed *x86 ISA extensions that enable this instruction* in ia_opcodes.h 2011-07-31 20:09:04 +00:00
Stanislav Shwartsman
e48765a511 VMX fixed, cleanups 2011-07-29 20:22:35 +00:00
Stanislav Shwartsman
3f075d1ddf disasm for invpcid 2011-06-10 12:49:52 +00:00
Stanislav Shwartsman
c262a1b442 disasm fix for AVX 2011-05-30 20:32:59 +00:00
Stanislav Shwartsman
04e9254e2c AMD released new Vol4: 128 and 256 bit vector instructions, dropped SSE4A 2011-05-30 20:15:50 +00:00
Stanislav Shwartsman
5230bd27ee added/fixed comments 2011-04-21 15:51:36 +00:00
Stanislav Shwartsman
024a1ace38 move X2APIC to be .bochsrc option, rework of the cpuid code 2011-04-21 13:27:42 +00:00
Volker Ruppert
c78026a9a2 - deleted executable properties from source files 2011-04-03 10:29:19 +00:00
Stanislav Shwartsman
7664c55b08 first fixups after AVX 
(and for AVX)
 2011-03-20 18:27:31 +00:00
Stanislav Shwartsman
7ced718040 implemented AVX instructions support 
many changes - some cleanup will follow
please report ay found bugs !
 2011-03-19 20:09:34 +00:00
Stanislav Shwartsman
00981cd7a6 Adding Id and Rev property to all files 2011-02-24 22:05:47 +00:00
Stanislav Shwartsman
4a8d69caf6 bugfix for x86-64 mode 2010-11-23 15:42:26 +00:00
Stanislav Shwartsman
9aa503cb9d fixed warnings for win64 compilation 2010-11-23 14:59:36 +00:00
Stanislav Shwartsman
dc72673bb3 Fixed arpl disasm 2010-10-11 15:33:11 +00:00
Stanislav Shwartsman
7f7c249934 disasm and some cpuid code according to recently published AVX_319433-007.pdf document 2010-07-22 15:12:08 +00:00
Stanislav Shwartsman
ecde5ffea9 simplify disasm tables 2010-05-23 20:30:23 +00:00
Stanislav Shwartsman
2dbe559ad9 simpler disasm tables 2010-05-23 20:05:14 +00:00
Stanislav Shwartsman
8d8d1590f5 fetchdecide rework for AVX (0xF3 SSE prefix encoded as 2 in VEX) 2010-05-23 19:17:41 +00:00
Stanislav Shwartsman
6e1204cb84 Merged X2APIC + X2APIC virtualization 2010-04-08 15:50:39 +00:00
Stanislav Shwartsman
69517f9143 Fix PEXTRB/PEXTRW/PEXTRD/EXTRACTPS 2010-04-02 19:01:17 +00:00
Stanislav Shwartsman
2efb11f2bc fixes 2010-03-30 18:12:19 +00:00
Stanislav Shwartsman
cceb0a5a17 invept/invvpid disasm 2010-03-26 10:39:40 +00:00
Stanislav Shwartsman
674724122a bugfix 2010-03-21 20:03:17 +00:00
Stanislav Shwartsman
9147ac4b63 MOVMSKPD/PS fix 2010-03-19 14:43:13 +00:00
Stanislav Shwartsman
c4412bf357 movdq2q fix 2010-03-19 10:44:02 +00:00
Stanislav Shwartsman
0ead9fe8ae new opcode grp 2010-03-07 08:08:40 +00:00
Stanislav Shwartsman
70dc124b3a 1st step of moving CPU options to runtime 2010-02-24 19:27:51 +00:00
Stanislav Shwartsman
08aa9fef6d disasm updates 2010-02-09 20:28:12 +00:00
Stanislav Shwartsman
c841eaa953 fixes and cleanups in disasm and decoder 2010-02-09 19:44:25 +00:00
Stanislav Shwartsman
3974c44800 new files 2010-02-08 15:13:39 +00:00
Stanislav Shwartsman
8330354f67 split disasm to more files 2010-02-08 15:11:58 +00:00
Stanislav Shwartsman
7aaa32f337 fix disasm bugf 2010-02-02 13:06:13 +00:00
Stanislav Shwartsman
26c7abf988 decode tables opt 2010-02-01 07:59:22 +00:00
Stanislav Shwartsman
17e513fa8a disasm fix 2010-01-31 10:17:42 +00:00
Stanislav Shwartsman
eae084920a optimized decode tables 2010-01-31 09:45:27 +00:00
Stanislav Shwartsman
b5d1677848 GETSC instruction disasm 2010-01-11 21:27:59 +00:00
Stanislav Shwartsman
fe687fd1a6 disasm displacements and offsets by default now printed as "relative" signed integers and not as unsigned offsets could toggle it back with disasm command. 
help disasm in debugger
 2009-12-28 13:52:40 +00:00
Stanislav Shwartsman
069ea6228e disasm displacements and offsets by default now printed as "relative" signed integers and not as unsigned offsets 
could toggle it back with disasm command.
help disasm in debugger
 2009-12-28 13:44:32 +00:00
Stanislav Shwartsman
880ee7f872 sort opcodes.inc 2009-12-17 09:17:45 +00:00
Stanislav Shwartsman
db8ecc535e added mclmulqdq disasm 2009-12-17 09:13:35 +00:00
Stanislav Shwartsman
bd60e0264c change Copyright to Bochs Project 2009-12-04 16:53:12 +00:00
Stanislav Shwartsman
7254ea36a1 copyright fixes + small optimization 2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
460a85c6ba bugfix 2009-09-04 10:51:31 +00:00
Stanislav Shwartsman
8a4ac11700 more verbose maskmov disasm 2009-08-21 13:45:38 +00:00
Stanislav Shwartsman
d9003c946c disasm fixes 2009-05-15 18:47:34 +00:00
Stanislav Shwartsman
8adeb0050f use more conventional name for debug regs in disasm (dr instead of db) 2009-05-07 10:19:50 +00:00
Volker Ruppert
e5eac65b59 - removed wrong character from FSF address (converted invisible and useless 
2-byte character)
- updated FSF address in some files
- added license to some files
 2009-02-08 09:05:52 +00:00
Stanislav Shwartsman
4dcea7e888 Fixed pause instruction disasm 2009-01-27 21:01:21 +00:00
Stanislav Shwartsman
db098a1205 Fix dependencies of CPU code from disasm library 
Regent Makefile.in for CPU
 2009-01-19 19:01:03 +00:00
Stanislav Shwartsman
5cc5781a20 Fixed memory corruption inside disasm module ! 2009-01-13 22:40:16 +00:00
Stanislav Shwartsman
c09e2b6418 Fixes in disasm 2008-10-01 09:10:54 +00:00
Stanislav Shwartsman
87103c2437 Support for disasm of MOVBE Intel Atom(R) instruction 2008-08-11 17:55:57 +00:00
Stanislav Shwartsman
7d2df1b104 same optimization in disasam 2008-06-11 21:05:38 +00:00
Stanislav Shwartsman
a85dfc7617 Added disasm for AES instructions 2008-05-25 15:42:26 +00:00
Stanislav Shwartsman
98f1930a80 Fixed compilation issue (patch by Eugene Toder) 2008-04-27 19:47:12 +00:00
Stanislav Shwartsman
64f2489afb Correctly implement opcode group G11 i.e. instructions C6 and C7 should @UD when modrm nnn field != 0 (1st instr in the group 2008-04-24 21:52:28 +00:00
Stanislav Shwartsman
0609d7e7ce Handle undocumented FPU opcodes 2008-04-21 14:17:48 +00:00
Stanislav Shwartsman
1a34834db9 Fixed disasm for SSE4.2 instr 2008-04-18 14:09:24 +00:00
Stanislav Shwartsman
a8c273c7bf Fixed disasm bug in 64-bit mode 2008-04-11 17:54:21 +00:00
Stanislav Shwartsman
671cd93966 Add CPU flags for future use 2008-04-04 12:23:45 +00:00
Stanislav Shwartsman
b3bca89842 Disasm print fixed for AT&T style 2008-03-20 18:11:57 +00:00
Stanislav Shwartsman
5e7218b8c3 Fixed problem introduced by prev checkin 
+
Fix beak to debugger when executing HLT instruction
 2008-02-29 05:39:40 +00:00
Stanislav Shwartsman
405fcfd75d Reorganize 3-byte opcode tables - bigger tables but easier to maintain them 2008-02-29 03:02:03 +00:00
Stanislav Shwartsman
c70d3e7d76 dos2unix 2008-02-12 22:45:46 +00:00
Stanislav Shwartsman
8615022962 Added first stubs for XSAVE/XRESTOR implementation 
Disassemble XSAVE/XRSTOR instructions (4 instructions)
Update CHANGES - a bit speculatively
 2008-02-12 22:41:39 +00:00
Stanislav Shwartsman
eebd96e2d7 another whitespace cleanup by Sebastien 2008-02-05 22:33:35 +00:00
Stanislav Shwartsman
72d72c92d4 Fixed warnings of VC2008 2007-12-30 18:02:22 +00:00
Stanislav Shwartsman
dfb3685c46 Fixed memory bug in disasm code 2007-11-18 21:29:17 +00:00
Stanislav Shwartsman
033150c7e6 According to AMD docs opcodes 0f 19...0f 1f are multibyte NOP 2007-11-17 16:19:14 +00:00