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added disasm for avx fma instructions

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This commit is contained in:
Stanislav Shwartsman 2011-09-29 19:50:27 +00:00
parent 275194fb32
commit e3dae7adb1
5 changed files with 248 additions and 30 deletions
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2
bochs/disasm/dis_groups.cc
View File

@ -446,6 +446,8 @@ void disassembler::Hdq(const x86_insn *insn)
void disassembler::Hps(const x86_insn *insn) { Hdq(insn); }
void disassembler::Hpd(const x86_insn *insn) { Hdq(insn); }
void disassembler::Hss(const x86_insn *insn) { Hdq(insn); }
void disassembler::Hsd(const x86_insn *insn) { Hdq(insn); }
void disassembler::Wb(const x86_insn *insn)
{

2
bochs/disasm/dis_tables.h
View File

@ -157,6 +157,8 @@
#define Hdq &disassembler::Hdq
#define Hps &disassembler::Hps
#define Hpd &disassembler::Hpd
#define Hss &disassembler::Hss
#define Hsd &disassembler::Hsd
#define Ob &disassembler::Ob
#define Ow &disassembler::Ow

212
bochs/disasm/dis_tables_avx.inc
View File

@ -467,6 +467,158 @@ static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f3893[2] = {
/* 1 */ { GRPSSE66(Ia_vgatherqpd_Vpd_VSib_Hpd) }
};
// FMA
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f3896[2] = {
/* 0 */ { GRPSSE66(Ia_vfmaddsub132ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfmaddsub132pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f3897[2] = {
/* 0 */ { GRPSSE66(Ia_vfmsubadd132ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfmsubadd132pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f3898[2] = {
/* 0 */ { GRPSSE66(Ia_vfmadd132ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfmadd132pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f3899[2] = {
/* 0 */ { GRPSSE66(Ia_vfmadd132ss_Vps_Hss_Wss) },
/* 1 */ { GRPSSE66(Ia_vfmadd132sd_Vpd_Hsd_Wsd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f389a[2] = {
/* 0 */ { GRPSSE66(Ia_vfmsub132ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfmsub132pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f389b[2] = {
/* 0 */ { GRPSSE66(Ia_vfmsub132ss_Vps_Hss_Wss) },
/* 1 */ { GRPSSE66(Ia_vfmsub132sd_Vpd_Hsd_Wsd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f389c[2] = {
/* 0 */ { GRPSSE66(Ia_vfnmadd132ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfnmadd132pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f389d[2] = {
/* 0 */ { GRPSSE66(Ia_vfnmadd132ss_Vps_Hss_Wss) },
/* 1 */ { GRPSSE66(Ia_vfnmadd132sd_Vpd_Hsd_Wsd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f389e[2] = {
/* 0 */ { GRPSSE66(Ia_vfnmsub132ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfnmsub132pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f389f[2] = {
/* 0 */ { GRPSSE66(Ia_vfnmsub132ss_Vps_Hss_Wss) },
/* 1 */ { GRPSSE66(Ia_vfnmsub132sd_Vpd_Hsd_Wsd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38a6[2] = {
/* 0 */ { GRPSSE66(Ia_vfmaddsub213ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfmaddsub213pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38a7[2] = {
/* 0 */ { GRPSSE66(Ia_vfmsubadd213ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfmsubadd213pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38a8[2] = {
/* 0 */ { GRPSSE66(Ia_vfmadd213ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfmadd213pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38a9[2] = {
/* 0 */ { GRPSSE66(Ia_vfmadd213ss_Vps_Hss_Wss) },
/* 1 */ { GRPSSE66(Ia_vfmadd213sd_Vpd_Hsd_Wsd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38aa[2] = {
/* 0 */ { GRPSSE66(Ia_vfmsub213ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfmsub213pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38ab[2] = {
/* 0 */ { GRPSSE66(Ia_vfmsub213ss_Vps_Hss_Wss) },
/* 1 */ { GRPSSE66(Ia_vfmsub213sd_Vpd_Hsd_Wsd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38ac[2] = {
/* 0 */ { GRPSSE66(Ia_vfnmadd213ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfnmadd213pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38ad[2] = {
/* 0 */ { GRPSSE66(Ia_vfnmadd213ss_Vps_Hss_Wss) },
/* 1 */ { GRPSSE66(Ia_vfnmadd213sd_Vpd_Hsd_Wsd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38ae[2] = {
/* 0 */ { GRPSSE66(Ia_vfnmsub213ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfnmsub213pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38af[2] = {
/* 0 */ { GRPSSE66(Ia_vfnmsub213ss_Vps_Hss_Wss) },
/* 1 */ { GRPSSE66(Ia_vfnmsub213sd_Vpd_Hsd_Wsd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38b6[2] = {
/* 0 */ { GRPSSE66(Ia_vfmaddsub231ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfmaddsub231pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38b7[2] = {
/* 0 */ { GRPSSE66(Ia_vfmsubadd231ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfmsubadd231pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38b8[2] = {
/* 0 */ { GRPSSE66(Ia_vfmadd231ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfmadd231pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38b9[2] = {
/* 0 */ { GRPSSE66(Ia_vfmadd231ss_Vps_Hss_Wss) },
/* 1 */ { GRPSSE66(Ia_vfmadd231sd_Vpd_Hsd_Wsd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38ba[2] = {
/* 0 */ { GRPSSE66(Ia_vfmsub231ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfmsub231pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38bb[2] = {
/* 0 */ { GRPSSE66(Ia_vfmsub231ss_Vps_Hss_Wss) },
/* 1 */ { GRPSSE66(Ia_vfmsub231sd_Vpd_Hsd_Wsd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38bc[2] = {
/* 0 */ { GRPSSE66(Ia_vfnmadd231ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfnmadd231pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38bd[2] = {
/* 0 */ { GRPSSE66(Ia_vfnmadd231ss_Vps_Hss_Wss) },
/* 1 */ { GRPSSE66(Ia_vfnmadd231sd_Vpd_Hsd_Wsd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38be[2] = {
/* 0 */ { GRPSSE66(Ia_vfnmsub231ps_Vps_Hps_Wps) },
/* 1 */ { GRPSSE66(Ia_vfnmsub231pd_Vpd_Hpd_Wpd) }
};
static BxDisasmOpcodeTable_t BxDisasmGrpVexW_0f38bf[2] = {
/* 0 */ { GRPSSE66(Ia_vfnmsub231ss_Vps_Hss_Wss) },
/* 1 */ { GRPSSE66(Ia_vfnmsub231sd_Vpd_Hsd_Wsd) }
};
// FMA
static BxDisasmOpcodeTable_t BxDisasmGroupAVX_0f38f5[4] = {
/* -- */ { 0, &Ia_bzhi_Gy_Ey_By },
/* 66 */ { 0, &Ia_Invalid },
@ -903,48 +1055,48 @@ static BxDisasmOpcodeTable_t BxDisasmOpcodesAVX[256*3] = {
/* 93 */ { GRPVEXW(0f3893) },
/* 94 */ { 0, &Ia_Invalid },
/* 95 */ { 0, &Ia_Invalid },
/* 96 */ { 0, &Ia_Invalid },
/* 97 */ { 0, &Ia_Invalid },
/* 98 */ { 0, &Ia_Invalid },
/* 99 */ { 0, &Ia_Invalid },
/* 9A */ { 0, &Ia_Invalid },
/* 9B */ { 0, &Ia_Invalid },
/* 9C */ { 0, &Ia_Invalid },
/* 9D */ { 0, &Ia_Invalid },
/* 9E */ { 0, &Ia_Invalid },
/* 9F */ { 0, &Ia_Invalid },
/* 96 */ { GRPVEXW(0f3896) },
/* 97 */ { GRPVEXW(0f3897) },
/* 98 */ { GRPVEXW(0f3898) },
/* 99 */ { GRPVEXW(0f3899) },
/* 9A */ { GRPVEXW(0f389a) },
/* 9B */ { GRPVEXW(0f389b) },
/* 9C */ { GRPVEXW(0f389c) },
/* 9D */ { GRPVEXW(0f389d) },
/* 9E */ { GRPVEXW(0f389e) },
/* 9F */ { GRPVEXW(0f389f) },
/* A0 */ { 0, &Ia_Invalid },
/* A1 */ { 0, &Ia_Invalid },
/* A2 */ { 0, &Ia_Invalid },
/* A3 */ { 0, &Ia_Invalid },
/* A4 */ { 0, &Ia_Invalid },
/* A5 */ { 0, &Ia_Invalid },
/* A6 */ { 0, &Ia_Invalid },
/* A7 */ { 0, &Ia_Invalid },
/* A8 */ { 0, &Ia_Invalid },
/* A9 */ { 0, &Ia_Invalid },
/* AA */ { 0, &Ia_Invalid },
/* AB */ { 0, &Ia_Invalid },
/* AC */ { 0, &Ia_Invalid },
/* AD */ { 0, &Ia_Invalid },
/* AE */ { 0, &Ia_Invalid },
/* AF */ { 0, &Ia_Invalid },
/* A6 */ { GRPVEXW(0f38a6) },
/* A7 */ { GRPVEXW(0f38a7) },
/* A8 */ { GRPVEXW(0f38a8) },
/* A9 */ { GRPVEXW(0f38a9) },
/* AA */ { GRPVEXW(0f38aa) },
/* AB */ { GRPVEXW(0f38ab) },
/* AC */ { GRPVEXW(0f38ac) },
/* AD */ { GRPVEXW(0f38ad) },
/* AE */ { GRPVEXW(0f38ae) },
/* AF */ { GRPVEXW(0f38af) },
/* B0 */ { 0, &Ia_Invalid },
/* B1 */ { 0, &Ia_Invalid },
/* B2 */ { 0, &Ia_Invalid },
/* B3 */ { 0, &Ia_Invalid },
/* B4 */ { 0, &Ia_Invalid },
/* B5 */ { 0, &Ia_Invalid },
/* B6 */ { 0, &Ia_Invalid },
/* B7 */ { 0, &Ia_Invalid },
/* B8 */ { 0, &Ia_Invalid },
/* B9 */ { 0, &Ia_Invalid },
/* BA */ { 0, &Ia_Invalid },
/* BB */ { 0, &Ia_Invalid },
/* BC */ { 0, &Ia_Invalid },
/* BD */ { 0, &Ia_Invalid },
/* BE */ { 0, &Ia_Invalid },
/* BF */ { 0, &Ia_Invalid },
/* B6 */ { GRPVEXW(0f38b6) },
/* B7 */ { GRPVEXW(0f38b7) },
/* B8 */ { GRPVEXW(0f38b8) },
/* B9 */ { GRPVEXW(0f38b9) },
/* BA */ { GRPVEXW(0f38ba) },
/* BB */ { GRPVEXW(0f38bb) },
/* BC */ { GRPVEXW(0f38bc) },
/* BD */ { GRPVEXW(0f38bd) },
/* BE */ { GRPVEXW(0f38be) },
/* BF */ { GRPVEXW(0f38bf) },
/* C0 */ { 0, &Ia_Invalid },
/* C1 */ { 0, &Ia_Invalid },
/* C2 */ { 0, &Ia_Invalid },

2
bochs/disasm/disasm.h
View File

@ -544,6 +544,8 @@ public:
void Hdq(const x86_insn *insn);
void Hps(const x86_insn *insn);
void Hpd(const x86_insn *insn);
void Hss(const x86_insn *insn);
void Hsd(const x86_insn *insn);
// direct memory access
void OP_O(const x86_insn *insn, unsigned size);

60
bochs/disasm/opcodes.inc
View File

@ -1373,6 +1373,66 @@ Ia_verw = { "verw", "verw", Ew, XX, XX, XX, 0 },
Ia_vextractf128_Wdq_Vdq_Ib = { "vextractf128", "vextractf128", Wdq, Vdq, Ib, XX, IA_AVX },
Ia_vextracti128_Wdq_Vdq_Ib = { "vextracti128", "vextracti128", Wdq, Vdq, Ib, XX, IA_AVX2 },
Ia_vextractps_Ed_Vdq_Ib = { "vextractps", "vextractps", Ed, Vdq, Ib, XX, IA_AVX },
Ia_vfmadd132pd_Vpd_Hpd_Wpd = { "vfmadd132pd", "vfmadd132pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfmadd132ps_Vps_Hps_Wps = { "vfmadd132ps", "vfmadd132ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfmadd132sd_Vpd_Hsd_Wsd = { "vfmadd132sd", "vfmadd132sd", Vpd, Hsd, Wsd, XX, IA_AVX_FMA },
Ia_vfmadd132ss_Vps_Hss_Wss = { "vfmadd132ss", "vfmadd132ss", Vps, Hss, Wss, XX, IA_AVX_FMA },
Ia_vfmadd213pd_Vpd_Hpd_Wpd = { "vfmadd213pd", "vfmadd213pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfmadd213ps_Vps_Hps_Wps = { "vfmadd213ps", "vfmadd213ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfmadd213sd_Vpd_Hsd_Wsd = { "vfmadd213sd", "vfmadd213sd", Vpd, Hsd, Wsd, XX, IA_AVX_FMA },
Ia_vfmadd213ss_Vps_Hss_Wss = { "vfmadd213ss", "vfmadd213ss", Vps, Hss, Wss, XX, IA_AVX_FMA },
Ia_vfmadd231pd_Vpd_Hpd_Wpd = { "vfmadd231pd", "vfmadd231pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfmadd231ps_Vps_Hps_Wps = { "vfmadd231ps", "vfmadd231ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfmadd231sd_Vpd_Hsd_Wsd = { "vfmadd231sd", "vfmadd231sd", Vpd, Hsd, Wsd, XX, IA_AVX_FMA },
Ia_vfmadd231ss_Vps_Hss_Wss = { "vfmadd231ss", "vfmadd231ss", Vps, Hss, Wss, XX, IA_AVX_FMA },
Ia_vfmaddsub132pd_Vpd_Hpd_Wpd = { "vfmaddsub132pd", "vfmaddsub132pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfmaddsub132ps_Vps_Hps_Wps = { "vfmaddsub132ps", "vfmaddsub132ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfmaddsub213pd_Vpd_Hpd_Wpd = { "vfmaddsub213pd", "vfmaddsub213pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfmaddsub213ps_Vps_Hps_Wps = { "vfmaddsub213ps", "vfmaddsub213ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfmaddsub231pd_Vpd_Hpd_Wpd = { "vfmaddsub231pd", "vfmaddsub231pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfmaddsub231ps_Vps_Hps_Wps = { "vfmaddsub231ps", "vfmaddsub231ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfmsub132pd_Vpd_Hpd_Wpd = { "vfmsub132pd", "vfmsub132pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfmsub132ps_Vps_Hps_Wps = { "vfmsub132ps", "vfmsub132ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfmsub132sd_Vpd_Hsd_Wsd = { "vfmsub132sd", "vfmsub132sd", Vpd, Hsd, Wsd, XX, IA_AVX_FMA },
Ia_vfmsub132ss_Vps_Hss_Wss = { "vfmsub132ss", "vfmsub132ss", Vps, Hss, Wss, XX, IA_AVX_FMA },
Ia_vfmsub213pd_Vpd_Hpd_Wpd = { "vfmsub213pd", "vfmsub213pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfmsub213ps_Vps_Hps_Wps = { "vfmsub213ps", "vfmsub213ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfmsub213sd_Vpd_Hsd_Wsd = { "vfmsub213sd", "vfmsub213sd", Vpd, Hsd, Wsd, XX, IA_AVX_FMA },
Ia_vfmsub213ss_Vps_Hss_Wss = { "vfmsub213ss", "vfmsub213ss", Vps, Hss, Wss, XX, IA_AVX_FMA },
Ia_vfmsub231pd_Vpd_Hpd_Wpd = { "vfmsub231pd", "vfmsub231pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfmsub231ps_Vps_Hps_Wps = { "vfmsub231ps", "vfmsub231ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfmsub231sd_Vpd_Hsd_Wsd = { "vfmsub231sd", "vfmsub231sd", Vpd, Hsd, Wsd, XX, IA_AVX_FMA },
Ia_vfmsub231ss_Vps_Hss_Wss = { "vfmsub231ss", "vfmsub231ss", Vps, Hss, Wss, XX, IA_AVX_FMA },
Ia_vfmsubadd132pd_Vpd_Hpd_Wpd = { "vfmsubadd132pd", "vfmsubadd132pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfmsubadd132ps_Vps_Hps_Wps = { "vfmsubadd132ps", "vfmsubadd132ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfmsubadd213pd_Vpd_Hpd_Wpd = { "vfmsubadd213pd", "vfmsubadd213pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfmsubadd213ps_Vps_Hps_Wps = { "vfmsubadd213ps", "vfmsubadd213ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfmsubadd231pd_Vpd_Hpd_Wpd = { "vfmsubadd231pd", "vfmsubadd231pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfmsubadd231ps_Vps_Hps_Wps = { "vfmsubadd231ps", "vfmsubadd231ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfnmadd132pd_Vpd_Hpd_Wpd = { "vfnmadd132pd", "vfnmadd132pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfnmadd132ps_Vps_Hps_Wps = { "vfnmadd132ps", "vfnmadd132ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfnmadd132sd_Vpd_Hsd_Wsd = { "vfnmadd132sd", "vfnmadd132sd", Vpd, Hsd, Wsd, XX, IA_AVX_FMA },
Ia_vfnmadd132ss_Vps_Hss_Wss = { "vfnmadd132ss", "vfnmadd132ss", Vps, Hss, Wss, XX, IA_AVX_FMA },
Ia_vfnmadd213pd_Vpd_Hpd_Wpd = { "vfnmadd213pd", "vfnmadd213pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfnmadd213ps_Vps_Hps_Wps = { "vfnmadd213ps", "vfnmadd213ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfnmadd213sd_Vpd_Hsd_Wsd = { "vfnmadd213sd", "vfnmadd213sd", Vpd, Hsd, Wsd, XX, IA_AVX_FMA },
Ia_vfnmadd213ss_Vps_Hss_Wss = { "vfnmadd213ss", "vfnmadd213ss", Vps, Hss, Wss, XX, IA_AVX_FMA },
Ia_vfnmadd231pd_Vpd_Hpd_Wpd = { "vfnmadd231pd", "vfnmadd231pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfnmadd231ps_Vps_Hps_Wps = { "vfnmadd231ps", "vfnmadd231ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfnmadd231sd_Vpd_Hsd_Wsd = { "vfnmadd231sd", "vfnmadd231sd", Vpd, Hsd, Wsd, XX, IA_AVX_FMA },
Ia_vfnmadd231ss_Vps_Hss_Wss = { "vfnmadd231ss", "vfnmadd231ss", Vps, Hss, Wss, XX, IA_AVX_FMA },
Ia_vfnmsub132pd_Vpd_Hpd_Wpd = { "vfnmsub132pd", "vfnmsub132pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfnmsub132ps_Vps_Hps_Wps = { "vfnmsub132ps", "vfnmsub132ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfnmsub132sd_Vpd_Hsd_Wsd = { "vfnmsub132sd", "vfnmsub132sd", Vpd, Hsd, Wsd, XX, IA_AVX_FMA },
Ia_vfnmsub132ss_Vps_Hss_Wss = { "vfnmsub132ss", "vfnmsub132ss", Vps, Hss, Wss, XX, IA_AVX_FMA },
Ia_vfnmsub213pd_Vpd_Hpd_Wpd = { "vfnmsub213pd", "vfnmsub213pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfnmsub213ps_Vps_Hps_Wps = { "vfnmsub213ps", "vfnmsub213ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfnmsub213sd_Vpd_Hsd_Wsd = { "vfnmsub213sd", "vfnmsub213sd", Vpd, Hsd, Wsd, XX, IA_AVX_FMA },
Ia_vfnmsub213ss_Vps_Hss_Wss = { "vfnmsub213ss", "vfnmsub213ss", Vps, Hss, Wss, XX, IA_AVX_FMA },
Ia_vfnmsub231pd_Vpd_Hpd_Wpd = { "vfnmsub231pd", "vfnmsub231pd", Vpd, Hpd, Wpd, XX, IA_AVX_FMA },
Ia_vfnmsub231ps_Vps_Hps_Wps = { "vfnmsub231ps", "vfnmsub231ps", Vps, Hps, Wps, XX, IA_AVX_FMA },
Ia_vfnmsub231sd_Vpd_Hsd_Wsd = { "vfnmsub231sd", "vfnmsub231sd", Vpd, Hsd, Wsd, XX, IA_AVX_FMA },
Ia_vfnmsub231ss_Vps_Hss_Wss = { "vfnmsub231ss", "vfnmsub231ss", Vps, Hss, Wss, XX, IA_AVX_FMA },
Ia_vgatherdd_Vdq_VSib_Hdq = { "vgatherdd", "vgatherdd", Vdq, VSib, Hdq, XX, IA_AVX2 },
Ia_vgatherdpd_Vpd_VSib_Hpd = { "vgatherdpd", "vgatherdpd", Vpd, VSib, Hpd, XX, IA_AVX2 },
Ia_vgatherdps_Vps_VSib_Hps = { "vgatherdps", "vgatherdps", Vps, VSib, Hps, XX, IA_AVX2 },