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simpler disasm tables

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This commit is contained in:
Stanislav Shwartsman 2010-05-23 20:05:14 +00:00
parent 8d8d1590f5
commit 2dbe559ad9
3 changed files with 19 additions and 46 deletions
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10
bochs/disasm/dis_tables.inc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: dis_tables.inc,v 1.34 2010-05-23 19:17:41 sshwarts Exp $
// $Id: dis_tables.inc,v 1.35 2010-05-23 20:05:14 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2005-2010 Stanislav Shwartsman
@ -3020,10 +3020,10 @@ static BxDisasmOpcodeTable_t BxDisasmOpcodes64q[256*2] = {
/* 0F 27 */ { 0, &Ia_Invalid },
/* 0F 28 */ { GRPSSE(0f28) },
/* 0F 29 */ { GRPSSE(0f29) },
/* 0F 2A */ { GRPSSE(0f2aQ) },
/* 0F 2B */ { GRPSSE(0f2b) },
/* 0F 2C */ { GRPSSE(0f2cQ) },
/* 0F 2D */ { GRPSSE(0f2dQ) },
/* 0F 2A */ { GRPSSE(0f2a) },
/* 0F 2B */ { GRPSSE(0f2b) },
/* 0F 2C */ { GRPSSE(0f2c) },
/* 0F 2D */ { GRPSSE(0f2d) },
/* 0F 2E */ { GRPSSE(0f2e) },
/* 0F 2F */ { GRPSSE(0f2f) },
/* 0F 30 */ { 0, &Ia_wrmsr },

35
bochs/disasm/dis_tables_sse.inc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: dis_tables_sse.inc,v 1.9 2010-05-23 19:17:41 sshwarts Exp $
// $Id: dis_tables_sse.inc,v 1.10 2010-05-23 20:05:14 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2005-2010 Stanislav Shwartsman
@ -124,15 +124,8 @@ static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f29[4] = {
static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f2a[4] = {
/* -- */ { 0, &Ia_cvtpi2ps_Vps_Qq },
/* 66 */ { 0, &Ia_cvtpi2pd_Vpd_Qq },
/* F3 */ { 0, &Ia_cvtsi2ss_Vss_Ed },
/* F2 */ { 0, &Ia_cvtsi2sd_Vsd_Ed }
};
static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f2aQ[4] = {
/* -- */ { 0, &Ia_cvtpi2ps_Vps_Qq },
/* 66 */ { 0, &Ia_cvtpi2pd_Vpd_Qq },
/* F3 */ { 0, &Ia_cvtsi2ss_Vss_Eq },
/* F2 */ { 0, &Ia_cvtsi2sd_Vsd_Eq }
/* F3 */ { 0, &Ia_cvtsi2ss_Vss_Ey },
/* F2 */ { 0, &Ia_cvtsi2sd_Vsd_Ey }
};
static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f2b[4] = {
@ -145,29 +138,15 @@ static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f2b[4] = {
static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f2c[4] = {
/* -- */ { 0, &Ia_cvttps2pi_Pq_Wps },
/* 66 */ { 0, &Ia_cvttpd2pi_Pq_Wpd },
/* F3 */ { 0, &Ia_cvttss2si_Gd_Wss },
/* F2 */ { 0, &Ia_cvttsd2si_Gd_Wsd }
};
static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f2cQ[4] = {
/* -- */ { 0, &Ia_cvttps2pi_Pq_Wps },
/* 66 */ { 0, &Ia_cvttpd2pi_Pq_Wpd },
/* F3 */ { 0, &Ia_cvttss2si_Gq_Wss },
/* F2 */ { 0, &Ia_cvttsd2si_Gq_Wsd }
/* F3 */ { 0, &Ia_cvttss2si_Gy_Wss },
/* F2 */ { 0, &Ia_cvttsd2si_Gy_Wsd }
};
static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f2d[4] = {
/* -- */ { 0, &Ia_cvtps2pi_Pq_Wps },
/* 66 */ { 0, &Ia_cvtpd2pi_Pq_Wpd },
/* F3 */ { 0, &Ia_cvtss2si_Gd_Wss },
/* F2 */ { 0, &Ia_cvtsd2si_Gd_Wsd }
};
static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f2dQ[4] = {
/* -- */ { 0, &Ia_cvtps2pi_Pq_Wps },
/* 66 */ { 0, &Ia_cvtpd2pi_Pq_Wpd },
/* F3 */ { 0, &Ia_cvtss2si_Gq_Wss },
/* F2 */ { 0, &Ia_cvtsd2si_Gq_Wsd }
/* F3 */ { 0, &Ia_cvtss2si_Gy_Wss },
/* F2 */ { 0, &Ia_cvtsd2si_Gy_Wsd }
};
static BxDisasmOpcodeTable_t BxDisasmGroupSSE_0f2e[4] = {

20
bochs/disasm/opcodes.inc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: opcodes.inc,v 1.38 2010-04-02 19:01:17 sshwarts Exp $
// $Id: opcodes.inc,v 1.39 2010-05-23 20:05:14 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2005-2009 Stanislav Shwartsman
@ -250,24 +250,18 @@ Ia_cvtpi2ps_Vps_Qq = { "cvtpi2ps", "cvtpi2ps", Vps, Qq, XX, XX, IA_SSE },
Ia_cvtps2dq_Vdq_Wps = { "cvtps2dq", "cvtps2dq", Vdq, Wps, XX, XX, IA_SSE2 },
Ia_cvtps2pd_Vpd_Wps = { "cvtps2pd", "cvtps2pd", Vpd, Wps, XX, XX, IA_SSE2 },
Ia_cvtps2pi_Pq_Wps = { "cvtps2pi", "cvtps2pi", Pq, Wps, XX, XX, IA_SSE },
Ia_cvtsd2si_Gd_Wsd = { "cvtsd2si", "cvtsd2si", Gd, Wsd, XX, XX, IA_SSE2 },
Ia_cvtsd2si_Gq_Wsd = { "cvtsd2si", "cvtsd2si", Gq, Wsd, XX, XX, IA_X86_64 },
Ia_cvtsd2si_Gy_Wsd = { "cvtsd2si", "cvtsd2si", Gy, Wsd, XX, XX, IA_SSE2 },
Ia_cvtsd2ss_Vss_Wsd = { "cvtsd2ss", "cvtsd2ss", Vss, Wsd, XX, XX, IA_SSE2 },
Ia_cvtsi2sd_Vsd_Ed = { "cvtsi2sd", "cvtsi2sd", Vsd, Ed, XX, XX, IA_SSE2 },
Ia_cvtsi2sd_Vsd_Eq = { "cvtsi2sd", "cvtsi2sd", Vsd, Eq, XX, XX, IA_X86_64 },
Ia_cvtsi2ss_Vss_Ed = { "cvtsi2ss", "cvtsi2ss", Vss, Ed, XX, XX, IA_SSE },
Ia_cvtsi2ss_Vss_Eq = { "cvtsi2ss", "cvtsi2ss", Vss, Eq, XX, XX, IA_X86_64 },
Ia_cvtsi2sd_Vsd_Ey = { "cvtsi2sd", "cvtsi2sd", Vsd, Ey, XX, XX, IA_SSE2 },
Ia_cvtsi2ss_Vss_Ey = { "cvtsi2ss", "cvtsi2ss", Vss, Ey, XX, XX, IA_SSE },
Ia_cvtss2sd_Vsd_Wss = { "cvtss2sd", "cvtss2sd", Vsd, Wss, XX, XX, IA_SSE2 },
Ia_cvtss2si_Gd_Wss = { "cvtss2si", "cvtss2si", Gd, Wss, XX, XX, IA_SSE },
Ia_cvtss2si_Gq_Wss = { "cvtss2si", "cvtss2si", Gq, Wss, XX, XX, IA_X86_64 },
Ia_cvtss2si_Gy_Wss = { "cvtss2si", "cvtss2si", Gy, Wss, XX, XX, IA_SSE },
Ia_cvttpd2dq_Vq_Wpd = { "cvttpd2dq", "cvttpd2dq", Vq, Wpd, XX, XX, IA_SSE2 },
Ia_cvttpd2pi_Pq_Wpd = { "cvttpd2pi", "cvttpd2pi", Pq, Wpd, XX, XX, IA_SSE2 },
Ia_cvttps2dq_Vdq_Wps = { "cvttps2dq", "cvttps2dq", Vdq, Wps, XX, XX, IA_SSE2 },
Ia_cvttps2pi_Pq_Wps = { "cvttps2pi", "cvttps2pi", Pq, Wps, XX, XX, IA_SSE },
Ia_cvttsd2si_Gd_Wsd = { "cvttsd2si", "cvttsd2si", Gd, Wsd, XX, XX, IA_SSE2 },
Ia_cvttsd2si_Gq_Wsd = { "cvttsd2si", "cvttsd2si", Gq, Wsd, XX, XX, IA_X86_64 },
Ia_cvttss2si_Gd_Wss = { "cvttss2si", "cvttss2si", Gd, Wss, XX, XX, IA_SSE },
Ia_cvttss2si_Gq_Wss = { "cvttss2si", "cvttss2si", Gq, Wss, XX, XX, IA_X86_64 },
Ia_cvttsd2si_Gy_Wsd = { "cvttsd2si", "cvttsd2si", Gy, Wsd, XX, XX, IA_SSE2 },
Ia_cvttss2si_Gy_Wss = { "cvttss2si", "cvttss2si", Gy, Wss, XX, XX, IA_SSE },
Ia_cwd = { "cwd", "cwtd", XX, XX, XX, XX, 0 },
Ia_cwde = { "cwde", "cwtl", XX, XX, XX, XX, 0 },
Ia_daa = { "daa", "daa", XX, XX, XX, XX, 0 },