Fixed pause instruction disasm

This commit is contained in:
Stanislav Shwartsman 2009-01-27 21:01:21 +00:00
parent 0325c120b2
commit 4dcea7e888

View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: dis_decode.cc,v 1.48 2009-01-13 22:40:16 sshwarts Exp $
// $Id: dis_decode.cc,v 1.49 2009-01-27 21:01:21 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
#include <stdio.h>
@ -266,6 +266,9 @@ x86_insn disassembler::decode(bx_bool is_32, bx_bool is_64, bx_address base, bx_
dis_sprintf("%s ", OPCODE(prefix)->IntelOpcode);
}
if (insn.b1 == 0x90 && !insn.rex_b && prefix_byte == 0xF3)
continue;
if (prefix_byte == 0xF3 || prefix_byte == 0xF2) {
if (attr != _GRPSSE) {
const BxDisasmOpcodeTable_t *prefix = &(opcode_table[prefix_byte]);
@ -289,8 +292,11 @@ x86_insn disassembler::decode(bx_bool is_32, bx_bool is_64, bx_address base, bx_
opcode = &Ia_jecxz_Jb;
// fix nop opcode
if (insn.b1 == 0x90 && !insn.rex_b) {
opcode = &Ia_nop;
if (insn.b1 == 0x90) {
if (sse_prefix == SSE_PREFIX_F3)
opcode = &Ia_pause;
else if (!insn.rex_b)
opcode = &Ia_nop;
}
// print instruction disassembly