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2590 Commits

Author SHA1 Message Date
Stanislav Shwartsman
184837e0ed fixed compilation err with no handlers chaining enabled 2011-09-06 15:41:52 +00:00
Stanislav Shwartsman
96cedbc756 continue handlers-chaining optimization: update time once per trace and not for every instruction 2011-09-06 15:35:39 +00:00
Stanislav Shwartsman
e000b61cfd make RDTSC 'end of trace' instruction - guarantee that any pair ot RDTSC/RDTSCP on same CPU do not belong to same trace (and therefore will always update time and etc) - required for Win7 Thin 2011-09-06 14:13:39 +00:00
Stanislav Shwartsman
5a350143a5 bug fixes 2011-09-06 13:09:45 +00:00
Stanislav Shwartsman
c67338203c small fixups, code cleanup and reorganization 2011-09-05 17:14:49 +00:00
Stanislav Shwartsman
41f9b25777 fixed avx2 gather instructions 2011-09-04 19:50:18 +00:00
Stanislav Shwartsman
c0f5919787 small optimization 2011-09-03 15:36:40 +00:00
Stanislav Shwartsman
8099fd9efd implemented alternative access to CR8: AMD feature. Lock CR0 -> CR8 2011-09-03 15:22:56 +00:00
Stanislav Shwartsman
cf56ffb6e0 BSF/BSR should stay, only F3 prefix change opcode 2011-08-31 21:13:50 +00:00
Stanislav Shwartsman
9d18af1207 fixed compilation for AVX OFF 2011-08-31 20:52:53 +00:00
Stanislav Shwartsman
1f5e036695 lzcnt/tzcnt bmi instructions implemented 2011-08-31 20:43:47 +00:00
Stanislav Shwartsman
d2f7351be2 cpu.h cleanup + update msdev workspaces cpudb projects 2011-08-30 22:22:07 +00:00
Stanislav Shwartsman
dfd769a102 - Fixed compilation issue with cpu-level=5 
- SYSCALL/SYSRET: SYSCALL/SYSRET instructions are not supported in legacy mode for Intel processors
- CPUID: CPUID.0x80000001.EDX[11] SYSCALL/SYSRET support should not be reported outside long64 mode if legacy mode SYSCALL/SYSRET is not supported
- Added new CPUDB entry - AMD K6-2 3D proc3essor (Chomper)
 2011-08-30 22:00:27 +00:00
Stanislav Shwartsman
fb9da23f9b syscall/sysret are not supported outside long64 mode in Intel CPUs 2011-08-30 21:32:40 +00:00
Stanislav Shwartsman
9693bacacb syscall/sysret in legacy mode is supported in k6-2. preparing code to it ... 2011-08-30 20:41:00 +00:00
Stanislav Shwartsman
0f73ff39df bug fix 2011-08-30 19:16:08 +00:00
Stanislav Shwartsman
c30275016e avx2 added broadcast from register 2011-08-29 21:00:25 +00:00
Stanislav Shwartsman
6bdfbeeffa fixed for gather VSIB calculation 2011-08-28 20:14:53 +00:00
Stanislav Shwartsman
239c5a449d added 'locked' information to bxInstruction_c for instrumentation and other future use 2011-08-27 20:09:18 +00:00
Stanislav Shwartsman
44241a1e56 - Added support for AVX and AVX2 instructions emulation, to enable configure 
with --enable-avx option. When compiled in, AVX still has to be enabled
    using .bochsrc CPUID option. AVX2 FMA instructions still not implemented.

  - Added support for Bit Manipulation Instructions (BMI) emulation. The BMI
    instructions support can be enabled using .bochsrc CPUID option.
 2011-08-27 13:47:16 +00:00
Stanislav Shwartsman
d841e82d87 MOVBE instruction exists only in memory form 2011-08-25 21:20:50 +00:00
Stanislav Shwartsman
b3898f4bec small optimization for PALIGNR instruction 2011-08-25 19:29:33 +00:00
Stanislav Shwartsman
5dde2dc744 fixed typo 2011-08-23 21:56:35 +00:00
Stanislav Shwartsman
fa930961c2 small optimization 2011-08-23 21:25:34 +00:00
Stanislav Shwartsman
4fae848888 just rename variable 2011-08-23 20:27:52 +00:00
Stanislav Shwartsman
002e7a3818 MSR_TSC_AUX is not available without RDTSCP 2011-08-21 19:09:35 +00:00
Stanislav Shwartsman
371dc200fc Remove the 'trace' debug feature fro the main stream (which now runs with handlers chaining) and this way reduce each handler size. 
Another 3% speedup on WinXP boot on top of handlers chaining + reduction of Bochs binary size by 45K.
 2011-08-21 17:04:21 +00:00
Stanislav Shwartsman
a5e187189a set max trace length back to 32 2011-08-21 16:44:02 +00:00
Stanislav Shwartsman
1e2e3c8b0e forgot to merge file 2011-08-21 14:38:33 +00:00
Stanislav Shwartsman
13feb0772a - 10% emulation speedup with handlers chaining optimization implemented. The 
feature is enabled by default when configure with --enable-all-optimizations
    option, to disable handlers chaining speedups configure with
        --disable-handlers-chaining
 2011-08-21 14:31:08 +00:00
Stanislav Shwartsman
dd79431702 rename AVX handlers - match their real operands 2011-08-20 15:10:18 +00:00
Volker Ruppert
bfdbf589a0 - removed duplicate 'clean' for cpu/cpudb 
- added missing 'dist-clean' for cpu/cpudb
 2011-08-19 06:31:51 +00:00
Stanislav Shwartsman
542af0dcc1 forgot to add a file 2011-08-18 19:02:16 +00:00
Stanislav Shwartsman
b8b63ac6ea compile CPUDB to separate library 
reduce compile-time dependencies
 2011-08-18 18:55:22 +00:00
Stanislav Shwartsman
30b94b112b regen Makefile.in dep 2011-08-18 05:44:54 +00:00
Stanislav Shwartsman
367e8999d6 fixed leaf 0x7 report in cpuid 2011-08-17 21:33:55 +00:00
Stanislav Shwartsman
ed9b8478b5 undo RDTSC commit 2011-08-17 21:13:06 +00:00
Stanislav Shwartsman
165e6f0fdf separate TSC to uniq feature that can be disabled in CPU configuration 2011-08-17 20:57:44 +00:00
Stanislav Shwartsman
4a3209ae31 Increase cpu param length (exceeded with new icount variable) 
CHECK_MAX_INSTRUCTIONS is not needed for debugger anymore.
Next step: eliminate it for SMP as well and remove cpu_loop parameter.
 2011-08-17 20:00:51 +00:00
Stanislav Shwartsman
b69f728246 Fixed internal debugger part of the bug: 
#3312237 stepN command might be not working properly
The problem still can be exists for SMP.
 2011-08-17 19:51:32 +00:00
Stanislav Shwartsman
86d042a46e added AVX to msdev workspaces 2011-08-16 20:44:02 +00:00
Stanislav Shwartsman
b0d7ffeb90 fixed compilation 2011-08-16 20:07:34 +00:00
Stanislav Shwartsman
a03e0266fb added yonah CPUID to cpudb. remove bxversion.h from dep files 2011-08-16 19:58:56 +00:00
Stanislav Shwartsman
0bc93fdc59 added pentium mmx to cpudb. for now only can be enabled when cpu-level=5 2011-08-16 19:04:36 +00:00
Stanislav Shwartsman
6606c62439 cr4 available since Pentium only 2011-08-16 16:49:04 +00:00
Stanislav Shwartsman
e50e187128 #GP on EFER access when not supported 2011-08-14 20:41:46 +00:00
Stanislav Shwartsman
35ec48d17d small fixes 2011-08-13 18:39:17 +00:00
Stanislav Shwartsman
290d3bf6ad typofix 2011-08-12 18:09:24 +00:00
Stanislav Shwartsman
8962cfddde re-definition of x86-64 support, 1st step towards x86-64 enable/disable through .bochsrc 2011-08-12 18:04:56 +00:00
Stanislav Shwartsman
7af5dccdcf fixed compilation issue 2011-08-11 19:45:21 +00:00
Stanislav Shwartsman
d0344a1b84 added Id Revision to new files 2011-08-11 18:17:45 +00:00
Stanislav Shwartsman
6344c6a719 Added P2 Klamath CPUID + some code reorg again 2011-08-11 18:06:09 +00:00
Stanislav Shwartsman
f15bc6cf75 support for NX outside of x86-64. 
required for Intel Yonah processor which is another interesting CPUID to be added
also found Via C7 CPUID, looking for the way to add it too
 2011-08-10 22:04:33 +00:00
Stanislav Shwartsman
1b27438146 cleanups + small code reorg 2011-08-10 20:31:29 +00:00
Stanislav Shwartsman
360481b391 infastructure for RDMSR/WRMSR control for cpuid class 
now the order is going to be:

1. MSRs emulated in Bochs (msr.cc)
2. MSRs emulated in model specific derivative class of cpuid_t
3. MSR can be loaded from msrs.def file
4. MSR is not found. We can fault or ignore based on ignore_bad_msrs option
 2011-08-09 22:11:56 +00:00
Stanislav Shwartsman
0171324877 small favor to VMX OFF for code that compiled with VMX ON 
avoid function call when not in vmx guest.
 2011-08-09 20:50:51 +00:00
Stanislav Shwartsman
17a94fc58e warning fixes 2011-08-09 18:00:19 +00:00
Stanislav Shwartsman
c6c94a79da dos2unix for generic_cpuid.cc 
fixed xsave leaf CPUID (again)
added one more CPUID configuration: Intel Mobile Core 2 Duo T9600
 2011-08-08 18:20:29 +00:00
Stanislav Shwartsman
4476dea8f8 remove redundant code 2011-08-08 05:47:49 +00:00
Stanislav Shwartsman
20becdfbe7 fix compilation errors 2011-08-05 07:22:43 +00:00
Stanislav Shwartsman
2ee0029749 extract ffxsr support to separate CPU feature 2011-08-04 19:02:49 +00:00
Stanislav Shwartsman
b6e37b818d small changes 2011-08-04 17:35:08 +00:00
Stanislav Shwartsman
1068b4bd8c cleanup 2011-08-03 21:46:46 +00:00
Stanislav Shwartsman
5ffb201184 fixed CPU leaf 0xD 2011-08-03 21:23:08 +00:00
Stanislav Shwartsman
1adda7bf64 Fixed MWAIT leaf CPUID - required for Fedora15 startup 2011-08-03 20:29:24 +00:00
Stanislav Shwartsman
5451be2676 remove duplicated code 2011-08-03 18:09:07 +00:00
Stanislav Shwartsman
9162c0dc2a dos2unix 2011-08-03 17:50:23 +00:00
Stanislav Shwartsman
075db389a9 added atom n270 cpuid + small fixes 2011-08-03 17:49:49 +00:00
Stanislav Shwartsman
b9a44a9dbf added const to all cpudb methods 2011-08-01 18:10:48 +00:00
Stanislav Shwartsman
ea7d5e74ee fixed cpuid_limit_winnt mode 2011-07-31 21:02:04 +00:00
Stanislav Shwartsman
e958df1333 report 3dnow for amd cpudb machine 2011-07-31 20:19:09 +00:00
Stanislav Shwartsman
bccf330665 typo fix 2011-07-31 20:11:04 +00:00
Stanislav Shwartsman
d84dbcd02b fixed *x86 ISA extensions that enable this instruction* in ia_opcodes.h 2011-07-31 20:09:04 +00:00
Stanislav Shwartsman
04635ca88b small fixes 2011-07-31 19:00:56 +00:00
Stanislav Shwartsman
1d89709e62 Added another CPU to CPUDB: p4_willamette (one more without x86-64 support). 
Reimplemented CPUDB using pure C macros magic.
Fixed compilation errors when compiling with SMP on.
 2011-07-31 18:43:46 +00:00
Stanislav Shwartsman
6e6db04b8f Fixed compilation errors, dos2unix, added missed p3_katmai.txt 2011-07-31 14:56:45 +00:00
Stanislav Shwartsman
5e291e0860 Added Athlon64 Clawhammer CPUID to CPUDB 2011-07-30 21:28:16 +00:00
Stanislav Shwartsman
fefa4d5e5b added PIII Katmai to CPUDB 2011-07-30 14:30:35 +00:00
Stanislav Shwartsman
7a157cf88d fixed vmexit for xsetbv and getsec 2011-07-30 13:21:31 +00:00
Stanislav Shwartsman
6aaf9297f8 ability to turn off rdtscp 2011-07-30 09:35:20 +00:00
Stanislav Shwartsman
e48765a511 VMX fixed, cleanups 2011-07-29 20:22:35 +00:00
Stanislav Shwartsman
37d8523ab4 fixed compilation with VMX=1 2011-07-29 18:41:17 +00:00
Stanislav Shwartsman
4ac67ec386 compilation when cu_level < 4 2011-07-29 15:24:32 +00:00
Stanislav Shwartsman
919fbd95da fixed CPUID after correlation with real HW CPUZ output 2011-07-29 15:18:39 +00:00
Stanislav Shwartsman
1a051f9f00 Added several predefined CPUs that can be selected from .bochsrc using new CPU::MODEL option. 
Selecting CPU MODEL from .bochsrc automatically chooses real HW CPUID and also configures Bochs emulator to emulate this specific CPU including all its features only.
Supported CPUs to choose from:
	core2_extreme_x9770
	corei7_sandy_bridge_2600K
	p4_prescott_celeron_336
 2011-07-29 15:03:54 +00:00
Stanislav Shwartsman
74fc3da79d conditional compile for generic cpuid 2011-07-28 19:20:16 +00:00
Stanislav Shwartsman
5da595e603 fixed OSXSAVE CPUID reporting 2011-07-28 16:38:22 +00:00
Stanislav Shwartsman
6ef7675d03 added new file 2011-07-28 16:21:18 +00:00
Stanislav Shwartsman
6ad0f5ddb2 regenerate dep for CPU 2011-07-28 16:19:30 +00:00
Stanislav Shwartsman
78327d3e5e First step toward completely configurable CPU. 
Change CPUID to generic interface which could be chosen from .bochsrc.
Bochs CPU emulation will enable/disable features (like instruction sets) according to CPUID that is selected.
TODO: Add database of CPUID from real hardware CPUs
 2011-07-28 16:17:42 +00:00
Stanislav Shwartsman
81f6a283e2 trim cpuid info from save/restore tree 2011-07-27 14:16:51 +00:00
Stanislav Shwartsman
f8e4e7f16b clean up/fixed instrumentation examples + removed old 2-years old configure options check (deprecated) 2011-07-23 19:58:38 +00:00
Stanislav Shwartsman
d11114ac19 Patch for emulating target with larger memory than host has available by Gary Cameron. 
The patch was posted in mailing list at Thu 6/16/2011.

Desription for CHANGES:

- Memory
  - Added new configure option which enables RAM file backing for large guest
    memory with a smaller amount host memory, without causing a panic when
    host memory is exhausted (patch by Gary Cameron). To enable configure with
        --enable-large-ramfile option.
 2011-07-22 17:46:06 +00:00
Stanislav Shwartsman
1e2c7de064 register state for pause-loop exiting 2011-07-22 09:28:31 +00:00
Stanislav Shwartsman
9c3a4b8dab impemented pause-loop exiting VMX2 control 2011-07-22 09:19:35 +00:00
Stanislav Shwartsman
d1780b66de typofix 2011-07-21 21:34:56 +00:00
Stanislav Shwartsman
b4118fcbfe correct natural width VMX field read/write len 2011-07-21 20:58:54 +00:00
Stanislav Shwartsman
a69eeb13f3 move cpuid defs to cpuid.h 2011-07-19 21:14:07 +00:00
Stanislav Shwartsman
cac3c836fa fixed typo 2011-07-18 21:47:14 +00:00
Stanislav Shwartsman
cddd1e3758 MONITOR/MWAIT: Do monitor on cache line granularity only + bugfix with possible TLB caching of monitored line 2011-07-18 21:44:22 +00:00
Stanislav Shwartsman
f81e47cca2 it is better to handle A20 in paging already 2011-07-18 20:22:59 +00:00
Stanislav Shwartsman
6e993adec7 small cleanup 2011-07-17 19:28:27 +00:00
Stanislav Shwartsman
041605f718 fixed corner case issue with SMP 2011-07-11 17:29:54 +00:00
Stanislav Shwartsman
28a58f4ea5 fix rdtscp code 2011-07-09 22:28:08 +00:00
Stanislav Shwartsman
432bf97197 was playing with SMP and debugger 2011-07-09 22:17:16 +00:00
Stanislav Shwartsman
92c4bd6f2b forgot to merge file 2011-07-08 14:07:45 +00:00
Stanislav Shwartsman
002c86660a reword all the CPU code in preparation for future CPU speedup implementation. 
Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
 2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
82a2ab6325 removed wrongly committed file 2011-07-03 16:05:41 +00:00
Stanislav Shwartsman
909e750549 Implemented VMX preemption timer VMEXIT control (patch by Jianan Hao) 2011-07-03 15:59:48 +00:00
Stanislav Shwartsman
2c168b2855 bugfix 2011-06-28 18:53:20 +00:00
Stanislav Shwartsman
90c4a74362 typo fix 2011-06-28 16:29:11 +00:00
Stanislav Shwartsman
08ba847ce4 fix bug inserted with prev commit + cleanup 2011-06-28 16:04:40 +00:00
Stanislav Shwartsman
f765b9fc58 cleanup 2011-06-27 19:48:13 +00:00
Stanislav Shwartsman
f7c6bd1134 clean code dupication 2011-06-27 19:27:49 +00:00
Stanislav Shwartsman
a1a140682c cleanup 2011-06-26 20:22:04 +00:00
Stanislav Shwartsman
68f96846fe no need to define 3b opcodes on < 80x686 2011-06-26 19:39:48 +00:00
Stanislav Shwartsman
87953711b1 cleanup in mmx code 2011-06-26 19:31:42 +00:00
Stanislav Shwartsman
2f582db722 compile less stuff for cpu-level=5 2011-06-26 19:15:30 +00:00
Stanislav Shwartsman
5ef9f8acf8 cleanup 2011-06-26 17:25:25 +00:00
Stanislav Shwartsman
beafa7c88b improved x86 hw code bp handling 2011-06-24 13:38:34 +00:00
Stanislav Shwartsman
7e57d95364 Fix wrong address translation in debugger 2011-06-24 13:05:36 +00:00
Volker Ruppert
e4fe7f0c8f - add some symbols required by MSVC for device plugins 2011-06-15 21:55:48 +00:00
Stanislav Shwartsman
31be835056 bugfix + rename function 2011-06-14 19:56:28 +00:00
Stanislav Shwartsman
31914e4a26 fixed compilation with avx off 2011-06-11 20:12:15 +00:00
Stanislav Shwartsman
778154b3b2 one more fix 2011-06-11 18:27:37 +00:00
Stanislav Shwartsman
ef38c9e235 fix decode for VCVTPH2PS 2011-06-11 18:26:05 +00:00
Stanislav Shwartsman
8399dee24c implemented AVX float16 convert instructions 2011-06-11 13:12:32 +00:00
Stanislav Shwartsman
d7f19bcfd4 optimize sse DAZ feature + optimization for AVX OFF 2011-06-11 12:22:54 +00:00
Stanislav Shwartsman
3f075d1ddf disasm for invpcid 2011-06-10 12:49:52 +00:00
Stanislav Shwartsman
77e15511be AVX2 and BMI instructions were published on http://software.intel.com/en-us/avx 2011-06-10 08:46:10 +00:00
Stanislav Shwartsman
acf2175d6d paging small change 2011-06-03 20:50:55 +00:00
Stanislav Shwartsman
29e3f6e762 remove trace cache disabled mode from the code. next step going to be - introducing new optimization features based on trace cache 2011-06-01 20:34:04 +00:00
Stanislav Shwartsman
04e9254e2c AMD released new Vol4: 128 and 256 bit vector instructions, dropped SSE4A 2011-05-30 20:15:50 +00:00
Stanislav Shwartsman
1ba77b9f10 fixed defined but not used warnings 2011-05-29 20:42:47 +00:00
Stanislav Shwartsman
0de8b08f24 fixed too few arguments for format warning 2011-05-29 20:09:31 +00:00
Stanislav Shwartsman
5748c6b9f5 first fix for SMEP 2011-05-29 18:08:37 +00:00
Stanislav Shwartsman
ee3f9e36cb Implemented Supervisor Mode Execution Protection (SMEP) 2011-05-29 16:28:26 +00:00
Stanislav Shwartsman
6ace540891 update for rev39 of Intel SDM 2011-05-28 20:20:25 +00:00
Stanislav Shwartsman
75ec0f835e small bug fix for 32-bit linear addr wrap 2011-05-27 08:50:38 +00:00
Stanislav Shwartsman
e0160b4f29 ability to turn on/off AVX if compiled in 2011-05-24 20:33:36 +00:00
Stanislav Shwartsman
de95fa8e13 more changes towards configurable cpuid 2011-05-24 18:23:28 +00:00
Stanislav Shwartsman
92bb77ef1d Merge patch from SF tracker: 
[3298173] Breakpoint on VMEXIT event by Jianan Hao

Patch description:

The patch provides a new command "vmexitbp" to set breakpoint when VM guest exit. The simulation will be stopped before first HOST mode instruction is executed.

Usage:
Type "vmexitbp" in debugger command window to switch it on/off (similar to modebp).


Currently, the patch has no corresponding interface on GUI debugger. Someone may add it if interested.
 2011-05-06 08:19:03 +00:00
Stanislav Shwartsman
a02ddb36d2 undo a change from 2 weeks ago that cause correctness failure 2011-05-06 08:03:45 +00:00
Stanislav Shwartsman
9fbf7d2f15 small cleanups 2011-05-04 05:53:17 +00:00
Stanislav Shwartsman
d440a5eda0 avx bug fix 2011-04-29 23:06:50 +00:00
Stanislav Shwartsman
c44f82f4ac small cleanup 2011-04-25 20:26:22 +00:00
Stanislav Shwartsman
c3a31d3cf0 applied patch bochs-110423-builtinbswap.patch 2011-04-25 15:20:27 +00:00
Stanislav Shwartsman
a02d8cfe67 cleanups, simplications, copyright updates 2011-04-23 20:39:27 +00:00
Stanislav Shwartsman
4f46b6eab2 bcd flags handling change 2011-04-23 10:49:36 +00:00
Stanislav Shwartsman
610df62e93 fixed segfault with x86-64 disabled 2011-04-22 17:56:27 +00:00
Stanislav Shwartsman
a1b523dacd warning fix 2011-04-22 15:18:05 +00:00
Stanislav Shwartsman
fb360ac334 bugfix 2011-04-22 07:39:38 +00:00
Stanislav Shwartsman
5230bd27ee added/fixed comments 2011-04-21 15:51:36 +00:00
Stanislav Shwartsman
024a1ace38 move X2APIC to be .bochsrc option, rework of the cpuid code 2011-04-21 13:27:42 +00:00
Stanislav Shwartsman
1a7d38c28b bswap optimization patch by Heikki Lindholm + cleanup 2011-04-19 12:48:06 +00:00
Stanislav Shwartsman
9aaeea3fda remove icache.h code that was added for studies in trace cache 2011-04-15 04:48:37 +00:00
Stanislav Shwartsman
74792e6841 update CHANGES 2011-04-15 04:46:27 +00:00
Stanislav Shwartsman
69b829a935 small fixes 2011-04-12 06:05:31 +00:00
Stanislav Shwartsman
6e79fdfb1e optimize data hw breakpoint 2011-04-09 05:12:28 +00:00
Stanislav Shwartsman
0de9a5f75d compilation fix 2011-04-08 16:20:26 +00:00
Volker Ruppert
c78026a9a2 - deleted executable properties from source files 2011-04-03 10:29:19 +00:00
Stanislav Shwartsman
bee5940167 fixed compilation err with trace cache off 2011-04-03 03:43:38 +00:00
Stanislav Shwartsman
734744847e fix cpuid.h (c) 2011-04-03 03:40:25 +00:00
Stanislav Shwartsman
2b596e1bc4 warning fix 2011-03-27 15:17:38 +00:00
Stanislav Shwartsman
4de76b0571 introduced victim cache for a trace cache structure. 
Allows to significantly  cut trace cache miss latenct and find data in victim cahe instead of redoding it 
8 entries VC in parallel with direct map 64K entries
 2011-03-25 23:06:34 +00:00
Stanislav Shwartsman
f0a3cce1e2 added XSAVEOPT instruction emulation (for now with no state tracking according to Intel docs, just alias it to XSAVE) 
update CHANGES
 2011-03-25 20:32:07 +00:00
Stanislav Shwartsman
dd36d3c754 fixed code breakpoint hit 2011-03-24 19:06:58 +00:00
Stanislav Shwartsman
0a88065722 updated instrumentation callbacks 2011-03-22 22:18:40 +00:00
Stanislav Shwartsman
31dd6a70db small cleanups 2011-03-20 21:16:45 +00:00
Stanislav Shwartsman
7664c55b08 first fixups after AVX 
(and for AVX)
 2011-03-20 18:27:31 +00:00
Stanislav Shwartsman
7ced718040 implemented AVX instructions support 
many changes - some cleanup will follow
please report ay found bugs !
 2011-03-19 20:09:34 +00:00
Stanislav Shwartsman
16021a0ddb rename model_specific.h to be cpuid.h 2011-03-19 17:35:18 +00:00
Stanislav Shwartsman
1aaf596d79 small fixes 2011-03-19 17:19:41 +00:00
Stanislav Shwartsman
96312698f6 fixed typo 2011-03-15 20:31:49 +00:00
Stanislav Shwartsman
6deb746464 do not handle reserved bits yet 2011-03-15 20:22:17 +00:00
Stanislav Shwartsman
63fe52f601 accessors for DR6 and DR7 fields 2011-03-15 20:20:15 +00:00
Stanislav Shwartsman
edd7c2d787 small reorg in cpuid code 2011-03-14 20:28:16 +00:00
Stanislav Shwartsman
acd320699d small cleanups 2011-03-14 06:25:54 +00:00
Stanislav Shwartsman
aff763349d Fixed save/restore of segments in real mode (valid bit was corrupted) 2011-03-12 09:56:43 +00:00
Stanislav Shwartsman
93e152ef1a no need to read ignore_bad_msrs on every reset 2011-03-05 18:54:23 +00:00
Stanislav Shwartsman
3b8903e19d there is no need to duplicate ignore_bad_msrs in param tree, this knob is loaded from options anyway 2011-03-05 18:47:48 +00:00
Stanislav Shwartsman
2bef4597d6 volatile is redundant here 2011-03-03 19:51:29 +00:00
Stanislav Shwartsman
f600fcf6c1 limit family values for CPUID 2011-02-26 20:50:26 +00:00
Stanislav Shwartsman
acb83acfa7 Fixed decoding of CRC32 instr 2011-02-26 20:43:11 +00:00
Stanislav Shwartsman
c15220bdeb assertion about misconfigured cpuid family 2011-02-25 17:54:50 +00:00
Stanislav Shwartsman
2d1d41e731 CPUID is not available when cpu-level=3 2011-02-25 16:27:01 +00:00
Stanislav Shwartsman
5a8c57fe65 end trace on setbv instruction 2011-02-25 15:19:12 +00:00
Stanislav Shwartsman
66682a0ba7 added ability to configure CPU family and model through .bochsrc 2011-02-25 15:05:48 +00:00
Stanislav Shwartsman
7d80a6ebe0 Adding Id and Rev property to all files 2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
e4c7e21c2c added comment (check how SVN updates $Id tag) 2011-02-24 21:34:44 +00:00
Stanislav Shwartsman
d84b2d546d Update Makefile.in (dep on vmx.h was missed) 2011-02-19 20:01:34 +00:00
Stanislav Shwartsman
57d01889b1 Fixed PCMPGTQ instruction 2011-02-19 11:00:43 +00:00
Stanislav Shwartsman
d8a2736d72 VMX pw loads should ask for RD perm 2011-02-19 08:31:05 +00:00
Stanislav Shwartsman
2d3f3668c7 Fixed IRET 64-bit mode bug 
Support for 32 float copare methods for AVX
ckeanups in fetchdecode
 2011-02-13 06:10:11 +00:00
Stanislav Shwartsman
faa8ee63a5 fixes to sse_move.cc 2011-02-11 10:08:42 +00:00
Stanislav Shwartsman
b5ebe5865e Fixes for incoming bug report, missed changes in CVS, repository fixups and etc 2011-02-11 09:56:23 +00:00
Stanislav Shwartsman
498b591452 quick code reorg that gives 3% speedup 2011-01-26 11:48:13 +00:00
Stanislav Shwartsman
5915d92775 very small optimizations + indent 2011-01-25 20:59:26 +00:00
Volker Ruppert
44ece7cf26 - including vga.h in iodev.h no longer necessary and symbol NO_DEVICE_INCLUDES 
is useless then
- updated makefile dependenies
 2011-01-24 20:35:51 +00:00
Stanislav Shwartsman
e20cbb9bf4 scan less icache entries when doing SMC flush 2011-01-23 17:21:34 +00:00