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74 Commits

Author SHA1 Message Date
Stanislav Shwartsman
c61d595106 add symbolic info for branch target disasm when available 2020-02-21 19:08:25 +00:00
Stanislav Shwartsman
df877cc03d adjustments to old disasm done during validation of new disasm 2017-12-13 18:18:20 +00:00
Stanislav Shwartsman
2a55ba0a39 Merge set of debugger improvements by Doug Gale <doug16k> 
Here is his original comment:

I have made several improvements in the debugger.
I have fixed several issues with proper handling of 64-bit addresses, and added support for 64 bit symbols.
I also have added several symbol lookups.
 2017-08-22 21:03:58 +00:00
Stanislav Shwartsman
09e6ee3143 compile disasm module when x86-64 is not compiled in 2016-05-12 11:16:05 +00:00
Stanislav Shwartsman
793ceb0d8c fix massive code dupliction between disasm, debugger and cpu by introducing new cpu decoder.h header 2016-04-29 21:01:28 +00:00
Stanislav Shwartsman
940c2a1c8e fixes for disasm 2013-10-15 17:19:18 +00:00
Stanislav Shwartsman
85b0402668 fixes for disasm 2013-10-02 19:23:34 +00:00
Stanislav Shwartsman
5331e8d4d3 rename disasm variable 2013-10-01 20:12:28 +00:00
Stanislav Shwartsman
25f99f76c3 remove test registers from disasm as well 2013-08-23 05:54:51 +00:00
Stanislav Shwartsman
75bda1d5cd implemented SVM emulation support for Bochs (incomplete yet) 
I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation.
Of course SVM emulation is incomplete, completely untested and not expected to work.
But someone could already take a look one the code and give some suggestions.

Also looking for anybody with existing SVM kernels - as simple as possible - for testing.

Status:
 - exceptions intercept is not implemented yet
 - IO intercept is not implemented yet
 - MSR intercept is not implemented yet
 - virtual interrupts are not implemented yet
 - CPUID is not implemented yet

No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
 2011-12-25 19:35:29 +00:00
Stanislav Shwartsman
e3dae7adb1 added disasm for avx fma instructions 2011-09-29 19:50:27 +00:00
Stanislav Shwartsman
8c7a60b3cb fixed typo in sse4a disasm 2011-09-20 15:15:02 +00:00
Stanislav Shwartsman
50207eeb90 - Added support for AMD SSE4A emulation, the instructions can be enabled 
using .bochsrc CPUID option.
 2011-09-18 16:18:22 +00:00
Stanislav Shwartsman
1dc8f56f06 disasm for AVX2 gather 2011-08-28 21:38:53 +00:00
Stanislav Shwartsman
44241a1e56 - Added support for AVX and AVX2 instructions emulation, to enable configure 
with --enable-avx option. When compiled in, AVX still has to be enabled
    using .bochsrc CPUID option. AVX2 FMA instructions still not implemented.

  - Added support for Bit Manipulation Instructions (BMI) emulation. The BMI
    instructions support can be enabled using .bochsrc CPUID option.
 2011-08-27 13:47:16 +00:00
Stanislav Shwartsman
e796e6a96c disasm avx2 new instructions (no gather yet) 2011-08-24 20:55:23 +00:00
Stanislav Shwartsman
04e9254e2c AMD released new Vol4: 128 and 256 bit vector instructions, dropped SSE4A 2011-05-30 20:15:50 +00:00
Stanislav Shwartsman
7ced718040 implemented AVX instructions support 
many changes - some cleanup will follow
please report ay found bugs !
 2011-03-19 20:09:34 +00:00
Stanislav Shwartsman
00981cd7a6 Adding Id and Rev property to all files 2011-02-24 22:05:47 +00:00
Stanislav Shwartsman
4a8d69caf6 bugfix for x86-64 mode 2010-11-23 15:42:26 +00:00
Stanislav Shwartsman
9aa503cb9d fixed warnings for win64 compilation 2010-11-23 14:59:36 +00:00
Stanislav Shwartsman
7f7c249934 disasm and some cpuid code according to recently published AVX_319433-007.pdf document 2010-07-22 15:12:08 +00:00
Stanislav Shwartsman
69517f9143 Fix PEXTRB/PEXTRW/PEXTRD/EXTRACTPS 2010-04-02 19:01:17 +00:00
Stanislav Shwartsman
cceb0a5a17 invept/invvpid disasm 2010-03-26 10:39:40 +00:00
Stanislav Shwartsman
9147ac4b63 MOVMSKPD/PS fix 2010-03-19 14:43:13 +00:00
Stanislav Shwartsman
0ead9fe8ae new opcode grp 2010-03-07 08:08:40 +00:00
Stanislav Shwartsman
08aa9fef6d disasm updates 2010-02-09 20:28:12 +00:00
Stanislav Shwartsman
c841eaa953 fixes and cleanups in disasm and decoder 2010-02-09 19:44:25 +00:00
Stanislav Shwartsman
fe687fd1a6 disasm displacements and offsets by default now printed as "relative" signed integers and not as unsigned offsets could toggle it back with disasm command. 
help disasm in debugger
 2009-12-28 13:52:40 +00:00
Stanislav Shwartsman
069ea6228e disasm displacements and offsets by default now printed as "relative" signed integers and not as unsigned offsets 
could toggle it back with disasm command.
help disasm in debugger
 2009-12-28 13:44:32 +00:00
Stanislav Shwartsman
7254ea36a1 copyright fixes + small optimization 2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
8a4ac11700 more verbose maskmov disasm 2009-08-21 13:45:38 +00:00
Stanislav Shwartsman
8adeb0050f use more conventional name for debug regs in disasm (dr instead of db) 2009-05-07 10:19:50 +00:00
Stanislav Shwartsman
db098a1205 Fix dependencies of CPU code from disasm library 
Regent Makefile.in for CPU
 2009-01-19 19:01:03 +00:00
Stanislav Shwartsman
eebd96e2d7 another whitespace cleanup by Sebastien 2008-02-05 22:33:35 +00:00
Stanislav Shwartsman
72d72c92d4 Fixed warnings of VC2008 2007-12-30 18:02:22 +00:00
Stanislav Shwartsman
0dc4badfbb Added SSE4A and SSE4_2 to disassembler 
Implemented POPCNT instruction
 2007-09-19 19:38:10 +00:00
Stanislav Shwartsman
016660698e just code cleanup, preparation for future 2007-08-31 18:09:34 +00:00
Stanislav Shwartsman
5189cfbf10 SSE4 support 2007-04-19 16:12:21 +00:00
Stanislav Shwartsman
696f4fef0f Remove incorrect assertion 2007-02-22 17:43:29 +00:00
Stanislav Shwartsman
dd00bc66d0 Fixed disasm in 64bit mode, added new accessor for printing 64bit values 2007-01-13 10:43:31 +00:00
Stanislav Shwartsman
24ece63fe7 Fixed disasm bug 2006-08-13 09:40:07 +00:00
Stanislav Shwartsman
003c2f59e6 Added missed CVS header to several files 2006-04-27 15:11:45 +00:00
Stanislav Shwartsman
bc4ca51055 Fixed disasm of 'enter' instruction in AT&T mode 2006-03-23 17:43:39 +00:00
Stanislav Shwartsman
2dc81b172a Fixed several disasm bugs 2006-02-17 13:33:05 +00:00
Stanislav Shwartsman
180667fb4e Fixed compilation warning 2006-02-13 18:37:21 +00:00
Stanislav Shwartsman
ace3b9916a Print branch target linear address for all in disasm when possible (i.e. cs.base and eip supplied) 2006-02-11 19:46:03 +00:00
Stanislav Shwartsman
24d4de03a1 - Fixed bug with missed ES segment override prefix 
- Correctly disassemble x86-64 opcodes

	Ia_cvttsd2si_Gq_Wsd
	Ia_cvttss2si_Gq_Wss
	Ia_cvtsd2si_Gq_Wsd
	Ia_cvtss2si_Gq_Wss
	Ia_movq_Pq_Eq
	Ia_movq_Vdq_Eq
	Ia_movq_Eq_Pq
	Ia_movq_Eq_Vq

- Correctly disassemble Intel SSE3 opcodes (not supported by Bochs)
	Ia_monitor
	Ia_mwait
 2006-01-31 17:42:31 +00:00
Stanislav Shwartsman
276c006129 Merge new disasm module with x96-64 support 2005-12-23 14:15:13 +00:00
Stanislav Shwartsman
5af5d80602 Small disasm fixes 2005-10-23 20:43:32 +00:00