c379d1bfe4
Format code
2022-04-16 17:50:12 +02:00
b136f08f2d
Check CPU model for uc_ctl
2022-04-16 17:49:47 +02:00
2912cd1e29
fix rust bindings build on windows ( #1584 )
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Refine rust bindings.
2022-04-16 13:40:04 +02:00
e3d0a33ab8
Fix BE32 usermode address XOR
2022-04-05 11:55:58 +02:00
3112cd920e
Add a test for nested uc_emu_start exits
2022-03-06 23:51:35 +01:00
2a4e42f315
Fix test
2022-03-06 23:40:57 +01:00
e5207a1363
Implement UC_HOOK_INSN for aarch64 MRS/MSR/SYS/SYSL
2022-02-27 15:28:31 +01:00
d946114dfe
Set EFLAGS correctly on startup
2022-02-25 22:44:42 +01:00
186be25c40
Fix wrong mode in tests
2022-02-25 22:28:26 +01:00
45b5d7d8d2
Add test for caf2fe1ddb
2022-02-25 22:24:17 +01:00
d96083d4d1
Fix pc after ppc sc inst
2022-02-20 20:42:46 +08:00
73e4a90d3a
Manually revert 63a445cbba
2022-02-13 10:13:01 +01:00
4266196b2d
Fix the divergence with master.
2022-02-13 10:08:58 +01:00
e382ca102a
Fix the regression bug
2022-02-13 09:52:00 +01:00
96518634fb
Fix the wrong block found when doing split_region
2022-02-12 21:34:46 +01:00
a2f18bbfaf
Format code
2022-02-12 16:29:00 +01:00
5683a5484d
Add test for switch endianess runtime
2022-02-12 14:35:33 +01:00
380e72bc12
Add tests for armeb CPSR.E and SCTLR.B
2022-02-12 14:29:15 +01:00
58fc952230
Remove armeb-softmmu and aarch64eb-softmmu
2022-02-12 14:15:54 +01:00
3e6665db00
Implement coprocessor register read/write for arm64
2022-02-11 22:13:01 +01:00
8bc1489210
Implement coprocessor register read/write for arm
2022-02-11 21:45:37 +01:00
141a558dd8
fix conflicts
2022-01-28 10:30:51 +08:00
bbfb376a88
Merge pull request #1521 from unicorn-engine/s390x
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S390X Support
2022-01-19 23:07:19 +01:00
2ad9f152f9
Set emulation_done to true if and only if we exit the outer uc_emu_start
...
Or we may lost uc_emu_stop wrongly
2022-01-19 21:58:46 +01:00
e6ff7e83e3
Sync with dev branch
2022-01-18 21:39:45 +01:00
ac510d13c7
Fix fuzzing and remove unused variable
2022-01-18 21:37:32 +01:00
4f1aeb83ca
Add fuzz_emu_s390x_be.c
2022-01-18 21:16:01 +01:00
7095605607
Merge branch 'dev' into systemz
2022-01-18 21:10:55 +01:00
ea9c7425b0
Fix the wrong PC when arm translation fectches unmapped memory
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This behavior keeps the same with Unicorn1, though, different from arm doc
2022-01-16 16:42:38 +01:00
459a595a98
Merge branch 'dev' into s390x
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Mostly for bindings update.
2022-01-15 20:56:39 +01:00
6ed2214399
Rebuilt hflags when swithing modes
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Or we may get the wrong mode during translation
2022-01-14 19:37:48 +01:00
980eae7f44
Sync PC at the end of emulation
2022-01-10 15:45:56 +01:00
71f044ca50
Merge branch 'dev' into s390x
2022-01-10 15:17:42 +01:00
36afa1022c
More PPC registers
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Add FPR0-31, CR0-7, LR, CTR, MSR, XER, FPSCR for PPC
Add a test for ppc32 float point
2022-01-10 15:16:10 +01:00
e84a5c44e9
Add a test for arm mrc instruction (also for coproc)
2022-01-05 21:57:32 +01:00
8e70f3e524
Format code
2022-01-05 21:56:58 +01:00
b8817518ae
Add a test for arm64 pac extension
2022-01-05 20:02:21 +01:00
3f64491fda
Add further test for arm system mode transition
2022-01-05 19:38:02 +01:00
73149f3616
Fix test case
2022-01-04 20:54:52 +01:00
7dc858d03d
Add a test for arm privilege escalation
2022-01-04 20:30:07 +01:00
8fc836c5fa
Fix tests list not marked with NULL
2021-12-29 23:10:21 +01:00
849325b9c6
Add unit test for s390x
2021-12-27 23:59:53 +01:00
faa689c0f0
Merge systemz to the latest uc2 codebase
2021-12-26 22:58:32 +01:00
cddc9cf2ed
Fix arm post init
2021-12-25 00:16:51 +01:00
5b3a9e1024
Add test for arm v8
2021-12-24 23:45:57 +01:00
4f73d75ea8
Fix #1500
2021-12-23 21:46:27 +01:00
ef6f8a2427
Fix x86 CPUID
2021-12-22 23:39:41 +01:00
7bb0abb977
Format
2021-12-22 20:37:15 +01:00
7bb756249a
Better design of cpuid instruction hook
2021-12-22 20:36:56 +01:00
033e79abac
Added cache flush after code patching in unit tests for arm64 and riscv
2021-12-17 14:55:08 +01:00
63a445cbba
fxsave / fxsave64 should store the floating point instruction pointer (fpip) ( #1467 )
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* fxsave / fxsave64 should store the floating point instruction pointer (fpip)
- fxsave / fxsave64 happen to be used as GetPC code in exploits
* unit tests for the storage of FPIP in fxsave (x86) and fxsave64 (x64)
2021-12-13 08:40:32 +08:00
549274f44c
Code patching tests for riscv and arm64
2021-12-10 15:27:54 +01:00
b042a6a01d
add missing files
2021-12-06 04:28:13 +08:00
8a0ca8715e
Fix SR read/write and a test
2021-12-04 23:22:28 +01:00
221cde18df
Write CPSR as it is initiated from instructions to allow regs switch
2021-11-24 17:10:51 +01:00
78e0ddbc4d
Fix mmio unmap
2021-11-24 00:18:19 +01:00
4ed1c4cff9
Fix test name typo
2021-11-23 23:24:53 +01:00
3e2580ef9e
Add test case for #1497
2021-11-23 22:47:20 +01:00
e11cc16e54
Implement high-resolution clock for mingw64 in test_ctl
2021-11-23 14:15:18 +01:00
ccfb66611f
Move test to test_mem
2021-11-23 00:41:49 +01:00
b35dbb90b2
Add test case for #1495
2021-11-22 18:48:16 +01:00
907ec5095d
Fix a stackoverflow in tests
2021-11-21 19:28:45 +01:00
fc467edbc6
Fix 32bit target getting wrong offset for mmio
2021-11-16 22:40:57 +01:00
247ffbe0e8
Support nested uc_emu_start calls
2021-11-16 21:07:03 +01:00
640251e1aa
Leave out size parameter in callback
2021-11-09 00:21:34 +01:00
35017a614f
Slightly change UC_CTL_TB_REMOVE_CACHE
2021-11-08 22:09:33 +01:00
e836b62e01
Minor fix for uc_ctl
2021-11-08 20:40:02 +01:00
2f61592ff9
Fix uc_mem_protect
2021-11-07 20:37:58 +01:00
c6fdbb3735
Add RISCV CSR registers
2021-11-07 20:36:04 +01:00
01d7e454b7
Fix typo
2021-11-04 20:59:07 +01:00
3aa2788586
Format
2021-11-04 18:39:52 +01:00
dfbffa44ec
Support changing cpu model for ARM
2021-11-04 18:37:10 +01:00
3e4b4af7d3
Support change page size
2021-11-04 17:03:30 +01:00
67e2386da6
Add test and close #1477
2021-11-03 21:40:13 +01:00
1a82248292
Add test for #992
2021-11-03 21:17:57 +01:00
6b5529fcb7
Merge pull request #1458 from bet4it/patch
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Port some patches from Unicorn1 to Unicorn2
2021-11-03 20:59:42 +01:00
9818840f4e
Add tests for UC_HOOK_TCG_OPCODE
2021-11-03 20:56:45 +01:00
58edb2abe7
Format
2021-11-03 13:28:12 +01:00
09aa0f944f
Merge QDucasse:riscv_extension_d
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Fix and close #1469
Fix test for riscv float points
Fix the riscv cpu config we left out
2021-11-03 13:20:46 +01:00
eb75d459f0
Add a regression test for invalidating empty TB and have a better solution
2021-11-03 01:07:06 +01:00
aaf340d9e4
Merge branch 'dev' into patch
2021-11-02 18:36:22 +08:00
b7e82d460c
Expose more TB related stuff
2021-11-01 22:11:43 +01:00
14e175394b
Fix Win32 time function for test_ctl
2021-11-01 19:43:30 +01:00
9704618595
Fix test for Android due to clock() not working
2021-11-01 15:33:36 +01:00
cee44b0464
Add tests and samples to show how to control TB cache
2021-11-01 14:46:01 +01:00
fb45b287ba
Add multiple exits mechanism and tests&samples
2021-11-01 14:00:43 +01:00
147cb62240
Add uc_close
2021-11-01 10:23:47 +01:00
3dd2e0f95d
Basic implementation of uc_ctl
2021-11-01 00:39:36 +01:00
84abf1d3a4
A stronger test and handle addr_end = 0
2021-10-31 21:01:55 +01:00
4bcf1c4a7c
Flush TB at exit with a better approach instead of flushing tlb in uc1
2021-10-31 19:43:56 +01:00
8e6f7e4fba
Add a regression test
2021-10-31 15:56:58 +01:00
e62b0ef255
Add clang-format and format code to qemu code style
2021-10-29 12:44:49 +02:00
9131856506
More tests
2021-10-26 11:32:57 +02:00
160045a910
Binary search mapped blocks
2021-10-20 20:49:55 +01:00
91451aa2f5
Add a new unit test file
2021-10-20 21:27:22 +02:00
30f0e24407
Merge remote-tracking branch 'qducasse/riscv_pc_update' into dev
2021-10-19 23:08:41 +02:00
5fd90ca1ef
Added 3 steps unit test
2021-10-19 17:20:10 +02:00
47f986fc93
Unit test POC for RISCV issue
2021-10-19 17:12:52 +02:00
c400924fe1
Merge branch 'dev' into patch
2021-10-17 18:18:09 +08:00
6d0d0897f8
Fix Rust build and CI.
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Add a test for ppc and fix ppc on windows.
2021-10-17 02:11:38 +02:00
lazymio