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Remove armeb-softmmu and aarch64eb-softmmu

This commit is contained in:
lazymio 2022-02-12 14:15:54 +01:00
parent 15f3b58d9b
commit 58fc952230
No known key found for this signature in database
GPG Key ID: DFF27E34A47CB873
16 changed files with 118 additions and 5137 deletions
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108
CMakeLists.txt
View File

@ -192,10 +192,10 @@ else()
set(EXTRA_CFLAGS "${EXTRA_CFLAGS}-DUNICORN_HAS_X86 ")
endif()
if(UNICORN_HAS_ARM)
set(EXTRA_CFLAGS "${EXTRA_CFLAGS}-DUNICORN_HAS_ARM -DUNICORN_HAS_ARMEB ")
set(EXTRA_CFLAGS "${EXTRA_CFLAGS}-DUNICORN_HAS_ARM ")
endif()
if(UNICORN_HAS_AARCH64)
set(EXTRA_CFLAGS "${EXTRA_CFLAGS}-DUNICORN_HAS_ARM64 -DUNICORN_HAS_ARM64EB ")
set(EXTRA_CFLAGS "${EXTRA_CFLAGS}-DUNICORN_HAS_ARM64 ")
endif()
if(UNICORN_HAS_M68K)
set(EXTRA_CFLAGS "${EXTRA_CFLAGS}-DUNICORN_HAS_M68K ")
@ -233,10 +233,10 @@ else()
set(TARGET_LIST "${TARGET_LIST}x86_64-softmmu, ")
endif()
if(UNICORN_HAS_ARM)
set(TARGET_LIST "${TARGET_LIST}arm-softmmu, armeb-softmmu, ")
set(TARGET_LIST "${TARGET_LIST}arm-softmmu, ")
endif()
if(UNICORN_HAS_AARCH64)
set(TARGET_LIST "${TARGET_LIST}aarch64-softmmu, aarch64eb-softmmu, ")
set(TARGET_LIST "${TARGET_LIST}aarch64-softmmu, ")
endif()
if(UNICORN_HAS_M68K)
set(TARGET_LIST "${TARGET_LIST}m68k-softmmu, ")
@ -280,20 +280,12 @@ else()
INPUT_FILE ${CMAKE_BINARY_DIR}/arm-softmmu/config-target.mak
OUTPUT_FILE ${CMAKE_BINARY_DIR}/arm-softmmu/config-target.h
)
execute_process(COMMAND sh ${CMAKE_CURRENT_SOURCE_DIR}/qemu/scripts/create_config
INPUT_FILE ${CMAKE_BINARY_DIR}/armeb-softmmu/config-target.mak
OUTPUT_FILE ${CMAKE_BINARY_DIR}/armeb-softmmu/config-target.h
)
endif()
if(UNICORN_HAS_AARCH64)
execute_process(COMMAND sh ${CMAKE_CURRENT_SOURCE_DIR}/qemu/scripts/create_config
INPUT_FILE ${CMAKE_BINARY_DIR}/aarch64-softmmu/config-target.mak
OUTPUT_FILE ${CMAKE_BINARY_DIR}/aarch64-softmmu/config-target.h
)
execute_process(COMMAND sh ${CMAKE_CURRENT_SOURCE_DIR}/qemu/scripts/create_config
INPUT_FILE ${CMAKE_BINARY_DIR}/aarch64eb-softmmu/config-target.mak
OUTPUT_FILE ${CMAKE_BINARY_DIR}/aarch64eb-softmmu/config-target.h
)
endif()
if(UNICORN_HAS_M68K)
execute_process(COMMAND sh ${CMAKE_CURRENT_SOURCE_DIR}/qemu/scripts/create_config
@ -490,45 +482,6 @@ if(UNICORN_TRACER)
target_compile_options(arm-softmmu PRIVATE -DUNICORN_TRACER)
endif()
add_library(armeb-softmmu STATIC
${UNICORN_ARCH_COMMON}
qemu/target/arm/cpu.c
qemu/target/arm/crypto_helper.c
qemu/target/arm/debug_helper.c
qemu/target/arm/helper.c
qemu/target/arm/iwmmxt_helper.c
qemu/target/arm/m_helper.c
qemu/target/arm/neon_helper.c
qemu/target/arm/op_helper.c
qemu/target/arm/psci.c
qemu/target/arm/tlb_helper.c
qemu/target/arm/translate.c
qemu/target/arm/vec_helper.c
qemu/target/arm/vfp_helper.c
qemu/target/arm/unicorn_arm.c
)
if(MSVC)
target_compile_options(armeb-softmmu PRIVATE
-DNEED_CPU_H
/FIarmeb.h
/I${CMAKE_CURRENT_SOURCE_DIR}/msvc/armeb-softmmu
/I${CMAKE_CURRENT_SOURCE_DIR}/qemu/target/arm
)
else()
target_compile_options(armeb-softmmu PRIVATE
-DNEED_CPU_H
-include armeb.h
-I${CMAKE_BINARY_DIR}/armeb-softmmu
-I${CMAKE_CURRENT_SOURCE_DIR}/qemu/target/arm
)
endif()
if(UNICORN_TRACER)
target_compile_options(armeb-softmmu PRIVATE -DUNICORN_TRACER)
endif()
endif()
if(UNICORN_HAS_AARCH64)
@ -577,51 +530,6 @@ if(UNICORN_TRACER)
target_compile_options(aarch64-softmmu PRIVATE -DUNICORN_TRACER)
endif()
add_library(aarch64eb-softmmu STATIC
${UNICORN_ARCH_COMMON}
qemu/target/arm/cpu64.c
qemu/target/arm/cpu.c
qemu/target/arm/crypto_helper.c
qemu/target/arm/debug_helper.c
qemu/target/arm/helper-a64.c
qemu/target/arm/helper.c
qemu/target/arm/iwmmxt_helper.c
qemu/target/arm/m_helper.c
qemu/target/arm/neon_helper.c
qemu/target/arm/op_helper.c
qemu/target/arm/pauth_helper.c
qemu/target/arm/psci.c
qemu/target/arm/sve_helper.c
qemu/target/arm/tlb_helper.c
qemu/target/arm/translate-a64.c
qemu/target/arm/translate.c
qemu/target/arm/translate-sve.c
qemu/target/arm/vec_helper.c
qemu/target/arm/vfp_helper.c
qemu/target/arm/unicorn_aarch64.c
)
if(MSVC)
target_compile_options(aarch64eb-softmmu PRIVATE
-DNEED_CPU_H
/FIaarch64eb.h
/I${CMAKE_CURRENT_SOURCE_DIR}/msvc/aarch64eb-softmmu
/I${CMAKE_CURRENT_SOURCE_DIR}/qemu/target/arm
)
else()
target_compile_options(aarch64eb-softmmu PRIVATE
-DNEED_CPU_H
-include aarch64eb.h
-I${CMAKE_BINARY_DIR}/aarch64eb-softmmu
-I${CMAKE_CURRENT_SOURCE_DIR}/qemu/target/arm
)
endif()
if(UNICORN_TRACER)
target_compile_options(aarch64eb-softmmu PRIVATE -DUNICORN_TRACER)
endif()
endif()
if(UNICORN_HAS_M68K)
@ -1196,18 +1104,16 @@ if(UNICORN_HAS_X86)
endif()
if(UNICORN_HAS_ARM)
set(UNICORN_COMPILE_OPTIONS ${UNICORN_COMPILE_OPTIONS} -DUNICORN_HAS_ARM)
set(UNICORN_LINK_LIBRARIES ${UNICORN_LINK_LIBRARIES} arm-softmmu armeb-softmmu)
set(UNICORN_LINK_LIBRARIES ${UNICORN_LINK_LIBRARIES} arm-softmmu)
set(UNICORN_SAMPLE_FILE ${UNICORN_SAMPLE_FILE} sample_arm)
target_link_libraries(arm-softmmu PRIVATE unicorn-common)
target_link_libraries(armeb-softmmu PRIVATE unicorn-common)
set(UNICORN_TEST_FILE ${UNICORN_TEST_FILE} test_arm)
endif()
if(UNICORN_HAS_AARCH64)
set(UNICORN_COMPILE_OPTIONS ${UNICORN_COMPILE_OPTIONS} -DUNICORN_HAS_ARM64)
set(UNICORN_LINK_LIBRARIES ${UNICORN_LINK_LIBRARIES} aarch64-softmmu aarch64eb-softmmu)
set(UNICORN_LINK_LIBRARIES ${UNICORN_LINK_LIBRARIES} aarch64-softmmu)
set(UNICORN_SAMPLE_FILE ${UNICORN_SAMPLE_FILE} sample_arm64)
target_link_libraries(aarch64-softmmu PRIVATE unicorn-common)
target_link_libraries(aarch64eb-softmmu PRIVATE unicorn-common)
set(UNICORN_TEST_FILE ${UNICORN_TEST_FILE} test_arm64)
endif()
if(UNICORN_HAS_M68K)
@ -1327,7 +1233,7 @@ endif()
if(UNICORN_FUZZ)
set(UNICORN_FUZZ_SUFFIX "arm_arm;arm_armbe;arm_thumb;arm64_arm;arm64_armbe;m68k_be;mips_32be;mips_32le;sparc_32be;x86_16;x86_32;x86_64;s390x_be")
set(UNICORN_FUZZ_SUFFIX "arm_arm;arm_thumb;arm64_arm;m68k_be;mips_32be;mips_32le;sparc_32be;x86_16;x86_32;x86_64;s390x_be")
if (NOT APPLE)
set(SAMPLES_LIB ${SAMPLES_LIB} rt)
endif()

3
include/uc_priv.h
View File

@ -19,7 +19,8 @@
// They should be updated when changes are made to the uc_mode enum typedef.
#define UC_MODE_ARM_MASK \
(UC_MODE_ARM | UC_MODE_THUMB | UC_MODE_LITTLE_ENDIAN | UC_MODE_MCLASS | \
UC_MODE_ARM926 | UC_MODE_ARM946 | UC_MODE_ARM1176 | UC_MODE_BIG_ENDIAN)
UC_MODE_ARM926 | UC_MODE_ARM946 | UC_MODE_ARM1176 | UC_MODE_BIG_ENDIAN | \
UC_MODE_ARMBE8)
#define UC_MODE_MIPS_MASK \
(UC_MODE_MIPS32 | UC_MODE_MIPS64 | UC_MODE_LITTLE_ENDIAN | \
UC_MODE_BIG_ENDIAN)

4
include/unicorn/unicorn.h
View File

@ -116,7 +116,9 @@ typedef enum uc_mode {
UC_MODE_THUMB = 1 << 4, // THUMB mode (including Thumb-2)
// Depreciated, use UC_ARM_CPU_* with uc_ctl instead.
UC_MODE_MCLASS = 1 << 5, // ARM's Cortex-M series.
UC_MODE_V8 = 1 << 6, // ARMv8 A32 encodings for ARM (currently unsupported)
UC_MODE_V8 = 1 << 6, // ARMv8 A32 encodings for ARM
UC_MODE_ARMBE8 = 1 << 7, // Big-endian data and Little-endian code.
// Legacy support for UC1 only.
// arm (32bit) cpu types
// Depreciated, use UC_ARM_CPU_* with uc_ctl instead.

2979
qemu/aarch64eb.h
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File diff suppressed because it is too large Load Diff

1988
qemu/armeb.h
View File

File diff suppressed because it is too large Load Diff

8
qemu/target/arm/arm_ldst.h
View File

@ -41,9 +41,11 @@ static inline uint16_t arm_lduw_code(CPUARMState *env, target_ulong addr,
TCGContext *tcg_ctx = env->uc->tcg_ctx;
/* In big-endian (BE32) mode, adjacent Thumb instructions have been swapped
within each word. Undo that now. */
if (sctlr_b) {
addr ^= 2;
}
// Unicorn: Note that we don't have any loader so this patch makes no sense.
// And sctlr_b is 0 in aarch64.
// if (sctlr_b) {
// addr ^= 2;
// }
return translator_lduw_swap(tcg_ctx, env, addr, bswap_code(sctlr_b));
}

34
qemu/target/arm/cpu.c
View File

@ -2100,6 +2100,7 @@ ARMCPU *cpu_arm_init(struct uc_struct *uc)
ARMCPU *cpu;
CPUState *cs;
CPUClass *cc;
CPUARMState *env;
cpu = calloc(1, sizeof(*cpu));
if (cpu == NULL) {
@ -2116,7 +2117,11 @@ ARMCPU *cpu_arm_init(struct uc_struct *uc)
} else if (uc->mode & UC_MODE_ARM1176) {
uc->cpu_model = UC_CPU_ARM_1176;
} else if (uc->cpu_model == INT_MAX) {
uc->cpu_model = UC_CPU_ARM_CORTEX_A15; // cortex-a15
if (uc->mode & UC_MODE_BIG_ENDIAN) {
uc->cpu_model = UC_CPU_ARM_1176; // For BE32 mode.
} else {
uc->cpu_model = UC_CPU_ARM_CORTEX_A15; // cortex-a15
}
} else if (uc->cpu_model >= ARR_SIZE(arm_cpus)) {
free(cpu);
return NULL;
@ -2162,5 +2167,32 @@ ARMCPU *cpu_arm_init(struct uc_struct *uc)
qemu_init_vcpu(cs);
// UC_MODE_BIG_ENDIAN means big endian code and big endian
// data (BE32), which is only supported before ARMv7-A.
//
// UC_MODE_ARMBE8 shouldn't exist in fact. We do this for
// backward compatibility.
//
// UC_MODE_ARMBE8 -> little endian code, big endian data
// UC_MODE_ARMBE8 | UC_MODE_BIG_ENDIAN -> big endian code, big endian data
//
// In QEMU, all arm instruction fetch **should be** little endian, however
// we hack it to support BE32.
//
// Reference:
// https://developer.arm.com/documentation/ddi0406/c/Application-Level-Architecture/Application-Level-Memory-Model/Endian-support/Instruction-endianness?lang=en
// https://developer.arm.com/documentation/den0024/a/ARMv8-Registers/Endianness
env = &cpu->env;
if (uc->mode & UC_MODE_ARMBE8 || uc->mode & UC_MODE_BIG_ENDIAN) {
// Big endian data access.
env->uncached_cpsr |= CPSR_E;
}
if (uc->mode & UC_MODE_BIG_ENDIAN && !arm_feature(env, ARM_FEATURE_V7) && !arm_feature(env, ARM_FEATURE_V8)) {
// Big endian code access.
env->cp15.sctlr_ns |= SCTLR_B;
}
arm_rebuild_hflags(env);
return cpu;
}

5
qemu/target/arm/cpu.h
View File

@ -3233,7 +3233,10 @@ static inline bool bswap_code(bool sctlr_b)
/* All code access in ARM is little endian, and there are no loaders
* doing swaps that need to be reversed
*/
return 0;
// return 0;
// Unicorn: Our hack to support BE32 for system emulation, which
// I believe shouldn't have existed...
return sctlr_b;
}
void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,

11
qemu/target/arm/cpu64.c
View File

@ -323,6 +323,7 @@ ARMCPU *cpu_aarch64_init(struct uc_struct *uc)
ARMCPU *cpu;
CPUState *cs;
CPUClass *cc;
CPUARMState *env;
cpu = calloc(1, sizeof(*cpu));
if (cpu == NULL) {
@ -369,5 +370,15 @@ ARMCPU *cpu_aarch64_init(struct uc_struct *uc)
qemu_init_vcpu(cs);
env = &cpu->env;
if (uc->mode & UC_MODE_BIG_ENDIAN) {
for (int i = 0; i < 4; i ++) {
env->cp15.sctlr_el[i] |= SCTLR_EE;
env->cp15.sctlr_el[i] |= SCTLR_E0E;
}
}
arm_rebuild_hflags(env);
return cpu;
}

5
qemu/target/arm/translate-a64.c
View File

@ -14411,10 +14411,7 @@ static void disas_a64_insn(CPUARMState *env, DisasContext *s)
s->pc_curr = s->base.pc_next;
insn = arm_ldl_code(env, s->base.pc_next, s->sctlr_b);
#ifdef TARGET_WORDS_BIGENDIAN
/* aarch64eb swap again to little endian */
insn = bswap32(insn);
#endif
s->insn = insn;
s->base.pc_next += 4;

10
qemu/target/arm/unicorn.h
View File

@ -18,25 +18,15 @@ int arm_context_reg_read(struct uc_context *ctx, unsigned int *regs,
void **vals, int count);
int arm_context_reg_write(struct uc_context *ctx, unsigned int *regs,
void *const *vals, int count);
int armeb_context_reg_read(struct uc_context *ctx, unsigned int *regs,
void **vals, int count);
int armeb_context_reg_write(struct uc_context *ctx, unsigned int *regs,
void *const *vals, int count);
int arm64_context_reg_read(struct uc_context *ctx, unsigned int *regs,
void **vals, int count);
int arm64_context_reg_write(struct uc_context *ctx, unsigned int *regs,
void *const *vals, int count);
int arm64eb_context_reg_read(struct uc_context *ctx, unsigned int *regs,
void **vals, int count);
int arm64eb_context_reg_write(struct uc_context *ctx, unsigned int *regs,
void *const *vals, int count);
void arm_reg_reset(struct uc_struct *uc);
void arm64_reg_reset(struct uc_struct *uc);
void arm_uc_init(struct uc_struct *uc);
void armeb_uc_init(struct uc_struct *uc);
void arm64_uc_init(struct uc_struct *uc);
void arm64eb_uc_init(struct uc_struct *uc);
#endif

4
qemu/target/arm/unicorn_aarch64.c
View File

@ -425,11 +425,7 @@ static int arm64_cpus_init(struct uc_struct *uc, const char *cpu_model)
}
DEFAULT_VISIBILITY
#ifdef TARGET_WORDS_BIGENDIAN
void arm64eb_uc_init(struct uc_struct *uc)
#else
void arm64_uc_init(struct uc_struct *uc)
#endif
{
uc->reg_read = arm64_reg_read;
uc->reg_write = arm64_reg_write;

14
qemu/target/arm/unicorn_arm.c
View File

@ -473,13 +473,8 @@ int arm_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals,
}
DEFAULT_VISIBILITY
#ifdef TARGET_WORDS_BIGENDIAN
int armeb_context_reg_read(struct uc_context *ctx, unsigned int *regs,
void **vals, int count)
#else
int arm_context_reg_read(struct uc_context *ctx, unsigned int *regs,
void **vals, int count)
#endif
{
CPUARMState *env = (CPUARMState *)ctx->data;
int i;
@ -498,13 +493,8 @@ int arm_context_reg_read(struct uc_context *ctx, unsigned int *regs,
}
DEFAULT_VISIBILITY
#ifdef TARGET_WORDS_BIGENDIAN
int armeb_context_reg_write(struct uc_context *ctx, unsigned int *regs,
void *const *vals, int count)
#else
int arm_context_reg_write(struct uc_context *ctx, unsigned int *regs,
void *const *vals, int count)
#endif
{
CPUARMState *env = (CPUARMState *)ctx->data;
int i;
@ -581,11 +571,7 @@ static int arm_cpus_init(struct uc_struct *uc, const char *cpu_model)
return 0;
}
#ifdef TARGET_WORDS_BIGENDIAN
void armeb_uc_init(struct uc_struct *uc)
#else
void arm_uc_init(struct uc_struct *uc)
#endif
{
uc->reg_read = arm_reg_read;
uc->reg_write = arm_reg_write;

6
symbols.sh
View File

@ -2597,8 +2597,6 @@ usra_op \
ssra_op \
"
armeb_SYMBOLS=${arm_SYMBOLS}
aarch64_SYMBOLS="
cpu_aarch64_init \
arm_cpu_exec_interrupt \
@ -4301,8 +4299,6 @@ aarch64_translator_ops \
pred_esz_masks \
"
aarch64eb_SYMBOLS=${aarch64_SYMBOLS}
riscv32_SYMBOLS="
riscv_cpu_mmu_index \
riscv_cpu_exec_interrupt \
@ -6274,7 +6270,7 @@ ppc64_SYMBOLS=${ppc_SYMBOLS}
s390x_SYMBOLS="helper_uc_s390x_exit \
"
ARCHS="x86_64 arm armeb aarch64 aarch64eb riscv32 riscv64 mips mipsel mips64 mips64el sparc sparc64 m68k ppc ppc64 s390x"
ARCHS="x86_64 arm aarch64 riscv32 riscv64 mips mipsel mips64 mips64el sparc sparc64 m68k ppc ppc64 s390x"
for arch in $ARCHS; do

34
tests/unit/test_arm.c
View File

@ -63,6 +63,37 @@ static void test_armeb_sub()
int r_r1;
uc_common_setup(&uc, UC_ARCH_ARM, UC_MODE_ARM | UC_MODE_BIG_ENDIAN, code,
sizeof(code) - 1, UC_CPU_ARM_1176);
OK(uc_reg_write(uc, UC_ARM_REG_R0, &r_r0));
OK(uc_reg_write(uc, UC_ARM_REG_R2, &r_r2));
OK(uc_reg_write(uc, UC_ARM_REG_R3, &r_r3));
OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
OK(uc_reg_read(uc, UC_ARM_REG_R0, &r_r0));
OK(uc_reg_read(uc, UC_ARM_REG_R1, &r_r1));
OK(uc_reg_read(uc, UC_ARM_REG_R2, &r_r2));
OK(uc_reg_read(uc, UC_ARM_REG_R3, &r_r3));
TEST_CHECK(r_r0 == 0x37);
TEST_CHECK(r_r2 == 0x6789);
TEST_CHECK(r_r3 == 0x3333);
TEST_CHECK(r_r1 == 0x3456);
OK(uc_close(uc));
}
static void test_armeb_be8_sub()
{
uc_engine *uc;
char code[] =
"\x37\x00\xa0\xe3\x03\x10\x42\xe0"; // mov r0, #0x37; sub r1, r2, r3
int r_r0 = 0x1234;
int r_r2 = 0x6789;
int r_r3 = 0x3333;
int r_r1;
uc_common_setup(&uc, UC_ARCH_ARM, UC_MODE_ARM | UC_MODE_ARMBE8, code,
sizeof(code) - 1, UC_CPU_ARM_CORTEX_A15);
OK(uc_reg_write(uc, UC_ARM_REG_R0, &r_r0));
OK(uc_reg_write(uc, UC_ARM_REG_R2, &r_r2));
@ -90,7 +121,7 @@ static void test_arm_thumbeb_sub()
int r_sp = 0x1234;
uc_common_setup(&uc, UC_ARCH_ARM, UC_MODE_THUMB | UC_MODE_BIG_ENDIAN, code,
sizeof(code) - 1, UC_CPU_ARM_CORTEX_A15);
sizeof(code) - 1, UC_CPU_ARM_1176);
OK(uc_reg_write(uc, UC_ARM_REG_SP, &r_sp));
OK(uc_emu_start(uc, code_start | 1, code_start + sizeof(code) - 1, 0, 0));
@ -618,6 +649,7 @@ static void test_arm_read_sctlr()
TEST_LIST = {{"test_arm_nop", test_arm_nop},
{"test_arm_thumb_sub", test_arm_thumb_sub},
{"test_armeb_sub", test_armeb_sub},
{"test_armeb_be8_sub", test_armeb_be8_sub},
{"test_arm_thumbeb_sub", test_arm_thumbeb_sub},
{"test_arm_thumb_ite", test_arm_thumb_ite},
{"test_arm_m_thumb_mrs", test_arm_m_thumb_mrs},

42
uc.c
View File

@ -243,11 +243,7 @@ uc_err uc_open(uc_arch arch, uc_mode mode, uc_engine **result)
free(uc);
return UC_ERR_MODE;
}
if (mode & UC_MODE_BIG_ENDIAN) {
uc->init_arch = armeb_uc_init;
} else {
uc->init_arch = arm_uc_init;
}
uc->init_arch = arm_uc_init;
if (mode & UC_MODE_THUMB) {
uc->thumb = 1;
@ -260,11 +256,7 @@ uc_err uc_open(uc_arch arch, uc_mode mode, uc_engine **result)
free(uc);
return UC_ERR_MODE;
}
if (mode & UC_MODE_BIG_ENDIAN) {
uc->init_arch = arm64eb_uc_init;
} else {
uc->init_arch = arm64_uc_init;
}
uc->init_arch = arm64_uc_init;
break;
#endif
@ -1860,23 +1852,14 @@ static void find_context_reg_rw_function(uc_arch arch, uc_mode mode,
#endif
#ifdef UNICORN_HAS_ARM
case UC_ARCH_ARM:
if (mode & UC_MODE_BIG_ENDIAN) {
rw->context_reg_read = armeb_context_reg_read;
rw->context_reg_write = armeb_context_reg_write;
} else {
rw->context_reg_read = arm_context_reg_read;
rw->context_reg_write = arm_context_reg_write;
}
rw->context_reg_read = arm_context_reg_read;
rw->context_reg_write = arm_context_reg_write;
break;
#endif
#ifdef UNICORN_HAS_ARM64
case UC_ARCH_ARM64:
if (mode & UC_MODE_BIG_ENDIAN) {
rw->context_reg_read = arm64eb_context_reg_read;
rw->context_reg_write = arm64eb_context_reg_write;
} else {
rw->context_reg_read = arm64_context_reg_read;
rw->context_reg_write = arm64_context_reg_write;
}
rw->context_reg_read = arm64_context_reg_read;
rw->context_reg_write = arm64_context_reg_write;
break;
#endif
@ -2177,6 +2160,17 @@ uc_err uc_ctl(uc_engine *uc, uc_control_type control, ...)
break;
}
if (uc->arch == UC_ARCH_ARM) {
if (uc->mode & UC_MODE_BIG_ENDIAN) {
// These cpu models don't support big endian code access.
if (model <= UC_CPU_ARM_CORTEX_A15 &&
model >= UC_CPU_ARM_CORTEX_A7) {
err = UC_ERR_ARG;
break;
}
}
}
uc->cpu_model = model;
err = UC_ERR_OK;