Fix x86 CPUID
This commit is contained in:
lazymio
parent
3184d3fcdf
commit
ef6f8a2427
@ -30,6 +30,11 @@
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#include "uc_priv.h"
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static void x86_cpuid_version_set_family(X86CPU *cpu, int64_t value);
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static void x86_cpuid_version_set_model(X86CPU *cpu, int64_t value);
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static void x86_cpuid_version_set_stepping(X86CPU *cpu, int64_t value);
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static void x86_cpuid_set_model_id(X86CPU *cpu, const char* model_id);
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static void x86_cpuid_set_vendor(X86CPU *cpu , const char *value);
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/* Helpers for building CPUID[2] descriptors: */
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@ -3855,6 +3860,12 @@ static void x86_cpu_load_model(X86CPU *cpu, X86CPUModel *model)
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CPUX86State *env = &cpu->env;
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FeatureWord w;
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env->cpuid_min_level = def->level;
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env->cpuid_xlevel = def->xlevel;
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x86_cpuid_version_set_family(cpu, def->family);
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x86_cpuid_version_set_model(cpu, def->model);
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x86_cpuid_version_set_stepping(cpu, def->stepping);
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x86_cpuid_set_model_id(cpu, def->model_id);
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for (w = 0; w < FEATURE_WORDS; w++) {
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env->features[w] = def->features[w];
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}
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@ -3875,6 +3886,8 @@ static void x86_cpu_load_model(X86CPU *cpu, X86CPUModel *model)
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uint32_t ebx = 0, ecx = 0, edx = 0;
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host_cpuid(0, 0, NULL, &ebx, &ecx, &edx);
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}
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x86_cpuid_set_vendor(cpu, def->vendor);
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}
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void cpu_clear_apic_feature(CPUX86State *env)
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@ -3882,6 +3895,98 @@ void cpu_clear_apic_feature(CPUX86State *env)
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env->features[FEAT_1_EDX] &= ~CPUID_APIC;
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}
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static void x86_cpuid_version_set_family(X86CPU *cpu, int64_t value)
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{
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CPUX86State *env = &cpu->env;
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const int64_t min = 0;
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const int64_t max = 0xff + 0xf;
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if (value < min || value > max) {
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// error_setg(errp, QERR_PROPERTY_VALUE_OUT_OF_RANGE, "",
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// name ? name : "null", value, min, max);
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return;
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}
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env->cpuid_version &= ~0xff00f00;
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if (value > 0x0f) {
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env->cpuid_version |= 0xf00 | ((value - 0x0f) << 20);
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} else {
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env->cpuid_version |= value << 8;
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}
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}
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static void x86_cpuid_version_set_model(X86CPU *cpu, int64_t value)
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{
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CPUX86State *env = &cpu->env;
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const int64_t min = 0;
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const int64_t max = 0xff;
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if (value < min || value > max) {
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// error_setg(errp, QERR_PROPERTY_VALUE_OUT_OF_RANGE, "",
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// name ? name : "null", value, min, max);
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return;
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}
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env->cpuid_version &= ~0xf00f0;
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env->cpuid_version |= ((value & 0xf) << 4) | ((value >> 4) << 16);
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}
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static void x86_cpuid_version_set_stepping(X86CPU *cpu, int64_t value)
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{
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CPUX86State *env = &cpu->env;
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const int64_t min = 0;
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const int64_t max = 0xf;
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if (value < min || value > max) {
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// error_setg(errp, QERR_PROPERTY_VALUE_OUT_OF_RANGE, "",
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// name ? name : "null", value, min, max);
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return;
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}
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env->cpuid_version &= ~0xf;
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env->cpuid_version |= value & 0xf;
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}
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static void x86_cpuid_set_model_id(X86CPU *cpu, const char* model_id)
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{
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CPUX86State *env = &cpu->env;
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int c, len, i;
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if (model_id == NULL) {
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model_id = "";
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}
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len = strlen(model_id);
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memset(env->cpuid_model, 0, 48);
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for (i = 0; i < 48; i++) {
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if (i >= len) {
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c = '\0';
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} else {
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c = (uint8_t)model_id[i];
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}
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env->cpuid_model[i >> 2] |= c << (8 * (i & 3));
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}
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}
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static void x86_cpuid_set_vendor(X86CPU *cpu , const char *value)
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{
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CPUX86State *env = &cpu->env;
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int i;
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if (strlen(value) != CPUID_VENDOR_SZ) {
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// error_setg(errp, QERR_PROPERTY_VALUE_BAD, "", "vendor", value);
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return;
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}
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env->cpuid_vendor1 = 0;
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env->cpuid_vendor2 = 0;
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env->cpuid_vendor3 = 0;
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for (i = 0; i < 4; i++) {
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env->cpuid_vendor1 |= ((uint8_t)value[i ]) << (8 * i);
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env->cpuid_vendor2 |= ((uint8_t)value[i + 4]) << (8 * i);
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env->cpuid_vendor3 |= ((uint8_t)value[i + 8]) << (8 * i);
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}
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}
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void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
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uint32_t *eax, uint32_t *ebx,
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uint32_t *ecx, uint32_t *edx)
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@ -4484,6 +4589,192 @@ static void mce_init(X86CPU *cpu)
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}
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}
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static void x86_cpu_adjust_level(X86CPU *cpu, uint32_t *min, uint32_t value)
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{
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if (*min < value) {
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*min = value;
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}
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}
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/* Increase cpuid_min_{level,xlevel,xlevel2} automatically, if appropriate */
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static void x86_cpu_adjust_feat_level(X86CPU *cpu, FeatureWord w)
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{
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CPUX86State *env = &cpu->env;
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FeatureWordInfo *fi = &feature_word_info[w];
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uint32_t eax = fi->cpuid.eax;
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uint32_t region = eax & 0xF0000000;
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assert(feature_word_info[w].type == CPUID_FEATURE_WORD);
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if (!env->features[w]) {
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return;
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}
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switch (region) {
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case 0x00000000:
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x86_cpu_adjust_level(cpu, &env->cpuid_min_level, eax);
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break;
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case 0x80000000:
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x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, eax);
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break;
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case 0xC0000000:
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x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel2, eax);
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break;
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}
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if (eax == 7) {
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x86_cpu_adjust_level(cpu, &env->cpuid_min_level_func7,
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fi->cpuid.ecx);
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}
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}
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/* Calculate XSAVE components based on the configured CPU feature flags */
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static void x86_cpu_enable_xsave_components(X86CPU *cpu)
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{
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CPUX86State *env = &cpu->env;
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int i;
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uint64_t mask;
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if (!(env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE)) {
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return;
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}
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mask = 0;
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for (i = 0; i < ARRAY_SIZE(x86_ext_save_areas); i++) {
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const ExtSaveArea *esa = &x86_ext_save_areas[i];
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if (env->features[esa->feature] & esa->bits) {
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mask |= (1ULL << i);
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}
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}
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env->features[FEAT_XSAVE_COMP_LO] = mask;
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env->features[FEAT_XSAVE_COMP_HI] = mask >> 32;
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}
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/***** Steps involved on loading and filtering CPUID data
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*
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* When initializing and realizing a CPU object, the steps
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* involved in setting up CPUID data are:
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*
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* 1) Loading CPU model definition (X86CPUDefinition). This is
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* implemented by x86_cpu_load_model() and should be completely
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* transparent, as it is done automatically by instance_init.
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* No code should need to look at X86CPUDefinition structs
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* outside instance_init.
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*
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* 2) CPU expansion. This is done by realize before CPUID
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* filtering, and will make sure host/accelerator data is
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* loaded for CPU models that depend on host capabilities
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* (e.g. "host"). Done by x86_cpu_expand_features().
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*
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* 3) CPUID filtering. This initializes extra data related to
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* CPUID, and checks if the host supports all capabilities
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* required by the CPU. Runnability of a CPU model is
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* determined at this step. Done by x86_cpu_filter_features().
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*
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* Some operations don't require all steps to be performed.
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* More precisely:
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*
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* - CPU instance creation (instance_init) will run only CPU
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* model loading. CPU expansion can't run at instance_init-time
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* because host/accelerator data may be not available yet.
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* - CPU realization will perform both CPU model expansion and CPUID
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* filtering, and return an error in case one of them fails.
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* - query-cpu-definitions needs to run all 3 steps. It needs
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* to run CPUID filtering, as the 'unavailable-features'
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* field is set based on the filtering results.
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* - The query-cpu-model-expansion QMP command only needs to run
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* CPU model loading and CPU expansion. It should not filter
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* any CPUID data based on host capabilities.
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*/
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/* Expand CPU configuration data, based on configured features
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* and host/accelerator capabilities when appropriate.
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*/
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static void x86_cpu_expand_features(X86CPU *cpu)
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{
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CPUX86State *env = &cpu->env;
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FeatureWord w;
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/*TODO: Now cpu->max_features doesn't overwrite features
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* set using QOM properties, and we can convert
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* plus_features & minus_features to global properties
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* inside x86_cpu_parse_featurestr() too.
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*/
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if (cpu->max_features) {
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for (w = 0; w < FEATURE_WORDS; w++) {
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/* Override only features that weren't set explicitly
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* by the user.
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*/
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env->features[w] |=
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x86_cpu_get_supported_feature_word(w, cpu->migratable) &
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~env->user_features[w] & \
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~feature_word_info[w].no_autoenable_flags;
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}
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}
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env->features[FEAT_KVM] = 0;
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x86_cpu_enable_xsave_components(cpu);
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/* CPUID[EAX=7,ECX=0].EBX always increased level automatically: */
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x86_cpu_adjust_feat_level(cpu, FEAT_7_0_EBX);
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if (cpu->full_cpuid_auto_level) {
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x86_cpu_adjust_feat_level(cpu, FEAT_1_EDX);
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x86_cpu_adjust_feat_level(cpu, FEAT_1_ECX);
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x86_cpu_adjust_feat_level(cpu, FEAT_6_EAX);
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x86_cpu_adjust_feat_level(cpu, FEAT_7_0_ECX);
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x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EAX);
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x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_EDX);
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x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_ECX);
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x86_cpu_adjust_feat_level(cpu, FEAT_8000_0007_EDX);
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x86_cpu_adjust_feat_level(cpu, FEAT_8000_0008_EBX);
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x86_cpu_adjust_feat_level(cpu, FEAT_C000_0001_EDX);
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x86_cpu_adjust_feat_level(cpu, FEAT_SVM);
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x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE);
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/* Intel Processor Trace requires CPUID[0x14] */
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if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT)) {
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if (cpu->intel_pt_auto_level) {
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x86_cpu_adjust_level(cpu, &cpu->env.cpuid_min_level, 0x14);
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} else if (cpu->env.cpuid_min_level < 0x14) {
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// TODO: Add a warning?
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// mark_unavailable_features(cpu, FEAT_7_0_EBX,
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// CPUID_7_0_EBX_INTEL_PT,
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// "Intel PT need CPUID leaf 0x14, please set by \"-cpu ...,+intel-pt,level=0x14\"");
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}
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}
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/* CPU topology with multi-dies support requires CPUID[0x1F] */
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if (env->nr_dies > 1) {
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x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x1F);
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}
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/* SVM requires CPUID[0x8000000A] */
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if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) {
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x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A);
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}
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/* SEV requires CPUID[0x8000001F] */
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// if (sev_enabled()) {
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// x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F);
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// }
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}
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/* Set cpuid_*level* based on cpuid_min_*level, if not explicitly set */
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if (env->cpuid_level_func7 == UINT32_MAX) {
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env->cpuid_level_func7 = env->cpuid_min_level_func7;
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}
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if (env->cpuid_level == UINT32_MAX) {
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env->cpuid_level = env->cpuid_min_level;
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}
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if (env->cpuid_xlevel == UINT32_MAX) {
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env->cpuid_xlevel = env->cpuid_min_xlevel;
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}
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if (env->cpuid_xlevel2 == UINT32_MAX) {
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env->cpuid_xlevel2 = env->cpuid_min_xlevel2;
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}
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}
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/*
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* Finishes initialization of CPUID data, filters CPU feature
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* words based on host availability of each feature.
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@ -4530,6 +4821,8 @@ static void x86_cpu_realizefn(struct uc_struct *uc, CPUState *dev)
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return;
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}
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x86_cpu_expand_features(cpu);
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x86_cpu_filter_features(cpu, cpu->check_cpuid || cpu->enforce_cpuid);
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if (cpu->enforce_cpuid && x86_cpu_have_filtered_features(cpu)) {
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@ -4804,6 +5097,10 @@ X86CPU *cpu_x86_init(struct uc_struct *uc)
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cs->cc = cc;
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cs->uc = uc;
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uc->cpu = (CPUState *)cpu;
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cpu->env.cpuid_level_func7 = UINT32_MAX;
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cpu->env.cpuid_level = UINT32_MAX;
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cpu->env.cpuid_xlevel = UINT32_MAX;
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cpu->env.cpuid_xlevel2 = UINT32_MAX;
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/* init CPUClass */
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cpu_class_init(uc, cc);
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@ -632,6 +632,30 @@ static void test_x86_hook_cpuid()
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OK(uc_close(uc));
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}
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static void test_x86_486_cpuid(void)
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{
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uc_engine *uc;
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uint32_t eax;
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uint32_t ebx;
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char code[] = {0x31, 0xC0, 0x0F, 0xA2}; // XOR EAX EAX; CPUID
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OK(uc_open(UC_ARCH_X86, UC_MODE_32, &uc));
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OK(uc_ctl_set_cpu_model(uc, UC_CPU_X86_486));
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OK(uc_mem_map(uc, 0, 4 * 1024, UC_PROT_ALL));
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OK(uc_mem_write(uc, 0, code, sizeof(code) / sizeof(code[0])));
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OK(uc_emu_start(uc, 0, sizeof(code) / sizeof(code[0]), 0, 0));
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/* Read eax after emulation */
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OK(uc_reg_read(uc, UC_X86_REG_EAX, &eax));
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OK(uc_reg_read(uc, UC_X86_REG_EBX, &ebx));
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TEST_CHECK(eax != 0);
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TEST_CHECK(ebx == 0x756e6547); // magic string "Genu" for intel cpu
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OK(uc_close(uc));
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}
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// This is a regression bug.
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static void test_x86_clear_tb_cache()
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{
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@ -870,6 +894,7 @@ TEST_LIST = {{"test_x86_in", test_x86_in},
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{"test_x86_mmio_uc_mem_rw", test_x86_mmio_uc_mem_rw},
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{"test_x86_sysenter", test_x86_sysenter},
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{"test_x86_hook_cpuid", test_x86_hook_cpuid},
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{"test_x86_486_cpuid", test_x86_486_cpuid},
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{"test_x86_clear_tb_cache", test_x86_clear_tb_cache},
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{"test_x86_clear_empty_tb", test_x86_clear_empty_tb},
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{"test_x86_hook_tcg_op", test_x86_hook_tcg_op},
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