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Check CPU model for uc_ctl

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This commit is contained in:
lazymio 2022-04-16 17:49:47 +02:00
parent a60db86144
commit b136f08f2d
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GPG Key ID: DFF27E34A47CB873
13 changed files with 426 additions and 331 deletions
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4
include/unicorn/arm.h
View File

@ -50,7 +50,9 @@ typedef enum uc_cpu_arm {
UC_CPU_ARM_PXA270B1,
UC_CPU_ARM_PXA270C0,
UC_CPU_ARM_PXA270C5,
UC_CPU_ARM_MAX
UC_CPU_ARM_MAX,
UC_CPU_ARM_ENDING
} uc_cpu_arm;
// ARM coprocessor registers, use this with UC_ARM_REG_CP_REG to

14
include/unicorn/arm64.h
View File

@ -16,12 +16,14 @@ extern "C" {
#endif
//> ARM64 CPU
typedef enum uc_cpu_aarch64 {
UC_CPU_AARCH64_A57 = 0,
UC_CPU_AARCH64_A53,
UC_CPU_AARCH64_A72,
UC_CPU_AARCH64_MAX
} uc_cpu_aarch64;
typedef enum uc_cpu_arm64 {
UC_CPU_ARM64_A57 = 0,
UC_CPU_ARM64_A53,
UC_CPU_ARM64_A72,
UC_CPU_ARM64_MAX,
UC_CPU_ARM64_ENDING
} uc_cpu_arm64;
// ARM64 coprocessor registers, use this with UC_ARM64_REG_CP_REG to
// in call to uc_reg_write/read() to access the registers.

2
include/unicorn/m68k.h
View File

@ -26,6 +26,8 @@ typedef enum uc_cpu_m68k {
UC_CPU_M68K_M5208,
UC_CPU_M68K_CFV4E,
UC_CPU_M68K_ANY,
UC_CPU_M68K_ENDING
} uc_cpu_m68k;
//> M68K registers

6
include/unicorn/mips.h
View File

@ -37,6 +37,8 @@ typedef enum uc_cpu_mips32 {
UC_CPU_MIPS32_P5600,
UC_CPU_MIPS32_MIPS32R6_GENERIC,
UC_CPU_MIPS32_I7200,
UC_CPU_MIPS32_ENDING
} uc_cpu_mips32;
//> MIPS64 CPUS
@ -53,7 +55,9 @@ typedef enum uc_cpu_mips64 {
UC_CPU_MIPS64_I6500,
UC_CPU_MIPS64_LOONGSON_2E,
UC_CPU_MIPS64_LOONGSON_2F,
UC_CPU_MIPS64_MIPS64DSPR2
UC_CPU_MIPS64_MIPS64DSPR2,
UC_CPU_MIPS64_ENDING
} uc_cpu_mips64;
//> MIPS registers

622
include/unicorn/ppc.h
View File

@ -17,319 +17,323 @@ extern "C" {
//> PPC CPU
typedef enum uc_cpu_ppc {
UC_CPU_PPC_401 = 0,
UC_CPU_PPC_401A1,
UC_CPU_PPC_401B2,
UC_CPU_PPC_401C2,
UC_CPU_PPC_401D2,
UC_CPU_PPC_401E2,
UC_CPU_PPC_401F2,
UC_CPU_PPC_401G2,
UC_CPU_PPC_IOP480,
UC_CPU_PPC_COBRA,
UC_CPU_PPC_403GA,
UC_CPU_PPC_403GB,
UC_CPU_PPC_403GC,
UC_CPU_PPC_403GCX,
UC_CPU_PPC_405D2,
UC_CPU_PPC_405D4,
UC_CPU_PPC_405CRA,
UC_CPU_PPC_405CRB,
UC_CPU_PPC_405CRC,
UC_CPU_PPC_405EP,
UC_CPU_PPC_405EZ,
UC_CPU_PPC_405GPA,
UC_CPU_PPC_405GPB,
UC_CPU_PPC_405GPC,
UC_CPU_PPC_405GPD,
UC_CPU_PPC_405GPR,
UC_CPU_PPC_405LP,
UC_CPU_PPC_NPE405H,
UC_CPU_PPC_NPE405H2,
UC_CPU_PPC_NPE405L,
UC_CPU_PPC_NPE4GS3,
UC_CPU_PPC_STB03,
UC_CPU_PPC_STB04,
UC_CPU_PPC_STB25,
UC_CPU_PPC_X2VP4,
UC_CPU_PPC_X2VP20,
UC_CPU_PPC_440_XILINX,
UC_CPU_PPC_440_XILINX_W_DFPU,
UC_CPU_PPC_440EPA,
UC_CPU_PPC_440EPB,
UC_CPU_PPC_440EPX,
UC_CPU_PPC_460EXB,
UC_CPU_PPC_G2,
UC_CPU_PPC_G2H4,
UC_CPU_PPC_G2GP,
UC_CPU_PPC_G2LS,
UC_CPU_PPC_G2HIP3,
UC_CPU_PPC_G2HIP4,
UC_CPU_PPC_MPC603,
UC_CPU_PPC_G2LE,
UC_CPU_PPC_G2LEGP,
UC_CPU_PPC_G2LELS,
UC_CPU_PPC_G2LEGP1,
UC_CPU_PPC_G2LEGP3,
UC_CPU_PPC_MPC5200_V10,
UC_CPU_PPC_MPC5200_V11,
UC_CPU_PPC_MPC5200_V12,
UC_CPU_PPC_MPC5200B_V20,
UC_CPU_PPC_MPC5200B_V21,
UC_CPU_PPC_E200Z5,
UC_CPU_PPC_E200Z6,
UC_CPU_PPC_E300C1,
UC_CPU_PPC_E300C2,
UC_CPU_PPC_E300C3,
UC_CPU_PPC_E300C4,
UC_CPU_PPC_MPC8343,
UC_CPU_PPC_MPC8343A,
UC_CPU_PPC_MPC8343E,
UC_CPU_PPC_MPC8343EA,
UC_CPU_PPC_MPC8347T,
UC_CPU_PPC_MPC8347P,
UC_CPU_PPC_MPC8347AT,
UC_CPU_PPC_MPC8347AP,
UC_CPU_PPC_MPC8347ET,
UC_CPU_PPC_MPC8347EP,
UC_CPU_PPC_MPC8347EAT,
UC_CPU_PPC_MPC8347EAP,
UC_CPU_PPC_MPC8349,
UC_CPU_PPC_MPC8349A,
UC_CPU_PPC_MPC8349E,
UC_CPU_PPC_MPC8349EA,
UC_CPU_PPC_MPC8377,
UC_CPU_PPC_MPC8377E,
UC_CPU_PPC_MPC8378,
UC_CPU_PPC_MPC8378E,
UC_CPU_PPC_MPC8379,
UC_CPU_PPC_MPC8379E,
UC_CPU_PPC_E500_V10,
UC_CPU_PPC_E500_V20,
UC_CPU_PPC_E500V2_V10,
UC_CPU_PPC_E500V2_V20,
UC_CPU_PPC_E500V2_V21,
UC_CPU_PPC_E500V2_V22,
UC_CPU_PPC_E500V2_V30,
UC_CPU_PPC_E500MC,
UC_CPU_PPC_MPC8533_V10,
UC_CPU_PPC_MPC8533_V11,
UC_CPU_PPC_MPC8533E_V10,
UC_CPU_PPC_MPC8533E_V11,
UC_CPU_PPC_MPC8540_V10,
UC_CPU_PPC_MPC8540_V20,
UC_CPU_PPC_MPC8540_V21,
UC_CPU_PPC_MPC8541_V10,
UC_CPU_PPC_MPC8541_V11,
UC_CPU_PPC_MPC8541E_V10,
UC_CPU_PPC_MPC8541E_V11,
UC_CPU_PPC_MPC8543_V10,
UC_CPU_PPC_MPC8543_V11,
UC_CPU_PPC_MPC8543_V20,
UC_CPU_PPC_MPC8543_V21,
UC_CPU_PPC_MPC8543E_V10,
UC_CPU_PPC_MPC8543E_V11,
UC_CPU_PPC_MPC8543E_V20,
UC_CPU_PPC_MPC8543E_V21,
UC_CPU_PPC_MPC8544_V10,
UC_CPU_PPC_MPC8544_V11,
UC_CPU_PPC_MPC8544E_V10,
UC_CPU_PPC_MPC8544E_V11,
UC_CPU_PPC_MPC8545_V20,
UC_CPU_PPC_MPC8545_V21,
UC_CPU_PPC_MPC8545E_V20,
UC_CPU_PPC_MPC8545E_V21,
UC_CPU_PPC_MPC8547E_V20,
UC_CPU_PPC_MPC8547E_V21,
UC_CPU_PPC_MPC8548_V10,
UC_CPU_PPC_MPC8548_V11,
UC_CPU_PPC_MPC8548_V20,
UC_CPU_PPC_MPC8548_V21,
UC_CPU_PPC_MPC8548E_V10,
UC_CPU_PPC_MPC8548E_V11,
UC_CPU_PPC_MPC8548E_V20,
UC_CPU_PPC_MPC8548E_V21,
UC_CPU_PPC_MPC8555_V10,
UC_CPU_PPC_MPC8555_V11,
UC_CPU_PPC_MPC8555E_V10,
UC_CPU_PPC_MPC8555E_V11,
UC_CPU_PPC_MPC8560_V10,
UC_CPU_PPC_MPC8560_V20,
UC_CPU_PPC_MPC8560_V21,
UC_CPU_PPC_MPC8567,
UC_CPU_PPC_MPC8567E,
UC_CPU_PPC_MPC8568,
UC_CPU_PPC_MPC8568E,
UC_CPU_PPC_MPC8572,
UC_CPU_PPC_MPC8572E,
UC_CPU_PPC_E600,
UC_CPU_PPC_MPC8610,
UC_CPU_PPC_MPC8641,
UC_CPU_PPC_MPC8641D,
UC_CPU_PPC_601_V0,
UC_CPU_PPC_601_V1,
UC_CPU_PPC_601_V2,
UC_CPU_PPC_602,
UC_CPU_PPC_603,
UC_CPU_PPC_603E_V1_1,
UC_CPU_PPC_603E_V1_2,
UC_CPU_PPC_603E_V1_3,
UC_CPU_PPC_603E_V1_4,
UC_CPU_PPC_603E_V2_2,
UC_CPU_PPC_603E_V3,
UC_CPU_PPC_603E_V4,
UC_CPU_PPC_603E_V4_1,
UC_CPU_PPC_603E7,
UC_CPU_PPC_603E7T,
UC_CPU_PPC_603E7V,
UC_CPU_PPC_603E7V1,
UC_CPU_PPC_603E7V2,
UC_CPU_PPC_603P,
UC_CPU_PPC_604,
UC_CPU_PPC_604E_V1_0,
UC_CPU_PPC_604E_V2_2,
UC_CPU_PPC_604E_V2_4,
UC_CPU_PPC_604R,
UC_CPU_PPC_740_V1_0,
UC_CPU_PPC_750_V1_0,
UC_CPU_PPC_740_V2_0,
UC_CPU_PPC_750_V2_0,
UC_CPU_PPC_740_V2_1,
UC_CPU_PPC_750_V2_1,
UC_CPU_PPC_740_V2_2,
UC_CPU_PPC_750_V2_2,
UC_CPU_PPC_740_V3_0,
UC_CPU_PPC_750_V3_0,
UC_CPU_PPC_740_V3_1,
UC_CPU_PPC_750_V3_1,
UC_CPU_PPC_740E,
UC_CPU_PPC_750E,
UC_CPU_PPC_740P,
UC_CPU_PPC_750P,
UC_CPU_PPC_750CL_V1_0,
UC_CPU_PPC_750CL_V2_0,
UC_CPU_PPC_750CX_V1_0,
UC_CPU_PPC_750CX_V2_0,
UC_CPU_PPC_750CX_V2_1,
UC_CPU_PPC_750CX_V2_2,
UC_CPU_PPC_750CXE_V2_1,
UC_CPU_PPC_750CXE_V2_2,
UC_CPU_PPC_750CXE_V2_3,
UC_CPU_PPC_750CXE_V2_4,
UC_CPU_PPC_750CXE_V2_4B,
UC_CPU_PPC_750CXE_V3_0,
UC_CPU_PPC_750CXE_V3_1,
UC_CPU_PPC_750CXE_V3_1B,
UC_CPU_PPC_750CXR,
UC_CPU_PPC_750FL,
UC_CPU_PPC_750FX_V1_0,
UC_CPU_PPC_750FX_V2_0,
UC_CPU_PPC_750FX_V2_1,
UC_CPU_PPC_750FX_V2_2,
UC_CPU_PPC_750FX_V2_3,
UC_CPU_PPC_750GL,
UC_CPU_PPC_750GX_V1_0,
UC_CPU_PPC_750GX_V1_1,
UC_CPU_PPC_750GX_V1_2,
UC_CPU_PPC_750L_V2_0,
UC_CPU_PPC_750L_V2_1,
UC_CPU_PPC_750L_V2_2,
UC_CPU_PPC_750L_V3_0,
UC_CPU_PPC_750L_V3_2,
UC_CPU_PPC_745_V1_0,
UC_CPU_PPC_755_V1_0,
UC_CPU_PPC_745_V1_1,
UC_CPU_PPC_755_V1_1,
UC_CPU_PPC_745_V2_0,
UC_CPU_PPC_755_V2_0,
UC_CPU_PPC_745_V2_1,
UC_CPU_PPC_755_V2_1,
UC_CPU_PPC_745_V2_2,
UC_CPU_PPC_755_V2_2,
UC_CPU_PPC_745_V2_3,
UC_CPU_PPC_755_V2_3,
UC_CPU_PPC_745_V2_4,
UC_CPU_PPC_755_V2_4,
UC_CPU_PPC_745_V2_5,
UC_CPU_PPC_755_V2_5,
UC_CPU_PPC_745_V2_6,
UC_CPU_PPC_755_V2_6,
UC_CPU_PPC_745_V2_7,
UC_CPU_PPC_755_V2_7,
UC_CPU_PPC_745_V2_8,
UC_CPU_PPC_755_V2_8,
UC_CPU_PPC_7400_V1_0,
UC_CPU_PPC_7400_V1_1,
UC_CPU_PPC_7400_V2_0,
UC_CPU_PPC_7400_V2_1,
UC_CPU_PPC_7400_V2_2,
UC_CPU_PPC_7400_V2_6,
UC_CPU_PPC_7400_V2_7,
UC_CPU_PPC_7400_V2_8,
UC_CPU_PPC_7400_V2_9,
UC_CPU_PPC_7410_V1_0,
UC_CPU_PPC_7410_V1_1,
UC_CPU_PPC_7410_V1_2,
UC_CPU_PPC_7410_V1_3,
UC_CPU_PPC_7410_V1_4,
UC_CPU_PPC_7448_V1_0,
UC_CPU_PPC_7448_V1_1,
UC_CPU_PPC_7448_V2_0,
UC_CPU_PPC_7448_V2_1,
UC_CPU_PPC_7450_V1_0,
UC_CPU_PPC_7450_V1_1,
UC_CPU_PPC_7450_V1_2,
UC_CPU_PPC_7450_V2_0,
UC_CPU_PPC_7450_V2_1,
UC_CPU_PPC_7441_V2_1,
UC_CPU_PPC_7441_V2_3,
UC_CPU_PPC_7451_V2_3,
UC_CPU_PPC_7441_V2_10,
UC_CPU_PPC_7451_V2_10,
UC_CPU_PPC_7445_V1_0,
UC_CPU_PPC_7455_V1_0,
UC_CPU_PPC_7445_V2_1,
UC_CPU_PPC_7455_V2_1,
UC_CPU_PPC_7445_V3_2,
UC_CPU_PPC_7455_V3_2,
UC_CPU_PPC_7445_V3_3,
UC_CPU_PPC_7455_V3_3,
UC_CPU_PPC_7445_V3_4,
UC_CPU_PPC_7455_V3_4,
UC_CPU_PPC_7447_V1_0,
UC_CPU_PPC_7457_V1_0,
UC_CPU_PPC_7447_V1_1,
UC_CPU_PPC_7457_V1_1,
UC_CPU_PPC_7457_V1_2,
UC_CPU_PPC_7447A_V1_0,
UC_CPU_PPC_7457A_V1_0,
UC_CPU_PPC_7447A_V1_1,
UC_CPU_PPC_7457A_V1_1,
UC_CPU_PPC_7447A_V1_2,
UC_CPU_PPC_7457A_V1_2,
UC_CPU_PPC32_401 = 0,
UC_CPU_PPC32_401A1,
UC_CPU_PPC32_401B2,
UC_CPU_PPC32_401C2,
UC_CPU_PPC32_401D2,
UC_CPU_PPC32_401E2,
UC_CPU_PPC32_401F2,
UC_CPU_PPC32_401G2,
UC_CPU_PPC32_IOP480,
UC_CPU_PPC32_COBRA,
UC_CPU_PPC32_403GA,
UC_CPU_PPC32_403GB,
UC_CPU_PPC32_403GC,
UC_CPU_PPC32_403GCX,
UC_CPU_PPC32_405D2,
UC_CPU_PPC32_405D4,
UC_CPU_PPC32_405CRA,
UC_CPU_PPC32_405CRB,
UC_CPU_PPC32_405CRC,
UC_CPU_PPC32_405EP,
UC_CPU_PPC32_405EZ,
UC_CPU_PPC32_405GPA,
UC_CPU_PPC32_405GPB,
UC_CPU_PPC32_405GPC,
UC_CPU_PPC32_405GPD,
UC_CPU_PPC32_405GPR,
UC_CPU_PPC32_405LP,
UC_CPU_PPC32_NPE405H,
UC_CPU_PPC32_NPE405H2,
UC_CPU_PPC32_NPE405L,
UC_CPU_PPC32_NPE4GS3,
UC_CPU_PPC32_STB03,
UC_CPU_PPC32_STB04,
UC_CPU_PPC32_STB25,
UC_CPU_PPC32_X2VP4,
UC_CPU_PPC32_X2VP20,
UC_CPU_PPC32_440_XILINX,
UC_CPU_PPC32_440_XILINX_W_DFPU,
UC_CPU_PPC32_440EPA,
UC_CPU_PPC32_440EPB,
UC_CPU_PPC32_440EPX,
UC_CPU_PPC32_460EXB,
UC_CPU_PPC32_G2,
UC_CPU_PPC32_G2H4,
UC_CPU_PPC32_G2GP,
UC_CPU_PPC32_G2LS,
UC_CPU_PPC32_G2HIP3,
UC_CPU_PPC32_G2HIP4,
UC_CPU_PPC32_MPC603,
UC_CPU_PPC32_G2LE,
UC_CPU_PPC32_G2LEGP,
UC_CPU_PPC32_G2LELS,
UC_CPU_PPC32_G2LEGP1,
UC_CPU_PPC32_G2LEGP3,
UC_CPU_PPC32_MPC5200_V10,
UC_CPU_PPC32_MPC5200_V11,
UC_CPU_PPC32_MPC5200_V12,
UC_CPU_PPC32_MPC5200B_V20,
UC_CPU_PPC32_MPC5200B_V21,
UC_CPU_PPC32_E200Z5,
UC_CPU_PPC32_E200Z6,
UC_CPU_PPC32_E300C1,
UC_CPU_PPC32_E300C2,
UC_CPU_PPC32_E300C3,
UC_CPU_PPC32_E300C4,
UC_CPU_PPC32_MPC8343,
UC_CPU_PPC32_MPC8343A,
UC_CPU_PPC32_MPC8343E,
UC_CPU_PPC32_MPC8343EA,
UC_CPU_PPC32_MPC8347T,
UC_CPU_PPC32_MPC8347P,
UC_CPU_PPC32_MPC8347AT,
UC_CPU_PPC32_MPC8347AP,
UC_CPU_PPC32_MPC8347ET,
UC_CPU_PPC32_MPC8347EP,
UC_CPU_PPC32_MPC8347EAT,
UC_CPU_PPC32_MPC8347EAP,
UC_CPU_PPC32_MPC8349,
UC_CPU_PPC32_MPC8349A,
UC_CPU_PPC32_MPC8349E,
UC_CPU_PPC32_MPC8349EA,
UC_CPU_PPC32_MPC8377,
UC_CPU_PPC32_MPC8377E,
UC_CPU_PPC32_MPC8378,
UC_CPU_PPC32_MPC8378E,
UC_CPU_PPC32_MPC8379,
UC_CPU_PPC32_MPC8379E,
UC_CPU_PPC32_E500_V10,
UC_CPU_PPC32_E500_V20,
UC_CPU_PPC32_E500V2_V10,
UC_CPU_PPC32_E500V2_V20,
UC_CPU_PPC32_E500V2_V21,
UC_CPU_PPC32_E500V2_V22,
UC_CPU_PPC32_E500V2_V30,
UC_CPU_PPC32_E500MC,
UC_CPU_PPC32_MPC8533_V10,
UC_CPU_PPC32_MPC8533_V11,
UC_CPU_PPC32_MPC8533E_V10,
UC_CPU_PPC32_MPC8533E_V11,
UC_CPU_PPC32_MPC8540_V10,
UC_CPU_PPC32_MPC8540_V20,
UC_CPU_PPC32_MPC8540_V21,
UC_CPU_PPC32_MPC8541_V10,
UC_CPU_PPC32_MPC8541_V11,
UC_CPU_PPC32_MPC8541E_V10,
UC_CPU_PPC32_MPC8541E_V11,
UC_CPU_PPC32_MPC8543_V10,
UC_CPU_PPC32_MPC8543_V11,
UC_CPU_PPC32_MPC8543_V20,
UC_CPU_PPC32_MPC8543_V21,
UC_CPU_PPC32_MPC8543E_V10,
UC_CPU_PPC32_MPC8543E_V11,
UC_CPU_PPC32_MPC8543E_V20,
UC_CPU_PPC32_MPC8543E_V21,
UC_CPU_PPC32_MPC8544_V10,
UC_CPU_PPC32_MPC8544_V11,
UC_CPU_PPC32_MPC8544E_V10,
UC_CPU_PPC32_MPC8544E_V11,
UC_CPU_PPC32_MPC8545_V20,
UC_CPU_PPC32_MPC8545_V21,
UC_CPU_PPC32_MPC8545E_V20,
UC_CPU_PPC32_MPC8545E_V21,
UC_CPU_PPC32_MPC8547E_V20,
UC_CPU_PPC32_MPC8547E_V21,
UC_CPU_PPC32_MPC8548_V10,
UC_CPU_PPC32_MPC8548_V11,
UC_CPU_PPC32_MPC8548_V20,
UC_CPU_PPC32_MPC8548_V21,
UC_CPU_PPC32_MPC8548E_V10,
UC_CPU_PPC32_MPC8548E_V11,
UC_CPU_PPC32_MPC8548E_V20,
UC_CPU_PPC32_MPC8548E_V21,
UC_CPU_PPC32_MPC8555_V10,
UC_CPU_PPC32_MPC8555_V11,
UC_CPU_PPC32_MPC8555E_V10,
UC_CPU_PPC32_MPC8555E_V11,
UC_CPU_PPC32_MPC8560_V10,
UC_CPU_PPC32_MPC8560_V20,
UC_CPU_PPC32_MPC8560_V21,
UC_CPU_PPC32_MPC8567,
UC_CPU_PPC32_MPC8567E,
UC_CPU_PPC32_MPC8568,
UC_CPU_PPC32_MPC8568E,
UC_CPU_PPC32_MPC8572,
UC_CPU_PPC32_MPC8572E,
UC_CPU_PPC32_E600,
UC_CPU_PPC32_MPC8610,
UC_CPU_PPC32_MPC8641,
UC_CPU_PPC32_MPC8641D,
UC_CPU_PPC32_601_V0,
UC_CPU_PPC32_601_V1,
UC_CPU_PPC32_601_V2,
UC_CPU_PPC32_602,
UC_CPU_PPC32_603,
UC_CPU_PPC32_603E_V1_1,
UC_CPU_PPC32_603E_V1_2,
UC_CPU_PPC32_603E_V1_3,
UC_CPU_PPC32_603E_V1_4,
UC_CPU_PPC32_603E_V2_2,
UC_CPU_PPC32_603E_V3,
UC_CPU_PPC32_603E_V4,
UC_CPU_PPC32_603E_V4_1,
UC_CPU_PPC32_603E7,
UC_CPU_PPC32_603E7T,
UC_CPU_PPC32_603E7V,
UC_CPU_PPC32_603E7V1,
UC_CPU_PPC32_603E7V2,
UC_CPU_PPC32_603P,
UC_CPU_PPC32_604,
UC_CPU_PPC32_604E_V1_0,
UC_CPU_PPC32_604E_V2_2,
UC_CPU_PPC32_604E_V2_4,
UC_CPU_PPC32_604R,
UC_CPU_PPC32_740_V1_0,
UC_CPU_PPC32_750_V1_0,
UC_CPU_PPC32_740_V2_0,
UC_CPU_PPC32_750_V2_0,
UC_CPU_PPC32_740_V2_1,
UC_CPU_PPC32_750_V2_1,
UC_CPU_PPC32_740_V2_2,
UC_CPU_PPC32_750_V2_2,
UC_CPU_PPC32_740_V3_0,
UC_CPU_PPC32_750_V3_0,
UC_CPU_PPC32_740_V3_1,
UC_CPU_PPC32_750_V3_1,
UC_CPU_PPC32_740E,
UC_CPU_PPC32_750E,
UC_CPU_PPC32_740P,
UC_CPU_PPC32_750P,
UC_CPU_PPC32_750CL_V1_0,
UC_CPU_PPC32_750CL_V2_0,
UC_CPU_PPC32_750CX_V1_0,
UC_CPU_PPC32_750CX_V2_0,
UC_CPU_PPC32_750CX_V2_1,
UC_CPU_PPC32_750CX_V2_2,
UC_CPU_PPC32_750CXE_V2_1,
UC_CPU_PPC32_750CXE_V2_2,
UC_CPU_PPC32_750CXE_V2_3,
UC_CPU_PPC32_750CXE_V2_4,
UC_CPU_PPC32_750CXE_V2_4B,
UC_CPU_PPC32_750CXE_V3_0,
UC_CPU_PPC32_750CXE_V3_1,
UC_CPU_PPC32_750CXE_V3_1B,
UC_CPU_PPC32_750CXR,
UC_CPU_PPC32_750FL,
UC_CPU_PPC32_750FX_V1_0,
UC_CPU_PPC32_750FX_V2_0,
UC_CPU_PPC32_750FX_V2_1,
UC_CPU_PPC32_750FX_V2_2,
UC_CPU_PPC32_750FX_V2_3,
UC_CPU_PPC32_750GL,
UC_CPU_PPC32_750GX_V1_0,
UC_CPU_PPC32_750GX_V1_1,
UC_CPU_PPC32_750GX_V1_2,
UC_CPU_PPC32_750L_V2_0,
UC_CPU_PPC32_750L_V2_1,
UC_CPU_PPC32_750L_V2_2,
UC_CPU_PPC32_750L_V3_0,
UC_CPU_PPC32_750L_V3_2,
UC_CPU_PPC32_745_V1_0,
UC_CPU_PPC32_755_V1_0,
UC_CPU_PPC32_745_V1_1,
UC_CPU_PPC32_755_V1_1,
UC_CPU_PPC32_745_V2_0,
UC_CPU_PPC32_755_V2_0,
UC_CPU_PPC32_745_V2_1,
UC_CPU_PPC32_755_V2_1,
UC_CPU_PPC32_745_V2_2,
UC_CPU_PPC32_755_V2_2,
UC_CPU_PPC32_745_V2_3,
UC_CPU_PPC32_755_V2_3,
UC_CPU_PPC32_745_V2_4,
UC_CPU_PPC32_755_V2_4,
UC_CPU_PPC32_745_V2_5,
UC_CPU_PPC32_755_V2_5,
UC_CPU_PPC32_745_V2_6,
UC_CPU_PPC32_755_V2_6,
UC_CPU_PPC32_745_V2_7,
UC_CPU_PPC32_755_V2_7,
UC_CPU_PPC32_745_V2_8,
UC_CPU_PPC32_755_V2_8,
UC_CPU_PPC32_7400_V1_0,
UC_CPU_PPC32_7400_V1_1,
UC_CPU_PPC32_7400_V2_0,
UC_CPU_PPC32_7400_V2_1,
UC_CPU_PPC32_7400_V2_2,
UC_CPU_PPC32_7400_V2_6,
UC_CPU_PPC32_7400_V2_7,
UC_CPU_PPC32_7400_V2_8,
UC_CPU_PPC32_7400_V2_9,
UC_CPU_PPC32_7410_V1_0,
UC_CPU_PPC32_7410_V1_1,
UC_CPU_PPC32_7410_V1_2,
UC_CPU_PPC32_7410_V1_3,
UC_CPU_PPC32_7410_V1_4,
UC_CPU_PPC32_7448_V1_0,
UC_CPU_PPC32_7448_V1_1,
UC_CPU_PPC32_7448_V2_0,
UC_CPU_PPC32_7448_V2_1,
UC_CPU_PPC32_7450_V1_0,
UC_CPU_PPC32_7450_V1_1,
UC_CPU_PPC32_7450_V1_2,
UC_CPU_PPC32_7450_V2_0,
UC_CPU_PPC32_7450_V2_1,
UC_CPU_PPC32_7441_V2_1,
UC_CPU_PPC32_7441_V2_3,
UC_CPU_PPC32_7451_V2_3,
UC_CPU_PPC32_7441_V2_10,
UC_CPU_PPC32_7451_V2_10,
UC_CPU_PPC32_7445_V1_0,
UC_CPU_PPC32_7455_V1_0,
UC_CPU_PPC32_7445_V2_1,
UC_CPU_PPC32_7455_V2_1,
UC_CPU_PPC32_7445_V3_2,
UC_CPU_PPC32_7455_V3_2,
UC_CPU_PPC32_7445_V3_3,
UC_CPU_PPC32_7455_V3_3,
UC_CPU_PPC32_7445_V3_4,
UC_CPU_PPC32_7455_V3_4,
UC_CPU_PPC32_7447_V1_0,
UC_CPU_PPC32_7457_V1_0,
UC_CPU_PPC32_7447_V1_1,
UC_CPU_PPC32_7457_V1_1,
UC_CPU_PPC32_7457_V1_2,
UC_CPU_PPC32_7447A_V1_0,
UC_CPU_PPC32_7457A_V1_0,
UC_CPU_PPC32_7447A_V1_1,
UC_CPU_PPC32_7457A_V1_1,
UC_CPU_PPC32_7447A_V1_2,
UC_CPU_PPC32_7457A_V1_2,
UC_CPU_PPC32_ENDING
} uc_cpu_ppc;
//> PPC64 CPU
typedef enum uc_cpu_ppc64 {
UC_CPU_PPC_E5500 = 0,
UC_CPU_PPC_E6500,
UC_CPU_PPC_970_V2_2,
UC_CPU_PPC_970FX_V1_0,
UC_CPU_PPC_970FX_V2_0,
UC_CPU_PPC_970FX_V2_1,
UC_CPU_PPC_970FX_V3_0,
UC_CPU_PPC_970FX_V3_1,
UC_CPU_PPC_970MP_V1_0,
UC_CPU_PPC_970MP_V1_1,
UC_CPU_PPC_POWER5_V2_1,
UC_CPU_PPC_POWER7_V2_3,
UC_CPU_PPC_POWER7_V2_1,
UC_CPU_PPC_POWER8E_V2_1,
UC_CPU_PPC_POWER8_V2_0,
UC_CPU_PPC_POWER8NVL_V1_0,
UC_CPU_PPC_POWER9_V1_0,
UC_CPU_PPC_POWER9_V2_0,
UC_CPU_PPC_POWER10_V1_0,
UC_CPU_PPC64_E5500 = 0,
UC_CPU_PPC64_E6500,
UC_CPU_PPC64_970_V2_2,
UC_CPU_PPC64_970FX_V1_0,
UC_CPU_PPC64_970FX_V2_0,
UC_CPU_PPC64_970FX_V2_1,
UC_CPU_PPC64_970FX_V3_0,
UC_CPU_PPC64_970FX_V3_1,
UC_CPU_PPC64_970MP_V1_0,
UC_CPU_PPC64_970MP_V1_1,
UC_CPU_PPC64_POWER5_V2_1,
UC_CPU_PPC64_POWER7_V2_3,
UC_CPU_PPC64_POWER7_V2_1,
UC_CPU_PPC64_POWER8E_V2_1,
UC_CPU_PPC64_POWER8_V2_0,
UC_CPU_PPC64_POWER8NVL_V1_0,
UC_CPU_PPC64_POWER9_V1_0,
UC_CPU_PPC64_POWER9_V2_0,
UC_CPU_PPC64_POWER10_V1_0,
UC_CPU_PPC64_ENDING
} uc_cpu_ppc64;
//> PPC registers

4
include/unicorn/riscv.h
View File

@ -21,6 +21,8 @@ typedef enum uc_cpu_riscv32 {
UC_CPU_RISCV32_BASE32,
UC_CPU_RISCV32_SIFIVE_E31,
UC_CPU_RISCV32_SIFIVE_U34,
UC_CPU_RISCV32_ENDING
} uc_cpu_riscv32;
//> RISCV64 CPU
@ -29,6 +31,8 @@ typedef enum uc_cpu_riscv64 {
UC_CPU_RISCV64_BASE64,
UC_CPU_RISCV64_SIFIVE_E51,
UC_CPU_RISCV64_SIFIVE_U54,
UC_CPU_RISCV64_ENDING
} uc_cpu_riscv64;
//> RISCV registers

4
include/unicorn/s390x.h
View File

@ -51,7 +51,9 @@ typedef enum uc_cpu_s390x {
UC_CPU_S390X_GEN15A,
UC_CPU_S390X_GEN15B,
UC_CPU_S390X_QEMU,
UC_CPU_S390X_MAX
UC_CPU_S390X_MAX,
UC_CPU_S390X_ENDING
} uc_cpu_s390x;
//> S390X registers

6
include/unicorn/sparc.h
View File

@ -33,7 +33,9 @@ typedef enum uc_cpu_sparc32 {
UC_CPU_SPARC32_TI_SUPERSPARC_61,
UC_CPU_SPARC32_TI_SUPERSPARC_II,
UC_CPU_SPARC32_LEON2,
UC_CPU_SPARC32_LEON3
UC_CPU_SPARC32_LEON3,
UC_CPU_SPARC32_ENDING
} uc_cpu_sparc32;
//> SPARC64 CPU
@ -55,6 +57,8 @@ typedef enum uc_cpu_sparc64 {
UC_CPU_SPARC64_SUN_ULTRASPARC_T1,
UC_CPU_SPARC64_SUN_ULTRASPARC_T2,
UC_CPU_SPARC64_NEC_ULTRASPARC_I,
UC_CPU_SPARC64_ENDING
} uc_cpu_sparc64;
//> SPARC registers

4
include/unicorn/x86.h
View File

@ -52,7 +52,9 @@ typedef enum uc_cpu_x86 {
UC_CPU_X86_OPTERON_G5,
UC_CPU_X86_EPYC,
UC_CPU_X86_DHYANA,
UC_CPU_X86_EPYC_ROME
UC_CPU_X86_EPYC_ROME,
UC_CPU_X86_ENDING
} uc_cpu_x86;
// Memory-Management Register for instructions IDTR, GDTR, LDTR, TR.

2
qemu/target/arm/cpu64.c
View File

@ -331,7 +331,7 @@ ARMCPU *cpu_aarch64_init(struct uc_struct *uc)
}
if (uc->cpu_model == INT_MAX) {
uc->cpu_model = UC_CPU_AARCH64_A72;
uc->cpu_model = UC_CPU_ARM64_A72;
} else if (uc->cpu_model >= sizeof(aarch64_cpus)) {
free(cpu);
return NULL;

6
qemu/target/ppc/translate_init.inc.c
View File

@ -11149,14 +11149,14 @@ PowerPCCPU *cpu_ppc_init(struct uc_struct *uc)
memset(cpu, 0, sizeof(*cpu));
#ifdef TARGET_PPC64
if (uc->cpu_model == INT_MAX) {
uc->cpu_model = UC_CPU_PPC_POWER10_V1_0 + UC_CPU_PPC_7457A_V1_2 + 1; // power10_v1.0
} else if (uc->cpu_model + UC_CPU_PPC_7457A_V1_2 + 1 >= ARRAY_SIZE(ppc_cpus)) {
uc->cpu_model = UC_CPU_PPC64_POWER10_V1_0 + UC_CPU_PPC32_7457A_V1_2 + 1; // power10_v1.0
} else if (uc->cpu_model + UC_CPU_PPC32_7457A_V1_2 + 1 >= ARRAY_SIZE(ppc_cpus)) {
free(cpu);
return NULL;
}
#else
if (uc->cpu_model == INT_MAX) {
uc->cpu_model = UC_CPU_PPC_7457A_V1_2; // 7457a_v1.2
uc->cpu_model = UC_CPU_PPC32_7457A_V1_2; // 7457a_v1.2
} else if (uc->cpu_model >= ARRAY_SIZE(ppc_cpus)) {
free(cpu);
return NULL;

10
tests/unit/test_arm64.c
View File

@ -29,7 +29,7 @@ static void test_arm64_until(void)
uint64_t r_x28 = 0x12341234;
uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1,
UC_CPU_AARCH64_A72);
UC_CPU_ARM64_A72);
// initialize machine registers
OK(uc_reg_write(uc, UC_ARM64_REG_X16, &r_x16));
@ -57,7 +57,7 @@ static void test_arm64_code_patching(void)
uc_engine *uc;
char code[] = "\x00\x04\x00\x11"; // add w0, w0, 0x1
uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1,
UC_CPU_AARCH64_A72);
UC_CPU_ARM64_A72);
// zero out x0
uint64_t r_x0 = 0x0;
OK(uc_reg_write(uc, UC_ARM64_REG_X0, &r_x0));
@ -87,7 +87,7 @@ static void test_arm64_code_patching_count(void)
uc_engine *uc;
char code[] = "\x00\x04\x00\x11"; // add w0, w0, 0x1
uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1,
UC_CPU_AARCH64_A72);
UC_CPU_ARM64_A72);
// zero out x0
uint64_t r_x0 = 0x0;
OK(uc_reg_write(uc, UC_ARM64_REG_X0, &r_x0));
@ -120,7 +120,7 @@ static void test_arm64_v8_pac(void)
uint64_t r_x9, r_x8, mem;
uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_ARM, code, sizeof(code) - 1,
UC_CPU_AARCH64_MAX);
UC_CPU_ARM64_MAX);
OK(uc_mem_map(uc, 0x40000, 0x1000, UC_PROT_ALL));
OK(uc_mem_write(uc, 0x40000, "\x00\x00\x00\x00\x00\x00\x00\x00", 8));
@ -179,7 +179,7 @@ static void test_arm64_mrs_hook(void)
char code[] = "\x62\xd0\x3b\xd5";
uc_common_setup(&uc, UC_ARCH_ARM64, UC_MODE_LITTLE_ENDIAN | UC_MODE_ARM,
code, sizeof(code) - 1, UC_CPU_AARCH64_A72);
code, sizeof(code) - 1, UC_CPU_ARM64_A72);
OK(uc_hook_add(uc, &hk, UC_HOOK_INSN, (void *)test_arm64_mrs_hook_cb, NULL,
1, 0, UC_ARM64_INS_MRS));

73
uc.c
View File

@ -2177,12 +2177,23 @@ uc_err uc_ctl(uc_engine *uc, uc_control_type control, ...)
} else {
int model = va_arg(args, int);
if (uc->init_done) {
if (model <= 0 || uc->init_done) {
err = UC_ERR_ARG;
break;
}
if (uc->arch == UC_ARCH_ARM) {
if (uc->arch == UC_ARCH_X86) {
if (model >= UC_CPU_X86_ENDING) {
err = UC_ERR_ARG;
break;
}
} else if (uc->arch == UC_ARCH_ARM) {
if (model >= UC_CPU_ARM_ENDING) {
err = UC_ERR_ARG;
break;
}
if (uc->mode & UC_MODE_BIG_ENDIAN) {
// These cpu models don't support big endian code access.
if (model <= UC_CPU_ARM_CORTEX_A15 &&
@ -2191,6 +2202,64 @@ uc_err uc_ctl(uc_engine *uc, uc_control_type control, ...)
break;
}
}
} else if (uc->arch == UC_ARCH_ARM64) {
if (model >= UC_CPU_ARM64_ENDING) {
err = UC_ERR_ARG;
break;
}
} else if (uc->arch == UC_ARCH_MIPS) {
if (uc->mode & UC_MODE_32 && model >= UC_CPU_MIPS32_ENDING) {
err = UC_ERR_ARG;
break;
}
if (uc->mode & UC_MODE_64 && model >= UC_CPU_MIPS64_ENDING) {
err = UC_ERR_ARG;
break;
}
} else if (uc->arch == UC_ARCH_PPC) {
// UC_MODE_PPC32 == UC_MODE_32
if (uc->mode & UC_MODE_32 && model >= UC_CPU_PPC32_ENDING) {
err = UC_ERR_ARG;
break;
}
if (uc->mode & UC_MODE_64 && model >= UC_CPU_PPC64_ENDING) {
err = UC_ERR_ARG;
break;
}
} else if (uc->arch == UC_ARCH_RISCV) {
if (uc->mode & UC_MODE_32 && model >= UC_CPU_RISCV32_ENDING) {
err = UC_ERR_ARG;
break;
}
if (uc->mode & UC_MODE_64 && model >= UC_CPU_RISCV64_ENDING) {
err = UC_ERR_ARG;
break;
}
} else if (uc->arch == UC_ARCH_S390X) {
if (model >= UC_CPU_S390X_ENDING) {
err = UC_ERR_ARG;
break;
}
} else if (uc->arch == UC_ARCH_SPARC) {
if (uc->mode & UC_MODE_32 && model >= UC_CPU_SPARC32_ENDING) {
err = UC_ERR_ARG;
break;
}
if (uc->mode & UC_MODE_64 && model >= UC_CPU_SPARC64_ENDING) {
err = UC_ERR_ARG;
break;
}
} else if (uc->arch == UC_ARCH_M68K) {
if (model >= UC_CPU_M68K_ENDING) {
err = UC_ERR_ARG;
break;
}
} else {
err = UC_ERR_ARG;
break;
}
uc->cpu_model = model;