Add a regression test
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@ -629,6 +629,36 @@ static void test_x86_hook_cpuid()
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OK(uc_close(uc));
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}
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// This is a regression bug.
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static void test_x86_clear_tb_cache() {
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uc_engine *uc;
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char code[] =
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"\x41\x4a"; // INC ecx; DEC edx;
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int r_ecx = 0x1234;
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int r_edx = 0x7890;
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uint64_t code_start = 0x1240; // Choose this address by design
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uint64_t code_len = 0x1000;
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OK(uc_open(UC_ARCH_X86, UC_MODE_32, &uc));
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OK(uc_mem_map(uc, code_start & (1<<12), code_len, UC_PROT_ALL));
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OK(uc_mem_write(uc, code_start, code, sizeof(code)));
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OK(uc_reg_write(uc, UC_X86_REG_ECX, &r_ecx));
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OK(uc_reg_write(uc, UC_X86_REG_EDX, &r_edx));
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OK(uc_emu_start(uc, code_start, code_start + 1, 0, 0));
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// If tb cache is not cleared, edx would be still 0x7890
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_reg_read(uc, UC_X86_REG_ECX, &r_ecx));
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OK(uc_reg_read(uc, UC_X86_REG_EDX, &r_edx));
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TEST_CHECK(r_ecx == 0x1236);
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TEST_CHECK(r_edx == 0x788f);
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OK(uc_close(uc));
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}
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TEST_LIST = {{"test_x86_in", test_x86_in},
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{"test_x86_out", test_x86_out},
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{"test_x86_mem_hook_all", test_x86_mem_hook_all},
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@ -650,4 +680,5 @@ TEST_LIST = {{"test_x86_in", test_x86_in},
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{"test_x86_mmio_uc_mem_rw", test_x86_mmio_uc_mem_rw},
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{"test_x86_sysenter", test_x86_sysenter},
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{"test_x86_hook_cpuid", test_x86_hook_cpuid},
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{"test_x86_clear_tb_cache", test_x86_clear_tb_cache},
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{NULL, NULL}};
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