Stanislav Shwartsman
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903f6dea35
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Split setCC functions - makes code faster and simpler
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2007-12-14 21:29:36 +00:00 |
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Stanislav Shwartsman
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05c7a1e61b
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Fixed problem with trace cache enabled
String instructions might confise trace cache by finishing instruction execution method without actually completing an instruction (and advancing eip)
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2007-12-13 18:42:31 +00:00 |
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Stanislav Shwartsman
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adda3befd3
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Trace cache optimization merged
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2007-12-09 18:36:05 +00:00 |
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Stanislav Shwartsman
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4c16dd71a8
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Fixed compilation error in SMP mode
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2007-12-07 09:38:42 +00:00 |
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Stanislav Shwartsman
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1bcf42baec
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oops, fixed incorrect checkin
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2007-12-01 16:59:36 +00:00 |
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Stanislav Shwartsman
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7ca78b88e9
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configure/compile changes + small optimizations
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2007-12-01 16:45:17 +00:00 |
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Stanislav Shwartsman
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8cfd17202a
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some simple SSE code optimizations
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2007-11-27 22:12:45 +00:00 |
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Stanislav Shwartsman
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c51888f43f
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Split last BxLockable opcodes -> this allows to eliminate mod==0xc0 check from fetchdecode of every instruction
reduce ACPU.CC dependencies - now that file doesn't depend of CPU
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2007-11-25 20:22:10 +00:00 |
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Stanislav Shwartsman
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e51184c8cf
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Eliminate saving of RSP from heart of cpu_loop
Now save RSP only where it is really required
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2007-11-24 14:22:34 +00:00 |
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Stanislav Shwartsman
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3daa468c02
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Fixed comments in bit.cc
Revert back lock prefix changes in fetchdecode - not all lockable instructions are splitted yet ;(
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2007-11-23 16:37:06 +00:00 |
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Stanislav Shwartsman
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1dbe51a2fb
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Split ENTER_IwBw function according to os32. Fixed ENTER/LEAVE in 64-bit mode
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2007-11-22 17:33:06 +00:00 |
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Stanislav Shwartsman
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0a1063ad77
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Split GvEv opcode groups
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2007-11-21 22:36:02 +00:00 |
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Stanislav Shwartsman
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506dc3d963
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Optimize 64-bit fetchdecode prefix handling
Deparecated set_FLAG() method, setB_FLAG() method was used everywhere
Rename setB_FLAG to set_FLAG, so set_FLAG() will must receive 0/1 inly
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2007-11-20 23:00:44 +00:00 |
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Stanislav Shwartsman
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d75a69fd2e
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Remove BxResolve tables
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2007-11-18 22:14:39 +00:00 |
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Stanislav Shwartsman
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fb61418307
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optimize modrm/sib decoding
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2007-11-18 21:38:58 +00:00 |
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Stanislav Shwartsman
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30f42d74f1
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make sreg index tables static in fetchdecode and remove them from init.cc/cpu.h
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2007-11-18 21:07:40 +00:00 |
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Stanislav Shwartsman
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1e0db62984
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bit.cc speedup (small)
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2007-11-18 20:21:34 +00:00 |
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Stanislav Shwartsman
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bcaba54489
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Merge resolve functions for 32 and 64-bit
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2007-11-18 19:46:14 +00:00 |
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Stanislav Shwartsman
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57d2d14865
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Split POP_Ev opcodes
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2007-11-18 18:49:19 +00:00 |
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Stanislav Shwartsman
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cdc9a09090
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Split more opcodes
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2007-11-18 18:24:46 +00:00 |
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Stanislav Shwartsman
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83f6eb6945
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Changes copyrights for the files I wrote :)
Also split EqId G1 group for x86-64
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2007-11-17 23:28:33 +00:00 |
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Stanislav Shwartsman
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613bad34ee
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split MOVZX/MOVSX opcodes
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2007-11-17 18:29:00 +00:00 |
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Stanislav Shwartsman
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5ec15df46d
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Split more opcodes EbIb opcodes
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2007-11-17 18:08:46 +00:00 |
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Stanislav Shwartsman
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d5a58e1df2
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Split more opcodes - G3 group
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2007-11-17 16:20:37 +00:00 |
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Stanislav Shwartsman
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d9e58bd598
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split11b on opcode tables level - split almost eevery splittable instruction
will be continued
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2007-11-17 12:44:10 +00:00 |
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Stanislav Shwartsman
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abe3f4c5c2
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Split one more opcode
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2007-11-16 21:43:23 +00:00 |
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Stanislav Shwartsman
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b4b922809a
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Move 3byte opcode decoding under Modrm condition
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2007-11-16 20:49:51 +00:00 |
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Stanislav Shwartsman
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565e7f9868
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Merge common fetchdecode groups. Add more comments to fetchdecode tables
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2007-11-16 18:34:14 +00:00 |
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Stanislav Shwartsman
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393018cdf8
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More split11b
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2007-11-16 17:45:58 +00:00 |
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Stanislav Shwartsman
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351244d1ea
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Rename splitmod11b methods
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2007-11-16 08:30:22 +00:00 |
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Stanislav Shwartsman
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db02731cbf
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Replace BxAnother attribute in fetchdecode by table lookup like it is done in disasm. This is done in preparation to feature huge fetchdecode change - all fethdecode tables will be duplicated and made separatate table for ModC0 and others.
So ALL instructions will emjoy SplitMod11b automatically (if they want).
After splitting ALL instruction I hope to get 20% speedup at least.
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2007-11-15 17:57:56 +00:00 |
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Stanislav Shwartsman
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9da22f9b65
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Remove redundant BxAnother attr from prefixes
The meaning of BxAnother attr - instryction has modrm byte
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2007-11-14 22:52:16 +00:00 |
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Stanislav Shwartsman
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0fa82afe1f
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Bugfix and optimize BxResolve calls - bugfix in 64-bit mode
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2007-11-13 17:30:54 +00:00 |
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Stanislav Shwartsman
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edfff23ca0
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Split JCC methods to 16 different methods per branch condition
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2007-11-12 18:20:15 +00:00 |
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Stanislav Shwartsman
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aed6640ef4
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speedup JCC for 64-bit -> separate JZ/JNZ for single faster methods
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2007-11-11 21:26:10 +00:00 |
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Stanislav Shwartsman
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eea5023da8
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small simplification for fetchdecode
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2007-11-11 20:56:22 +00:00 |
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Stanislav Shwartsman
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2653d54e96
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split 32-bit modermdata variable in BxInstruction_c to 4 Bit8u variables
this way it is possible to save shifts and masking when accessing modrm fields
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2007-11-08 18:21:37 +00:00 |
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Stanislav Shwartsman
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2f5fa07af3
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small speedups
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2007-11-07 10:40:40 +00:00 |
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Stanislav Shwartsman
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292153b30e
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Fixed BranchImm cases in 64-bit mode
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2007-10-22 17:41:41 +00:00 |
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Stanislav Shwartsman
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5445de19d1
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Decoding : F2 and F2 prefix could override prefix 66 when determine SSE opcode
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2007-10-20 10:56:44 +00:00 |
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Stanislav Shwartsman
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be9ad60ef3
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cleanups
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2007-10-11 22:44:17 +00:00 |
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Stanislav Shwartsman
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8adbbcf17c
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Started first implementation of MONITOR/MWAIT
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2007-10-11 21:29:01 +00:00 |
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Stanislav Shwartsman
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0dc4badfbb
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Added SSE4A and SSE4_2 to disassembler
Implemented POPCNT instruction
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2007-09-19 19:38:10 +00:00 |
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Stanislav Shwartsman
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b64fc08c54
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implement prefetch hint opcodes
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2007-08-23 16:47:51 +00:00 |
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Stanislav Shwartsman
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4555cc9be3
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ud2b opcode should have modrm byte
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2007-08-18 13:51:16 +00:00 |
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Stanislav Shwartsman
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5189cfbf10
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SSE4 support
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2007-04-19 16:12:21 +00:00 |
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Stanislav Shwartsman
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223b9fda0e
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Fixed RIP relative mode when in 32-bit address size
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2007-04-09 21:15:00 +00:00 |
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Stanislav Shwartsman
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e26609fa97
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Support for Intel LSS/LFS/LGS in 64-bit mode
TODO: have both AMD and Intelk versions
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2007-04-09 20:28:15 +00:00 |
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Stanislav Shwartsman
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bdc4905c8a
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Correctly detect SSE2 and SSE instructions and #UD when SSE2 is OFF for SSE
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2007-04-02 10:46:33 +00:00 |
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Stanislav Shwartsman
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4bb19c2dc3
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Fixed deciding and disasm of CALL in 64-bit mode (no 16-bit calls allowed)
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2007-03-28 21:20:09 +00:00 |
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