mirrors/Bochs
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Split GvEv opcode groups

Browse Source
This commit is contained in:
Stanislav Shwartsman 2007-11-21 22:36:02 +00:00
parent 506dc3d963
commit 0a1063ad77
15 changed files with 699 additions and 523 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

91
bochs/cpu/arith16.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: arith16.cc,v 1.56 2007-11-20 17:15:33 sshwarts Exp $
// $Id: arith16.cc,v 1.57 2007-11-21 22:36:01 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -132,22 +132,27 @@ void BX_CPU_C::ADC_EwGwR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_ADD_ADC16(temp_CF));
}
void BX_CPU_C::ADC_GwEw(bxInstruction_c *i)
void BX_CPU_C::ADC_GwEwM(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, sum_16;
bx_bool temp_CF = getB_CF();
op1_16 = BX_READ_16BIT_REG(i->nnn());
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
}
else {
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
}
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
sum_16 = op1_16 + op2_16 + temp_CF;
BX_WRITE_16BIT_REG(i->nnn(), sum_16);
SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_ADD_ADC16(temp_CF));
}
void BX_CPU_C::ADC_GwEwR(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, sum_16;
bx_bool temp_CF = getB_CF();
op1_16 = BX_READ_16BIT_REG(i->nnn());
op2_16 = BX_READ_16BIT_REG(i->rm());
sum_16 = op1_16 + op2_16 + temp_CF;
BX_WRITE_16BIT_REG(i->nnn(), sum_16);
SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_INSTR_ADD_ADC16(temp_CF));
@ -192,22 +197,27 @@ void BX_CPU_C::SBB_EwGwR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SUB_SBB16(temp_CF));
}
void BX_CPU_C::SBB_GwEw(bxInstruction_c *i)
void BX_CPU_C::SBB_GwEwM(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, diff_16;
bx_bool temp_CF = getB_CF();
op1_16 = BX_READ_16BIT_REG(i->nnn());
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
}
else {
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
}
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
diff_16 = op1_16 - (op2_16 + temp_CF);
BX_WRITE_16BIT_REG(i->nnn(), diff_16);
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SUB_SBB16(temp_CF));
}
void BX_CPU_C::SBB_GwEwR(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, diff_16;
bx_bool temp_CF = getB_CF();
op1_16 = BX_READ_16BIT_REG(i->nnn());
op2_16 = BX_READ_16BIT_REG(i->rm());
diff_16 = op1_16 - (op2_16 + temp_CF);
BX_WRITE_16BIT_REG(i->nnn(), diff_16);
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_INSTR_SUB_SBB16(temp_CF));
@ -216,9 +226,10 @@ void BX_CPU_C::SBB_GwEw(bxInstruction_c *i)
void BX_CPU_C::SBB_AXIw(bxInstruction_c *i)
{
bx_bool temp_CF = getB_CF();
Bit16u op1_16, op2_16 = i->Iw(), diff_16;
Bit16u op1_16, op2_16, diff_16;
op1_16 = AX;
op2_16 = i->Iw();
diff_16 = op1_16 - (op2_16 + temp_CF);
AX = diff_16;
@ -273,21 +284,25 @@ void BX_CPU_C::SUB_EwGwR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
}
void BX_CPU_C::SUB_GwEw(bxInstruction_c *i)
void BX_CPU_C::SUB_GwEwM(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, diff_16;
op1_16 = BX_READ_16BIT_REG(i->nnn());
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
}
else {
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
}
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
diff_16 = op1_16 - op2_16;
BX_WRITE_16BIT_REG(i->nnn(), diff_16);
SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
}
void BX_CPU_C::SUB_GwEwR(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, diff_16;
op1_16 = BX_READ_16BIT_REG(i->nnn());
op2_16 = BX_READ_16BIT_REG(i->rm());
diff_16 = op1_16 - op2_16;
BX_WRITE_16BIT_REG(i->nnn(), diff_16);
SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
@ -327,19 +342,23 @@ void BX_CPU_C::CMP_EwGwR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
}
void BX_CPU_C::CMP_GwEw(bxInstruction_c *i)
void BX_CPU_C::CMP_GwEwM(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, diff_16;
op1_16 = BX_READ_16BIT_REG(i->nnn());
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
diff_16 = op1_16 - op2_16;
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
}
else {
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
}
SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
}
void BX_CPU_C::CMP_GwEwR(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, diff_16;
op1_16 = BX_READ_16BIT_REG(i->nnn());
op2_16 = BX_READ_16BIT_REG(i->rm());
diff_16 = op1_16 - op2_16;
SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);

95
bochs/cpu/arith32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: arith32.cc,v 1.62 2007-11-20 17:15:33 sshwarts Exp $
// $Id: arith32.cc,v 1.63 2007-11-21 22:36:01 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -142,23 +142,29 @@ void BX_CPU_C::ADC_EdGdR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_ADD_ADC32(temp_CF));
}
void BX_CPU_C::ADC_GdEd(bxInstruction_c *i)
void BX_CPU_C::ADC_GdEdM(bxInstruction_c *i)
{
bx_bool temp_CF = getB_CF();
Bit32u op1_32, op2_32, sum_32;
op1_32 = BX_READ_32BIT_REG(i->nnn());
if (i->modC0()) {
op2_32 = BX_READ_32BIT_REG(i->rm());
}
else {
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
}
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
sum_32 = op1_32 + op2_32 + temp_CF;
BX_WRITE_32BIT_REGZ(i->nnn(), sum_32);
SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_ADD_ADC32(temp_CF));
}
void BX_CPU_C::ADC_GdEdR(bxInstruction_c *i)
{
bx_bool temp_CF = getB_CF();
Bit32u op1_32, op2_32, sum_32;
op1_32 = BX_READ_32BIT_REG(i->nnn());
op2_32 = BX_READ_32BIT_REG(i->rm());
sum_32 = op1_32 + op2_32 + temp_CF;
BX_WRITE_32BIT_REGZ(i->nnn(), sum_32);
SET_FLAGS_OSZAPC_32(op1_32, op2_32, sum_32, BX_INSTR_ADD_ADC32(temp_CF));
@ -205,23 +211,29 @@ void BX_CPU_C::SBB_EdGdR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_32(op1_32, op2_32, diff_32, BX_INSTR_SUB_SBB32(temp_CF));
}
void BX_CPU_C::SBB_GdEd(bxInstruction_c *i)
void BX_CPU_C::SBB_GdEdM(bxInstruction_c *i)
{
bx_bool temp_CF = getB_CF();
Bit32u op1_32, op2_32, diff_32;
op1_32 = BX_READ_32BIT_REG(i->nnn());
if (i->modC0()) {
op2_32 = BX_READ_32BIT_REG(i->rm());
}
else {
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
}
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
diff_32 = op1_32 - (op2_32 + temp_CF);
BX_WRITE_32BIT_REGZ(i->nnn(), diff_32);
SET_FLAGS_OSZAPC_32(op1_32, op2_32, diff_32, BX_INSTR_SUB_SBB32(temp_CF));
}
void BX_CPU_C::SBB_GdEdR(bxInstruction_c *i)
{
bx_bool temp_CF = getB_CF();
Bit32u op1_32, op2_32, diff_32;
op1_32 = BX_READ_32BIT_REG(i->nnn());
op2_32 = BX_READ_32BIT_REG(i->rm());
diff_32 = op1_32 - (op2_32 + temp_CF);
BX_WRITE_32BIT_REGZ(i->nnn(), diff_32);
SET_FLAGS_OSZAPC_32(op1_32, op2_32, diff_32, BX_INSTR_SUB_SBB32(temp_CF));
@ -291,23 +303,28 @@ void BX_CPU_C::SUB_EdGdR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
}
void BX_CPU_C::SUB_GdEd(bxInstruction_c *i)
void BX_CPU_C::SUB_GdEdM(bxInstruction_c *i)
{
Bit32u op1_32, op2_32, diff_32;
op1_32 = BX_READ_32BIT_REG(i->nnn());
if (i->modC0()) {
op2_32 = BX_READ_32BIT_REG(i->rm());
}
else {
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
}
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
diff_32 = op1_32 - op2_32;
SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
BX_WRITE_32BIT_REGZ(i->nnn(), diff_32);
SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
}
void BX_CPU_C::SUB_GdEdR(bxInstruction_c *i)
{
Bit32u op1_32, op2_32, diff_32;
op1_32 = BX_READ_32BIT_REG(i->nnn());
op2_32 = BX_READ_32BIT_REG(i->rm());
diff_32 = op1_32 - op2_32;
BX_WRITE_32BIT_REGZ(i->nnn(), diff_32);
SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
}
void BX_CPU_C::SUB_EAXId(bxInstruction_c *i)
@ -344,19 +361,23 @@ void BX_CPU_C::CMP_EdGdR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
}
void BX_CPU_C::CMP_GdEd(bxInstruction_c *i)
void BX_CPU_C::CMP_GdEdM(bxInstruction_c *i)
{
Bit32u op1_32, op2_32, diff_32;
op1_32 = BX_READ_32BIT_REG(i->nnn());
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
diff_32 = op1_32 - op2_32;
if (i->modC0()) {
op2_32 = BX_READ_32BIT_REG(i->rm());
}
else {
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
}
SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);
}
void BX_CPU_C::CMP_GdEdR(bxInstruction_c *i)
{
Bit32u op1_32, op2_32, diff_32;
op1_32 = BX_READ_32BIT_REG(i->nnn());
op2_32 = BX_READ_32BIT_REG(i->rm());
diff_32 = op1_32 - op2_32;
SET_FLAGS_OSZAPC_SUB_32(op1_32, op2_32, diff_32);

120
bochs/cpu/arith64.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: arith64.cc,v 1.39 2007-11-20 17:15:33 sshwarts Exp $
// $Id: arith64.cc,v 1.40 2007-11-21 22:36:01 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -59,24 +59,25 @@ void BX_CPU_C::ADD_EqGqR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
}
void BX_CPU_C::ADD_GqEq(bxInstruction_c *i)
void BX_CPU_C::ADD_GqEqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, sum_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
/* op2_64 is a register or memory reference */
if (i->modC0()) {
op2_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
}
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
sum_64 = op1_64 + op2_64;
BX_WRITE_64BIT_REG(i->nnn(), sum_64);
/* now write sum back to destination */
SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
}
void BX_CPU_C::ADD_GqEqR(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, sum_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
op2_64 = BX_READ_64BIT_REG(i->rm());
sum_64 = op1_64 + op2_64;
BX_WRITE_64BIT_REG(i->nnn(), sum_64);
SET_FLAGS_OSZAPC_ADD_64(op1_64, op2_64, sum_64);
@ -125,23 +126,30 @@ void BX_CPU_C::ADC_EqGqR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_64(op1_64, op2_64, sum_64, BX_INSTR_ADD_ADC64(temp_CF));
}
void BX_CPU_C::ADC_GqEq(bxInstruction_c *i)
void BX_CPU_C::ADC_GqEqM(bxInstruction_c *i)
{
bx_bool temp_CF = getB_CF();
Bit64u op1_64, op2_64, sum_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
sum_64 = op1_64 + op2_64 + temp_CF;
/* op2_64 is a register or memory reference */
if (i->modC0()) {
op2_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
}
/* now write sum back to destination */
BX_WRITE_64BIT_REG(i->nnn(), sum_64);
SET_FLAGS_OSZAPC_64(op1_64, op2_64, sum_64, BX_INSTR_ADD_ADC64(temp_CF));
}
void BX_CPU_C::ADC_GqEqR(bxInstruction_c *i)
{
bx_bool temp_CF = getB_CF();
Bit64u op1_64, op2_64, sum_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
op2_64 = BX_READ_64BIT_REG(i->rm());
sum_64 = op1_64 + op2_64 + temp_CF;
/* now write sum back to destination */
@ -195,23 +203,30 @@ void BX_CPU_C::SBB_EqGqR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_64(op1_64, op2_64, diff_64, BX_INSTR_SUB_SBB64(temp_CF));
}
void BX_CPU_C::SBB_GqEq(bxInstruction_c *i)
void BX_CPU_C::SBB_GqEqM(bxInstruction_c *i)
{
bx_bool temp_CF = getB_CF();
Bit64u op1_64, op2_64, diff_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
diff_64 = op1_64 - (op2_64 + temp_CF);
/* op2_64 is a register or memory reference */
if (i->modC0()) {
op2_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
}
/* now write diff back to destination */
BX_WRITE_64BIT_REG(i->nnn(), diff_64);
SET_FLAGS_OSZAPC_64(op1_64, op2_64, diff_64, BX_INSTR_SUB_SBB64(temp_CF));
}
void BX_CPU_C::SBB_GqEqR(bxInstruction_c *i)
{
bx_bool temp_CF = getB_CF();
Bit64u op1_64, op2_64, diff_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
op2_64 = BX_READ_64BIT_REG(i->rm());
diff_64 = op1_64 - (op2_64 + temp_CF);
/* now write diff back to destination */
@ -290,21 +305,26 @@ void BX_CPU_C::SUB_EqGqR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
}
void BX_CPU_C::SUB_GqEq(bxInstruction_c *i)
void BX_CPU_C::SUB_GqEqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
diff_64 = op1_64 - op2_64;
/* op2_64 is a register or memory reference */
if (i->modC0()) {
op2_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
}
/* now write diff back to destination */
BX_WRITE_64BIT_REG(i->nnn(), diff_64);
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
}
void BX_CPU_C::SUB_GqEqR(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
op2_64 = BX_READ_64BIT_REG(i->rm());
diff_64 = op1_64 - op2_64;
/* now write diff back to destination */
@ -350,21 +370,23 @@ void BX_CPU_C::CMP_EqGqR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
}
void BX_CPU_C::CMP_GqEq(bxInstruction_c *i)
void BX_CPU_C::CMP_GqEqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
diff_64 = op1_64 - op2_64;
/* op2_64 is a register or memory reference */
if (i->modC0()) {
op2_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
}
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
}
void BX_CPU_C::CMP_GqEqR(bxInstruction_c *i)
{
Bit64u op1_64, op2_64, diff_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
op2_64 = BX_READ_64BIT_REG(i->rm());
diff_64 = op1_64 - op2_64;
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);

124
bochs/cpu/arith8.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: arith8.cc,v 1.47 2007-11-20 17:15:33 sshwarts Exp $
// $Id: arith8.cc,v 1.48 2007-11-21 22:36:01 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -56,21 +56,25 @@ void BX_CPU_C::ADD_EbGbR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_ADD_8(op1, op2, sum);
}
void BX_CPU_C::ADD_GbEb(bxInstruction_c *i)
void BX_CPU_C::ADD_GbEbM(bxInstruction_c *i)
{
Bit8u op1, op2, sum;
op1 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
read_virtual_byte(i->seg(), RMAddr(i), &op2);
sum = op1 + op2;
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), sum);
if (i->modC0()) {
op2 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
sum = op1 + op2;
}
else {
read_virtual_byte(i->seg(), RMAddr(i), &op2);
sum = op1 + op2;
}
SET_FLAGS_OSZAPC_ADD_8(op1, op2, sum);
}
void BX_CPU_C::ADD_GbEbR(bxInstruction_c *i)
{
Bit8u op1, op2, sum;
op1 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
op2 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
sum = op1 + op2;
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), sum);
SET_FLAGS_OSZAPC_ADD_8(op1, op2, sum);
@ -114,25 +118,30 @@ void BX_CPU_C::ADC_EbGbR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_8(op1, op2, sum, BX_INSTR_ADD_ADC8(temp_CF));
}
void BX_CPU_C::ADC_GbEb(bxInstruction_c *i)
void BX_CPU_C::ADC_GbEbM(bxInstruction_c *i)
{
Bit8u op1, op2, sum;
bx_bool temp_CF = getB_CF();
op1 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
if (i->modC0()) {
op2 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
}
else {
read_virtual_byte(i->seg(), RMAddr(i), &op2);
}
read_virtual_byte(i->seg(), RMAddr(i), &op2);
sum = op1 + op2 + temp_CF;
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), sum);
SET_FLAGS_OSZAPC_8(op1, op2, sum, BX_INSTR_ADD_ADC8(temp_CF));
}
void BX_CPU_C::ADC_GbEbR(bxInstruction_c *i)
{
Bit8u op1, op2, sum;
bx_bool temp_CF = getB_CF();
op1 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
op2 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
sum = op1 + op2 + temp_CF;
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), sum);
SET_FLAGS_OSZAPC_8(op1, op2, sum, BX_INSTR_ADD_ADC8(temp_CF));
}
void BX_CPU_C::ADC_ALIb(bxInstruction_c *i)
@ -174,22 +183,27 @@ void BX_CPU_C::SBB_EbGbR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_SUB_SBB8(temp_CF));
}
void BX_CPU_C::SBB_GbEb(bxInstruction_c *i)
void BX_CPU_C::SBB_GbEbM(bxInstruction_c *i)
{
Bit8u op1_8, op2_8, diff_8;
bx_bool temp_CF = getB_CF();
op1_8 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
if (i->modC0()) {
op2_8 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
}
else {
read_virtual_byte(i->seg(), RMAddr(i), &op2_8);
}
read_virtual_byte(i->seg(), RMAddr(i), &op2_8);
diff_8 = op1_8 - (op2_8 + temp_CF);
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), diff_8);
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_SUB_SBB8(temp_CF));
}
void BX_CPU_C::SBB_GbEbR(bxInstruction_c *i)
{
Bit8u op1_8, op2_8, diff_8;
bx_bool temp_CF = getB_CF();
op1_8 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
op2_8 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
diff_8 = op1_8 - (op2_8 + temp_CF);
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), diff_8);
SET_FLAGS_OSZAPC_8(op1_8, op2_8, diff_8, BX_INSTR_SUB_SBB8(temp_CF));
@ -256,21 +270,25 @@ void BX_CPU_C::SUB_EbGbR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_SUB_8(op1_8, op2_8, diff_8);
}
void BX_CPU_C::SUB_GbEb(bxInstruction_c *i)
void BX_CPU_C::SUB_GbEbM(bxInstruction_c *i)
{
Bit8u op1_8, op2_8, diff_8;
op1_8 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
if (i->modC0()) {
op2_8 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
}
else {
read_virtual_byte(i->seg(), RMAddr(i), &op2_8);
}
read_virtual_byte(i->seg(), RMAddr(i), &op2_8);
diff_8 = op1_8 - op2_8;
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), diff_8);
SET_FLAGS_OSZAPC_SUB_8(op1_8, op2_8, diff_8);
}
void BX_CPU_C::SUB_GbEbR(bxInstruction_c *i)
{
Bit8u op1_8, op2_8, diff_8;
op1_8 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
op2_8 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
diff_8 = op1_8 - op2_8;
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), diff_8);
SET_FLAGS_OSZAPC_SUB_8(op1_8, op2_8, diff_8);
@ -310,28 +328,36 @@ void BX_CPU_C::CMP_EbGbR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_SUB_8(op1_8, op2_8, diff_8);
}
void BX_CPU_C::CMP_GbEb(bxInstruction_c *i)
void BX_CPU_C::CMP_GbEbM(bxInstruction_c *i)
{
Bit8u op1_8, op2_8;
Bit8u op1_8, op2_8, diff_8;
op1_8 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
read_virtual_byte(i->seg(), RMAddr(i), &op2_8);
diff_8 = op1_8 - op2_8;
if (i->modC0()) {
op2_8 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
}
else {
read_virtual_byte(i->seg(), RMAddr(i), &op2_8);
}
SET_FLAGS_OSZAPC_SUB_8(op1_8, op2_8, diff_8);
}
void BX_CPU_C::CMP_GbEbR(bxInstruction_c *i)
{
Bit8u op1_8, op2_8, diff_8;
op1_8 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
op2_8 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
diff_8 = op1_8 - op2_8;
Bit8u diff_8 = op1_8 - op2_8;
SET_FLAGS_OSZAPC_SUB_8(op1_8, op2_8, diff_8);
}
void BX_CPU_C::CMP_ALIb(bxInstruction_c *i)
{
Bit8u op1_8 = AL;
Bit8u op2_8 = i->Ib();
Bit8u diff_8 = op1_8 - op2_8;
Bit8u op1_8, op2_8, diff_8;
op1_8 = AL;
op2_8 = i->Ib();
diff_8 = op1_8 - op2_8;
SET_FLAGS_OSZAPC_SUB_8(op1_8, op2_8, diff_8);
}

152
bochs/cpu/cpu.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: cpu.h,v 1.371 2007-11-20 23:00:41 sshwarts Exp $
// $Id: cpu.h,v 1.372 2007-11-21 22:36:01 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -1349,14 +1349,32 @@ public: // for now...
// <TAG-CLASS-CPU-START>
// prototypes for CPU instructions...
BX_SMF void ADD_GbEb(bxInstruction_c *);
BX_SMF void ADD_ALIb(bxInstruction_c *);
BX_SMF void ADD_EAXId(bxInstruction_c *);
BX_SMF void OR_GbEb(bxInstruction_c *);
BX_SMF void OR_ALIb(bxInstruction_c *);
BX_SMF void OR_EAXId(bxInstruction_c *);
BX_SMF void ADC_ALIb(bxInstruction_c *);
BX_SMF void SBB_ALIb(bxInstruction_c *);
BX_SMF void AND_ALIb(bxInstruction_c *);
BX_SMF void SUB_ALIb(bxInstruction_c *);
BX_SMF void XOR_ALIb(bxInstruction_c *);
BX_SMF void CMP_ALIb(bxInstruction_c *);
BX_SMF void ADD_AXIw(bxInstruction_c *);
BX_SMF void OR_AXIw(bxInstruction_c *);
BX_SMF void ADC_AXIw(bxInstruction_c *);
BX_SMF void SBB_AXIw(bxInstruction_c *);
BX_SMF void AND_AXIw(bxInstruction_c *);
BX_SMF void SUB_AXIw(bxInstruction_c *);
BX_SMF void XOR_AXIw(bxInstruction_c *);
BX_SMF void CMP_AXIw(bxInstruction_c *);
BX_SMF void ADD_EAXId(bxInstruction_c *);
BX_SMF void OR_EAXId(bxInstruction_c *);
BX_SMF void ADC_EAXId(bxInstruction_c *);
BX_SMF void SBB_EAXId(bxInstruction_c *);
BX_SMF void AND_EAXId(bxInstruction_c *);
BX_SMF void SUB_EAXId(bxInstruction_c *);
BX_SMF void XOR_EAXId(bxInstruction_c *);
BX_SMF void CMP_EAXId(bxInstruction_c *);
BX_SMF void PUSH16_CS(bxInstruction_c *);
BX_SMF void PUSH16_DS(bxInstruction_c *);
@ -1382,31 +1400,9 @@ public: // for now...
BX_SMF void PUSH32_SS(bxInstruction_c *);
BX_SMF void POP32_SS(bxInstruction_c *);
BX_SMF void ADC_GbEb(bxInstruction_c *);
BX_SMF void ADC_ALIb(bxInstruction_c *);
BX_SMF void ADC_EAXId(bxInstruction_c *);
BX_SMF void SBB_GbEb(bxInstruction_c *);
BX_SMF void SBB_ALIb(bxInstruction_c *);
BX_SMF void SBB_EAXId(bxInstruction_c *);
BX_SMF void AND_GbEb(bxInstruction_c *);
BX_SMF void AND_ALIb(bxInstruction_c *);
BX_SMF void AND_EAXId(bxInstruction_c *);
BX_SMF void AND_AXIw(bxInstruction_c *);
BX_SMF void DAA(bxInstruction_c *);
BX_SMF void SUB_GbEb(bxInstruction_c *);
BX_SMF void SUB_ALIb(bxInstruction_c *);
BX_SMF void SUB_EAXId(bxInstruction_c *);
BX_SMF void DAS(bxInstruction_c *);
BX_SMF void XOR_GbEb(bxInstruction_c *);
BX_SMF void XOR_ALIb(bxInstruction_c *);
BX_SMF void XOR_EAXId(bxInstruction_c *);
BX_SMF void XOR_AXIw(bxInstruction_c *);
BX_SMF void AAA(bxInstruction_c *);
BX_SMF void CMP_GbEb(bxInstruction_c *);
BX_SMF void CMP_ALIb(bxInstruction_c *);
BX_SMF void CMP_EAXId(bxInstruction_c *);
BX_SMF void AAS(bxInstruction_c *);
BX_SMF void PUSHAD32(bxInstruction_c *);
@ -1443,9 +1439,11 @@ public: // for now...
BX_SMF void TEST_EdGdM(bxInstruction_c *);
BX_SMF void XCHG_EbGbR(bxInstruction_c *);
BX_SMF void XCHG_EbGbM(bxInstruction_c *);
BX_SMF void XCHG_EwGw(bxInstruction_c *);
BX_SMF void XCHG_EwGwR(bxInstruction_c *);
BX_SMF void XCHG_EdGdR(bxInstruction_c *);
BX_SMF void XCHG_EbGbM(bxInstruction_c *);
BX_SMF void XCHG_EwGwM(bxInstruction_c *);
BX_SMF void XCHG_EdGdM(bxInstruction_c *);
BX_SMF void MOV_EbGbM(bxInstruction_c *);
@ -1709,6 +1707,24 @@ public: // for now...
BX_SMF void BSWAP_ERX(bxInstruction_c *);
BX_SMF void ADD_GbEbM(bxInstruction_c *);
BX_SMF void OR_GbEbM(bxInstruction_c *);
BX_SMF void ADC_GbEbM(bxInstruction_c *);
BX_SMF void SBB_GbEbM(bxInstruction_c *);
BX_SMF void AND_GbEbM(bxInstruction_c *);
BX_SMF void SUB_GbEbM(bxInstruction_c *);
BX_SMF void XOR_GbEbM(bxInstruction_c *);
BX_SMF void CMP_GbEbM(bxInstruction_c *);
BX_SMF void ADD_GbEbR(bxInstruction_c *);
BX_SMF void OR_GbEbR(bxInstruction_c *);
BX_SMF void ADC_GbEbR(bxInstruction_c *);
BX_SMF void SBB_GbEbR(bxInstruction_c *);
BX_SMF void AND_GbEbR(bxInstruction_c *);
BX_SMF void SUB_GbEbR(bxInstruction_c *);
BX_SMF void XOR_GbEbR(bxInstruction_c *);
BX_SMF void CMP_GbEbR(bxInstruction_c *);
BX_SMF void ADD_EbIbM(bxInstruction_c *);
BX_SMF void OR_EbIbM(bxInstruction_c *);
BX_SMF void ADC_EbIbM(bxInstruction_c *);
@ -1817,27 +1833,41 @@ public: // for now...
BX_SMF void XOR_EdGdR(bxInstruction_c *);
BX_SMF void CMP_EdGdR(bxInstruction_c *);
BX_SMF void ADD_GwEwR(bxInstruction_c *);
BX_SMF void ADD_GwEwM(bxInstruction_c *);
BX_SMF void OR_GwEwM(bxInstruction_c *);
BX_SMF void ADC_GwEwM(bxInstruction_c *);
BX_SMF void SBB_GwEwM(bxInstruction_c *);
BX_SMF void AND_GwEwM(bxInstruction_c *);
BX_SMF void SUB_GwEwM(bxInstruction_c *);
BX_SMF void XOR_GwEwM(bxInstruction_c *);
BX_SMF void CMP_GwEwM(bxInstruction_c *);
BX_SMF void OR_GwEw(bxInstruction_c *);
BX_SMF void ADC_GwEw(bxInstruction_c *);
BX_SMF void SBB_GwEw(bxInstruction_c *);
BX_SMF void AND_GwEw(bxInstruction_c *);
BX_SMF void SUB_GwEw(bxInstruction_c *);
BX_SMF void XOR_GwEw(bxInstruction_c *);
BX_SMF void CMP_GwEw(bxInstruction_c *);
BX_SMF void ADD_GwEwR(bxInstruction_c *);
BX_SMF void OR_GwEwR(bxInstruction_c *);
BX_SMF void ADC_GwEwR(bxInstruction_c *);
BX_SMF void SBB_GwEwR(bxInstruction_c *);
BX_SMF void AND_GwEwR(bxInstruction_c *);
BX_SMF void SUB_GwEwR(bxInstruction_c *);
BX_SMF void XOR_GwEwR(bxInstruction_c *);
BX_SMF void CMP_GwEwR(bxInstruction_c *);
BX_SMF void ADD_GdEdM(bxInstruction_c *);
BX_SMF void ADD_GdEdR(bxInstruction_c *);
BX_SMF void OR_GdEdM(bxInstruction_c *);
BX_SMF void ADC_GdEdM(bxInstruction_c *);
BX_SMF void SBB_GdEdM(bxInstruction_c *);
BX_SMF void AND_GdEdM(bxInstruction_c *);
BX_SMF void SUB_GdEdM(bxInstruction_c *);
BX_SMF void CMP_GdEdM(bxInstruction_c *);
BX_SMF void XOR_GdEdM(bxInstruction_c *);
BX_SMF void OR_GdEd(bxInstruction_c *);
BX_SMF void ADC_GdEd(bxInstruction_c *);
BX_SMF void SBB_GdEd(bxInstruction_c *);
BX_SMF void AND_GdEd(bxInstruction_c *);
BX_SMF void SUB_GdEd(bxInstruction_c *);
BX_SMF void CMP_GdEd(bxInstruction_c *);
BX_SMF void XOR_GdEd(bxInstruction_c *);
BX_SMF void ADD_GdEdR(bxInstruction_c *);
BX_SMF void OR_GdEdR(bxInstruction_c *);
BX_SMF void ADC_GdEdR(bxInstruction_c *);
BX_SMF void SBB_GdEdR(bxInstruction_c *);
BX_SMF void AND_GdEdR(bxInstruction_c *);
BX_SMF void SUB_GdEdR(bxInstruction_c *);
BX_SMF void CMP_GdEdR(bxInstruction_c *);
BX_SMF void XOR_GdEdR(bxInstruction_c *);
BX_SMF void NOT_EbM(bxInstruction_c *);
BX_SMF void NOT_EwM(bxInstruction_c *);
@ -2569,11 +2599,6 @@ public: // for now...
BX_SMF void CMOV_GdEd(bxInstruction_c *);
BX_SMF void CMOV_GwEw(bxInstruction_c *);
BX_SMF void ADD_AXIw(bxInstruction_c *);
BX_SMF void ADC_AXIw(bxInstruction_c *);
BX_SMF void SBB_AXIw(bxInstruction_c *);
BX_SMF void SUB_AXIw(bxInstruction_c *);
BX_SMF void CMP_AXIw(bxInstruction_c *);
BX_SMF void CWDE(bxInstruction_c *);
BX_SMF void CDQ(bxInstruction_c *);
@ -2617,14 +2642,23 @@ public: // for now...
#if BX_SUPPORT_X86_64
// 64 bit extensions
BX_SMF void ADD_GqEq(bxInstruction_c *);
BX_SMF void OR_GqEq(bxInstruction_c *);
BX_SMF void ADC_GqEq(bxInstruction_c *);
BX_SMF void SBB_GqEq(bxInstruction_c *);
BX_SMF void AND_GqEq(bxInstruction_c *);
BX_SMF void SUB_GqEq(bxInstruction_c *);
BX_SMF void XOR_GqEq(bxInstruction_c *);
BX_SMF void CMP_GqEq(bxInstruction_c *);
BX_SMF void ADD_GqEqM(bxInstruction_c *);
BX_SMF void OR_GqEqM(bxInstruction_c *);
BX_SMF void ADC_GqEqM(bxInstruction_c *);
BX_SMF void SBB_GqEqM(bxInstruction_c *);
BX_SMF void AND_GqEqM(bxInstruction_c *);
BX_SMF void SUB_GqEqM(bxInstruction_c *);
BX_SMF void XOR_GqEqM(bxInstruction_c *);
BX_SMF void CMP_GqEqM(bxInstruction_c *);
BX_SMF void ADD_GqEqR(bxInstruction_c *);
BX_SMF void OR_GqEqR(bxInstruction_c *);
BX_SMF void ADC_GqEqR(bxInstruction_c *);
BX_SMF void SBB_GqEqR(bxInstruction_c *);
BX_SMF void AND_GqEqR(bxInstruction_c *);
BX_SMF void SUB_GqEqR(bxInstruction_c *);
BX_SMF void XOR_GqEqR(bxInstruction_c *);
BX_SMF void CMP_GqEqR(bxInstruction_c *);
BX_SMF void ADD_RAXId(bxInstruction_c *);
BX_SMF void OR_RAXId(bxInstruction_c *);

37
bochs/cpu/data_xfer16.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: data_xfer16.cc,v 1.46 2007-11-18 18:24:45 sshwarts Exp $
// $Id: data_xfer16.cc,v 1.47 2007-11-21 22:36:01 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -186,33 +186,36 @@ void BX_CPU_C::MOVSX_GwEbR(bxInstruction_c *i)
}
#endif
void BX_CPU_C::XCHG_EwGw(bxInstruction_c *i)
void BX_CPU_C::XCHG_EwGwM(bxInstruction_c *i)
{
Bit16u op2_16, op1_16;
Bit16u op1_16, op2_16;
/* pointer, segment address pair */
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
op2_16 = BX_READ_16BIT_REG(i->nnn());
write_RMW_virtual_word(op2_16);
BX_WRITE_16BIT_REG(i->nnn(), op1_16);
}
void BX_CPU_C::XCHG_EwGwR(bxInstruction_c *i)
{
Bit16u op1_16, op2_16;
#if BX_DEBUGGER && BX_MAGIC_BREAKPOINT
// (mch) Magic break point
// Note for mortals: the instruction to trigger this is "xchgw %bx,%bx"
if (i->nnn() == 3 && i->modC0() && i->rm() == 3)
if (bx_dbg.magic_break_enabled && (i->nnn() == 3) && (i->rm() == 3))
{
if (bx_dbg.magic_break_enabled) BX_CPU_THIS_PTR magic_break = 1;
BX_CPU_THIS_PTR magic_break = 1;
return;
}
#endif
op1_16 = BX_READ_16BIT_REG(i->rm());
op2_16 = BX_READ_16BIT_REG(i->nnn());
/* op1_16 is a register or memory reference */
if (i->modC0()) {
op1_16 = BX_READ_16BIT_REG(i->rm());
BX_WRITE_16BIT_REG(i->rm(), op2_16);
}
else {
/* pointer, segment address pair */
read_RMW_virtual_word(i->seg(), RMAddr(i), &op1_16);
write_RMW_virtual_word(op2_16);
}
BX_WRITE_16BIT_REG(i->nnn(), op1_16);
BX_WRITE_16BIT_REG(i->rm(), op2_16);
}
void BX_CPU_C::CMOV_GwEw(bxInstruction_c *i)

4
bochs/cpu/data_xfer32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: data_xfer32.cc,v 1.45 2007-11-17 18:29:00 sshwarts Exp $
// $Id: data_xfer32.cc,v 1.46 2007-11-21 22:36:01 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -197,8 +197,8 @@ void BX_CPU_C::XCHG_EdGdR(bxInstruction_c *i)
Bit32u op1_32 = BX_READ_32BIT_REG(i->rm());
Bit32u op2_32 = BX_READ_32BIT_REG(i->nnn());
BX_WRITE_32BIT_REGZ(i->rm(), op2_32);
BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
BX_WRITE_32BIT_REGZ(i->rm(), op2_32);
}
void BX_CPU_C::CMOV_GdEd(bxInstruction_c *i)

4
bochs/cpu/data_xfer64.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: data_xfer64.cc,v 1.28 2007-11-18 18:24:45 sshwarts Exp $
// $Id: data_xfer64.cc,v 1.29 2007-11-21 22:36:01 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -243,8 +243,8 @@ void BX_CPU_C::XCHG_EqGqR(bxInstruction_c *i)
Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
Bit64u op2_64 = BX_READ_64BIT_REG(i->nnn());
BX_WRITE_64BIT_REG(i->rm(), op2_64);
BX_WRITE_64BIT_REG(i->nnn(), op1_64);
BX_WRITE_64BIT_REG(i->rm(), op2_64);
}
void BX_CPU_C::CMOV_GqEq(bxInstruction_c *i)

4
bochs/cpu/data_xfer8.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: data_xfer8.cc,v 1.30 2007-11-18 18:24:45 sshwarts Exp $
// $Id: data_xfer8.cc,v 1.31 2007-11-21 22:36:01 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -122,6 +122,6 @@ void BX_CPU_C::XCHG_EbGbR(bxInstruction_c *i)
Bit8u op1 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
Bit8u op2 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), op2);
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), op1);
BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), op2);
}

126
bochs/cpu/fetchdecode.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: fetchdecode.cc,v 1.137 2007-11-20 17:15:33 sshwarts Exp $
// $Id: fetchdecode.cc,v 1.138 2007-11-21 22:36:01 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -186,7 +186,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
// 512 entries for 16bit mode
/* 00 /wr */ { 0, &BX_CPU_C::ADD_EbGbR },
/* 01 /wr */ { 0, &BX_CPU_C::ADD_EwGwR },
/* 02 /wr */ { 0, &BX_CPU_C::ADD_GbEb },
/* 02 /wr */ { 0, &BX_CPU_C::ADD_GbEbR },
/* 03 /wr */ { 0, &BX_CPU_C::ADD_GwEwR },
/* 04 /wr */ { BxImmediate_Ib, &BX_CPU_C::ADD_ALIb },
/* 05 /wr */ { BxImmediate_Iv, &BX_CPU_C::ADD_AXIw },
@ -194,56 +194,56 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
/* 07 /wr */ { 0, &BX_CPU_C::POP16_ES },
/* 08 /wr */ { 0, &BX_CPU_C::OR_EbGbR },
/* 09 /wr */ { 0, &BX_CPU_C::OR_EwGwR },
/* 0A /wr */ { 0, &BX_CPU_C::OR_GbEb },
/* 0B /wr */ { 0, &BX_CPU_C::OR_GwEw },
/* 0A /wr */ { 0, &BX_CPU_C::OR_GbEbR },
/* 0B /wr */ { 0, &BX_CPU_C::OR_GwEwR },
/* 0C /wr */ { BxImmediate_Ib, &BX_CPU_C::OR_ALIb },
/* 0D /wr */ { BxImmediate_Iv, &BX_CPU_C::OR_AXIw },
/* 0E /wr */ { 0, &BX_CPU_C::PUSH16_CS },
/* 0F /wr */ { 0, &BX_CPU_C::BxError }, // 2-byte escape
/* 10 /wr */ { 0, &BX_CPU_C::ADC_EbGbR },
/* 11 /wr */ { 0, &BX_CPU_C::ADC_EwGwR },
/* 12 /wr */ { 0, &BX_CPU_C::ADC_GbEb },
/* 13 /wr */ { 0, &BX_CPU_C::ADC_GwEw },
/* 12 /wr */ { 0, &BX_CPU_C::ADC_GbEbR },
/* 13 /wr */ { 0, &BX_CPU_C::ADC_GwEwR },
/* 14 /wr */ { BxImmediate_Ib, &BX_CPU_C::ADC_ALIb },
/* 15 /wr */ { BxImmediate_Iv, &BX_CPU_C::ADC_AXIw },
/* 16 /wr */ { 0, &BX_CPU_C::PUSH16_SS },
/* 17 /wr */ { 0, &BX_CPU_C::POP16_SS },
/* 18 /wr */ { 0, &BX_CPU_C::SBB_EbGbR },
/* 19 /wr */ { 0, &BX_CPU_C::SBB_EwGwR },
/* 1A /wr */ { 0, &BX_CPU_C::SBB_GbEb },
/* 1B /wr */ { 0, &BX_CPU_C::SBB_GwEw },
/* 1A /wr */ { 0, &BX_CPU_C::SBB_GbEbR },
/* 1B /wr */ { 0, &BX_CPU_C::SBB_GwEwR },
/* 1C /wr */ { BxImmediate_Ib, &BX_CPU_C::SBB_ALIb },
/* 1D /wr */ { BxImmediate_Iv, &BX_CPU_C::SBB_AXIw },
/* 1E /wr */ { 0, &BX_CPU_C::PUSH16_DS },
/* 1F /wr */ { 0, &BX_CPU_C::POP16_DS },
/* 20 /wr */ { 0, &BX_CPU_C::AND_EbGbR },
/* 21 /wr */ { 0, &BX_CPU_C::AND_EwGwR },
/* 22 /wr */ { 0, &BX_CPU_C::AND_GbEb },
/* 23 /wr */ { 0, &BX_CPU_C::AND_GwEw },
/* 22 /wr */ { 0, &BX_CPU_C::AND_GbEbR },
/* 23 /wr */ { 0, &BX_CPU_C::AND_GwEwR },
/* 24 /wr */ { BxImmediate_Ib, &BX_CPU_C::AND_ALIb },
/* 25 /wr */ { BxImmediate_Iv, &BX_CPU_C::AND_AXIw },
/* 26 /wr */ { BxPrefix, &BX_CPU_C::BxError }, // ES:
/* 27 /wr */ { 0, &BX_CPU_C::DAA },
/* 28 /wr */ { 0, &BX_CPU_C::SUB_EbGbR },
/* 29 /wr */ { 0, &BX_CPU_C::SUB_EwGwR },
/* 2A /wr */ { 0, &BX_CPU_C::SUB_GbEb },
/* 2B /wr */ { 0, &BX_CPU_C::SUB_GwEw },
/* 2A /wr */ { 0, &BX_CPU_C::SUB_GbEbR },
/* 2B /wr */ { 0, &BX_CPU_C::SUB_GwEwR },
/* 2C /wr */ { BxImmediate_Ib, &BX_CPU_C::SUB_ALIb },
/* 2D /wr */ { BxImmediate_Iv, &BX_CPU_C::SUB_AXIw },
/* 2E /wr */ { BxPrefix, &BX_CPU_C::BxError }, // CS:
/* 2F /wr */ { 0, &BX_CPU_C::DAS },
/* 30 /wr */ { 0, &BX_CPU_C::XOR_EbGbR },
/* 31 /wr */ { 0, &BX_CPU_C::XOR_EwGwR },
/* 32 /wr */ { 0, &BX_CPU_C::XOR_GbEb },
/* 33 /wr */ { 0, &BX_CPU_C::XOR_GwEw },
/* 32 /wr */ { 0, &BX_CPU_C::XOR_GbEbR },
/* 33 /wr */ { 0, &BX_CPU_C::XOR_GwEwR },
/* 34 /wr */ { BxImmediate_Ib, &BX_CPU_C::XOR_ALIb },
/* 35 /wr */ { BxImmediate_Iv, &BX_CPU_C::XOR_AXIw },
/* 36 /wr */ { BxPrefix, &BX_CPU_C::BxError }, // SS:
/* 37 /wr */ { 0, &BX_CPU_C::AAA },
/* 38 /wr */ { 0, &BX_CPU_C::CMP_EbGbR },
/* 39 /wr */ { 0, &BX_CPU_C::CMP_EwGwR },
/* 3A /wr */ { 0, &BX_CPU_C::CMP_GbEb },
/* 3B /wr */ { 0, &BX_CPU_C::CMP_GwEw },
/* 3A /wr */ { 0, &BX_CPU_C::CMP_GbEbR },
/* 3B /wr */ { 0, &BX_CPU_C::CMP_GwEwR },
/* 3C /wr */ { BxImmediate_Ib, &BX_CPU_C::CMP_ALIb },
/* 3D /wr */ { BxImmediate_Iv, &BX_CPU_C::CMP_AXIw },
/* 3E /wr */ { BxPrefix, &BX_CPU_C::BxError }, // DS:
@ -319,7 +319,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
/* 84 /wr */ { 0, &BX_CPU_C::TEST_EbGbR },
/* 85 /wr */ { 0, &BX_CPU_C::TEST_EwGwR },
/* 86 /wr */ { 0, &BX_CPU_C::XCHG_EbGbR },
/* 87 /wr */ { 0, &BX_CPU_C::XCHG_EwGw },
/* 87 /wr */ { 0, &BX_CPU_C::XCHG_EwGwR },
/* 88 /wr */ { 0, &BX_CPU_C::MOV_EbGbR },
/* 89 /wr */ { 0, &BX_CPU_C::MOV_EwGwR },
/* 8A /wr */ { 0, &BX_CPU_C::MOV_GbEbR },
@ -750,7 +750,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
// 512 entries for 32bit mode
/* 00 /dr */ { 0, &BX_CPU_C::ADD_EbGbR },
/* 01 /dr */ { 0, &BX_CPU_C::ADD_EdGdR },
/* 02 /dr */ { 0, &BX_CPU_C::ADD_GbEb },
/* 02 /dr */ { 0, &BX_CPU_C::ADD_GbEbR },
/* 03 /dr */ { 0, &BX_CPU_C::ADD_GdEdR },
/* 04 /dr */ { BxImmediate_Ib, &BX_CPU_C::ADD_ALIb },
/* 05 /dr */ { BxImmediate_Iv, &BX_CPU_C::ADD_EAXId },
@ -758,56 +758,56 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
/* 07 /dr */ { 0, &BX_CPU_C::POP32_ES },
/* 08 /dr */ { 0, &BX_CPU_C::OR_EbGbR },
/* 09 /dr */ { 0, &BX_CPU_C::OR_EdGdR },
/* 0A /dr */ { 0, &BX_CPU_C::OR_GbEb },
/* 0B /dr */ { 0, &BX_CPU_C::OR_GdEd },
/* 0A /dr */ { 0, &BX_CPU_C::OR_GbEbR },
/* 0B /dr */ { 0, &BX_CPU_C::OR_GdEdR },
/* 0C /dr */ { BxImmediate_Ib, &BX_CPU_C::OR_ALIb },
/* 0D /dr */ { BxImmediate_Iv, &BX_CPU_C::OR_EAXId },
/* 0E /dr */ { 0, &BX_CPU_C::PUSH32_CS },
/* 0F /dr */ { 0, &BX_CPU_C::BxError }, // 2-byte escape
/* 10 /dr */ { 0, &BX_CPU_C::ADC_EbGbR },
/* 11 /dr */ { 0, &BX_CPU_C::ADC_EdGdR },
/* 12 /dr */ { 0, &BX_CPU_C::ADC_GbEb },
/* 13 /dr */ { 0, &BX_CPU_C::ADC_GdEd },
/* 12 /dr */ { 0, &BX_CPU_C::ADC_GbEbR },
/* 13 /dr */ { 0, &BX_CPU_C::ADC_GdEdR },
/* 14 /dr */ { BxImmediate_Ib, &BX_CPU_C::ADC_ALIb },
/* 15 /dr */ { BxImmediate_Iv, &BX_CPU_C::ADC_EAXId },
/* 16 /dr */ { 0, &BX_CPU_C::PUSH32_SS },
/* 17 /dr */ { 0, &BX_CPU_C::POP32_SS },
/* 18 /dr */ { 0, &BX_CPU_C::SBB_EbGbR },
/* 19 /dr */ { 0, &BX_CPU_C::SBB_EdGdR },
/* 1A /dr */ { 0, &BX_CPU_C::SBB_GbEb },
/* 1B /dr */ { 0, &BX_CPU_C::SBB_GdEd },
/* 1A /dr */ { 0, &BX_CPU_C::SBB_GbEbR },
/* 1B /dr */ { 0, &BX_CPU_C::SBB_GdEdR },
/* 1C /dr */ { BxImmediate_Ib, &BX_CPU_C::SBB_ALIb },
/* 1D /dr */ { BxImmediate_Iv, &BX_CPU_C::SBB_EAXId },
/* 1E /dr */ { 0, &BX_CPU_C::PUSH32_DS },
/* 1F /dr */ { 0, &BX_CPU_C::POP32_DS },
/* 20 /dr */ { 0, &BX_CPU_C::AND_EbGbR },
/* 21 /dr */ { 0, &BX_CPU_C::AND_EdGdR },
/* 22 /dr */ { 0, &BX_CPU_C::AND_GbEb },
/* 23 /dr */ { 0, &BX_CPU_C::AND_GdEd },
/* 22 /dr */ { 0, &BX_CPU_C::AND_GbEbR },
/* 23 /dr */ { 0, &BX_CPU_C::AND_GdEdR },
/* 24 /dr */ { BxImmediate_Ib, &BX_CPU_C::AND_ALIb },
/* 25 /dr */ { BxImmediate_Iv, &BX_CPU_C::AND_EAXId },
/* 26 /dr */ { BxPrefix, &BX_CPU_C::BxError }, // ES:
/* 27 /dr */ { 0, &BX_CPU_C::DAA },
/* 28 /dr */ { 0, &BX_CPU_C::SUB_EbGbR },
/* 29 /dr */ { 0, &BX_CPU_C::SUB_EdGdR },
/* 2A /dr */ { 0, &BX_CPU_C::SUB_GbEb },
/* 2B /dr */ { 0, &BX_CPU_C::SUB_GdEd },
/* 2A /dr */ { 0, &BX_CPU_C::SUB_GbEbR },
/* 2B /dr */ { 0, &BX_CPU_C::SUB_GdEdR },
/* 2C /dr */ { BxImmediate_Ib, &BX_CPU_C::SUB_ALIb },
/* 2D /dr */ { BxImmediate_Iv, &BX_CPU_C::SUB_EAXId },
/* 2E /dr */ { BxPrefix, &BX_CPU_C::BxError }, // CS:
/* 2F /dr */ { 0, &BX_CPU_C::DAS },
/* 30 /dr */ { 0, &BX_CPU_C::XOR_EbGbR },
/* 31 /dr */ { 0, &BX_CPU_C::XOR_EdGdR },
/* 32 /dr */ { 0, &BX_CPU_C::XOR_GbEb },
/* 33 /dr */ { 0, &BX_CPU_C::XOR_GdEd },
/* 32 /dr */ { 0, &BX_CPU_C::XOR_GbEbR },
/* 33 /dr */ { 0, &BX_CPU_C::XOR_GdEdR },
/* 34 /dr */ { BxImmediate_Ib, &BX_CPU_C::XOR_ALIb },
/* 35 /dr */ { BxImmediate_Iv, &BX_CPU_C::XOR_EAXId },
/* 36 /dr */ { BxPrefix, &BX_CPU_C::BxError }, // SS:
/* 37 /dr */ { 0, &BX_CPU_C::AAA },
/* 38 /dr */ { 0, &BX_CPU_C::CMP_EbGbR },
/* 39 /dr */ { 0, &BX_CPU_C::CMP_EdGdR },
/* 3A /dr */ { 0, &BX_CPU_C::CMP_GbEb },
/* 3B /dr */ { 0, &BX_CPU_C::CMP_GdEd },
/* 3A /dr */ { 0, &BX_CPU_C::CMP_GbEbR },
/* 3B /dr */ { 0, &BX_CPU_C::CMP_GdEdR },
/* 3C /dr */ { BxImmediate_Ib, &BX_CPU_C::CMP_ALIb },
/* 3D /dr */ { BxImmediate_Iv, &BX_CPU_C::CMP_EAXId },
/* 3E /dr */ { BxPrefix, &BX_CPU_C::BxError }, // DS:
@ -1321,7 +1321,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32M[512*2] = {
// 512 entries for 16bit mode
/* 00 /wm */ { BxLockable, &BX_CPU_C::ADD_EbGbM },
/* 01 /wm */ { BxLockable, &BX_CPU_C::ADD_EwGwM },
/* 02 /wm */ { 0, &BX_CPU_C::ADD_GbEb },
/* 02 /wm */ { 0, &BX_CPU_C::ADD_GbEbM },
/* 03 /wm */ { 0, &BX_CPU_C::ADD_GwEwM },
/* 04 /wm */ { BxImmediate_Ib, &BX_CPU_C::ADD_ALIb },
/* 05 /wm */ { BxImmediate_Iv, &BX_CPU_C::ADD_AXIw },
@ -1329,56 +1329,56 @@ static const BxOpcodeInfo_t BxOpcodeInfo32M[512*2] = {
/* 07 /wm */ { 0, &BX_CPU_C::POP16_ES },
/* 08 /wm */ { BxLockable, &BX_CPU_C::OR_EbGbM },
/* 09 /wm */ { BxLockable, &BX_CPU_C::OR_EwGwM },
/* 0A /wm */ { 0, &BX_CPU_C::OR_GbEb },
/* 0B /wm */ { 0, &BX_CPU_C::OR_GwEw },
/* 0A /wm */ { 0, &BX_CPU_C::OR_GbEbM },
/* 0B /wm */ { 0, &BX_CPU_C::OR_GwEwM },
/* 0C /wm */ { BxImmediate_Ib, &BX_CPU_C::OR_ALIb },
/* 0D /wm */ { BxImmediate_Iv, &BX_CPU_C::OR_AXIw },
/* 0E /wm */ { 0, &BX_CPU_C::PUSH16_CS },
/* 0F /wm */ { 0, &BX_CPU_C::BxError }, // 2-byte escape
/* 10 /wm */ { BxLockable, &BX_CPU_C::ADC_EbGbM },
/* 11 /wm */ { BxLockable, &BX_CPU_C::ADC_EwGwM },
/* 12 /wm */ { 0, &BX_CPU_C::ADC_GbEb },
/* 13 /wm */ { 0, &BX_CPU_C::ADC_GwEw },
/* 12 /wm */ { 0, &BX_CPU_C::ADC_GbEbM },
/* 13 /wm */ { 0, &BX_CPU_C::ADC_GwEwM },
/* 14 /wm */ { BxImmediate_Ib, &BX_CPU_C::ADC_ALIb },
/* 15 /wm */ { BxImmediate_Iv, &BX_CPU_C::ADC_AXIw },
/* 16 /wm */ { 0, &BX_CPU_C::PUSH16_SS },
/* 17 /wm */ { 0, &BX_CPU_C::POP16_SS },
/* 18 /wm */ { BxLockable, &BX_CPU_C::SBB_EbGbM },
/* 19 /wm */ { BxLockable, &BX_CPU_C::SBB_EwGwM },
/* 1A /wm */ { 0, &BX_CPU_C::SBB_GbEb },
/* 1B /wm */ { 0, &BX_CPU_C::SBB_GwEw },
/* 1A /wm */ { 0, &BX_CPU_C::SBB_GbEbM },
/* 1B /wm */ { 0, &BX_CPU_C::SBB_GwEwM },
/* 1C /wm */ { BxImmediate_Ib, &BX_CPU_C::SBB_ALIb },
/* 1D /wm */ { BxImmediate_Iv, &BX_CPU_C::SBB_AXIw },
/* 1E /wm */ { 0, &BX_CPU_C::PUSH16_DS },
/* 1F /wm */ { 0, &BX_CPU_C::POP16_DS },
/* 20 /wm */ { BxLockable, &BX_CPU_C::AND_EbGbM },
/* 21 /wm */ { BxLockable, &BX_CPU_C::AND_EwGwM },
/* 22 /wm */ { 0, &BX_CPU_C::AND_GbEb },
/* 23 /wm */ { 0, &BX_CPU_C::AND_GwEw },
/* 22 /wm */ { 0, &BX_CPU_C::AND_GbEbM },
/* 23 /wm */ { 0, &BX_CPU_C::AND_GwEwM },
/* 24 /wm */ { BxImmediate_Ib, &BX_CPU_C::AND_ALIb },
/* 25 /wm */ { BxImmediate_Iv, &BX_CPU_C::AND_AXIw },
/* 26 /wm */ { BxPrefix, &BX_CPU_C::BxError }, // ES:
/* 27 /wm */ { 0, &BX_CPU_C::DAA },
/* 28 /wm */ { BxLockable, &BX_CPU_C::SUB_EbGbM },
/* 29 /wm */ { BxLockable, &BX_CPU_C::SUB_EwGwM },
/* 2A /wm */ { 0, &BX_CPU_C::SUB_GbEb },
/* 2B /wm */ { 0, &BX_CPU_C::SUB_GwEw },
/* 2A /wm */ { 0, &BX_CPU_C::SUB_GbEbM },
/* 2B /wm */ { 0, &BX_CPU_C::SUB_GwEwM },
/* 2C /wm */ { BxImmediate_Ib, &BX_CPU_C::SUB_ALIb },
/* 2D /wm */ { BxImmediate_Iv, &BX_CPU_C::SUB_AXIw },
/* 2E /wm */ { BxPrefix, &BX_CPU_C::BxError }, // CS:
/* 2F /wm */ { 0, &BX_CPU_C::DAS },
/* 30 /wm */ { BxLockable, &BX_CPU_C::XOR_EbGbM },
/* 31 /wm */ { BxLockable, &BX_CPU_C::XOR_EwGwM },
/* 32 /wm */ { 0, &BX_CPU_C::XOR_GbEb },
/* 33 /wm */ { 0, &BX_CPU_C::XOR_GwEw },
/* 32 /wm */ { 0, &BX_CPU_C::XOR_GbEbM },
/* 33 /wm */ { 0, &BX_CPU_C::XOR_GwEwM },
/* 34 /wm */ { BxImmediate_Ib, &BX_CPU_C::XOR_ALIb },
/* 35 /wm */ { BxImmediate_Iv, &BX_CPU_C::XOR_AXIw },
/* 36 /wm */ { BxPrefix, &BX_CPU_C::BxError }, // SS:
/* 37 /wm */ { 0, &BX_CPU_C::AAA },
/* 38 /wm */ { 0, &BX_CPU_C::CMP_EbGbM },
/* 39 /wm */ { 0, &BX_CPU_C::CMP_EwGwM },
/* 3A /wm */ { 0, &BX_CPU_C::CMP_GbEb },
/* 3B /wm */ { 0, &BX_CPU_C::CMP_GwEw },
/* 3A /wm */ { 0, &BX_CPU_C::CMP_GbEbM },
/* 3B /wm */ { 0, &BX_CPU_C::CMP_GwEwM },
/* 3C /wm */ { BxImmediate_Ib, &BX_CPU_C::CMP_ALIb },
/* 3D /wm */ { BxImmediate_Iv, &BX_CPU_C::CMP_AXIw },
/* 3E /wm */ { BxPrefix, &BX_CPU_C::BxError }, // DS:
@ -1454,7 +1454,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32M[512*2] = {
/* 84 /wm */ { 0, &BX_CPU_C::TEST_EbGbM },
/* 85 /wm */ { 0, &BX_CPU_C::TEST_EwGwM },
/* 86 /wm */ { BxLockable, &BX_CPU_C::XCHG_EbGbM },
/* 87 /wm */ { BxLockable, &BX_CPU_C::XCHG_EwGw },
/* 87 /wm */ { BxLockable, &BX_CPU_C::XCHG_EwGwM },
/* 88 /wm */ { 0, &BX_CPU_C::MOV_EbGbM },
/* 89 /wm */ { 0, &BX_CPU_C::MOV_EwGwM },
/* 8A /wm */ { 0, &BX_CPU_C::MOV_GbEbM },
@ -1885,7 +1885,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32M[512*2] = {
// 512 entries for 32bit mode
/* 00 /dm */ { BxLockable, &BX_CPU_C::ADD_EbGbM },
/* 01 /dm */ { BxLockable, &BX_CPU_C::ADD_EdGdM },
/* 02 /dm */ { 0, &BX_CPU_C::ADD_GbEb },
/* 02 /dm */ { 0, &BX_CPU_C::ADD_GbEbM },
/* 03 /dm */ { 0, &BX_CPU_C::ADD_GdEdM },
/* 04 /dm */ { BxImmediate_Ib, &BX_CPU_C::ADD_ALIb },
/* 05 /dm */ { BxImmediate_Iv, &BX_CPU_C::ADD_EAXId },
@ -1893,56 +1893,56 @@ static const BxOpcodeInfo_t BxOpcodeInfo32M[512*2] = {
/* 07 /dm */ { 0, &BX_CPU_C::POP32_ES },
/* 08 /dm */ { BxLockable, &BX_CPU_C::OR_EbGbM },
/* 09 /dm */ { BxLockable, &BX_CPU_C::OR_EdGdM },
/* 0A /dm */ { 0, &BX_CPU_C::OR_GbEb },
/* 0B /dm */ { 0, &BX_CPU_C::OR_GdEd },
/* 0A /dm */ { 0, &BX_CPU_C::OR_GbEbM },
/* 0B /dm */ { 0, &BX_CPU_C::OR_GdEdM },
/* 0C /dm */ { BxImmediate_Ib, &BX_CPU_C::OR_ALIb },
/* 0D /dm */ { BxImmediate_Iv, &BX_CPU_C::OR_EAXId },
/* 0E /dm */ { 0, &BX_CPU_C::PUSH32_CS },
/* 0F /dm */ { 0, &BX_CPU_C::BxError }, // 2-byte escape
/* 10 /dm */ { BxLockable, &BX_CPU_C::ADC_EbGbM },
/* 11 /dm */ { BxLockable, &BX_CPU_C::ADC_EdGdM },
/* 12 /dm */ { 0, &BX_CPU_C::ADC_GbEb },
/* 13 /dm */ { 0, &BX_CPU_C::ADC_GdEd },
/* 12 /dm */ { 0, &BX_CPU_C::ADC_GbEbM },
/* 13 /dm */ { 0, &BX_CPU_C::ADC_GdEdM },
/* 14 /dm */ { BxImmediate_Ib, &BX_CPU_C::ADC_ALIb },
/* 15 /dm */ { BxImmediate_Iv, &BX_CPU_C::ADC_EAXId },
/* 16 /dm */ { 0, &BX_CPU_C::PUSH32_SS },
/* 17 /dm */ { 0, &BX_CPU_C::POP32_SS },
/* 18 /dm */ { BxLockable, &BX_CPU_C::SBB_EbGbM },
/* 19 /dm */ { BxLockable, &BX_CPU_C::SBB_EdGdM },
/* 1A /dm */ { 0, &BX_CPU_C::SBB_GbEb },
/* 1B /dm */ { 0, &BX_CPU_C::SBB_GdEd },
/* 1A /dm */ { 0, &BX_CPU_C::SBB_GbEbM },
/* 1B /dm */ { 0, &BX_CPU_C::SBB_GdEdM },
/* 1C /dm */ { BxImmediate_Ib, &BX_CPU_C::SBB_ALIb },
/* 1D /dm */ { BxImmediate_Iv, &BX_CPU_C::SBB_EAXId },
/* 1E /dm */ { 0, &BX_CPU_C::PUSH32_DS },
/* 1F /dm */ { 0, &BX_CPU_C::POP32_DS },
/* 20 /dm */ { BxLockable, &BX_CPU_C::AND_EbGbM },
/* 21 /dm */ { BxLockable, &BX_CPU_C::AND_EdGdM },
/* 22 /dm */ { 0, &BX_CPU_C::AND_GbEb },
/* 23 /dm */ { 0, &BX_CPU_C::AND_GdEd },
/* 22 /dm */ { 0, &BX_CPU_C::AND_GbEbM },
/* 23 /dm */ { 0, &BX_CPU_C::AND_GdEdM },
/* 24 /dm */ { BxImmediate_Ib, &BX_CPU_C::AND_ALIb },
/* 25 /dm */ { BxImmediate_Iv, &BX_CPU_C::AND_EAXId },
/* 26 /dm */ { BxPrefix, &BX_CPU_C::BxError }, // ES:
/* 27 /dm */ { 0, &BX_CPU_C::DAA },
/* 28 /dm */ { BxLockable, &BX_CPU_C::SUB_EbGbM },
/* 29 /dm */ { BxLockable, &BX_CPU_C::SUB_EdGdM },
/* 2A /dm */ { 0, &BX_CPU_C::SUB_GbEb },
/* 2B /dm */ { 0, &BX_CPU_C::SUB_GdEd },
/* 2A /dm */ { 0, &BX_CPU_C::SUB_GbEbM },
/* 2B /dm */ { 0, &BX_CPU_C::SUB_GdEdM },
/* 2C /dm */ { BxImmediate_Ib, &BX_CPU_C::SUB_ALIb },
/* 2D /dm */ { BxImmediate_Iv, &BX_CPU_C::SUB_EAXId },
/* 2E /dm */ { BxPrefix, &BX_CPU_C::BxError }, // CS:
/* 2F /dm */ { 0, &BX_CPU_C::DAS },
/* 30 /dm */ { BxLockable, &BX_CPU_C::XOR_EbGbM },
/* 31 /dm */ { BxLockable, &BX_CPU_C::XOR_EdGdM },
/* 32 /dm */ { 0, &BX_CPU_C::XOR_GbEb },
/* 33 /dm */ { 0, &BX_CPU_C::XOR_GdEd },
/* 32 /dm */ { 0, &BX_CPU_C::XOR_GbEbM },
/* 33 /dm */ { 0, &BX_CPU_C::XOR_GdEdM },
/* 34 /dm */ { BxImmediate_Ib, &BX_CPU_C::XOR_ALIb },
/* 35 /dm */ { BxImmediate_Iv, &BX_CPU_C::XOR_EAXId },
/* 36 /dm */ { BxPrefix, &BX_CPU_C::BxError }, // SS:
/* 37 /dm */ { 0, &BX_CPU_C::AAA },
/* 38 /dm */ { 0, &BX_CPU_C::CMP_EbGbM },
/* 39 /dm */ { 0, &BX_CPU_C::CMP_EdGdM },
/* 3A /dm */ { 0, &BX_CPU_C::CMP_GbEb },
/* 3B /dm */ { 0, &BX_CPU_C::CMP_GdEd },
/* 3A /dm */ { 0, &BX_CPU_C::CMP_GbEbM },
/* 3B /dm */ { 0, &BX_CPU_C::CMP_GdEdM },
/* 3C /dm */ { BxImmediate_Ib, &BX_CPU_C::CMP_ALIb },
/* 3D /dm */ { BxImmediate_Iv, &BX_CPU_C::CMP_EAXId },
/* 3E /dm */ { BxPrefix, &BX_CPU_C::BxError }, // DS:

190
bochs/cpu/fetchdecode64.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: fetchdecode64.cc,v 1.144 2007-11-20 23:00:43 sshwarts Exp $
// $Id: fetchdecode64.cc,v 1.145 2007-11-21 22:36:01 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -175,7 +175,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
// 512 entries for 16bit operand size
/* 00 /wr */ { 0, &BX_CPU_C::ADD_EbGbR },
/* 01 /wr */ { 0, &BX_CPU_C::ADD_EwGwR },
/* 02 /wr */ { 0, &BX_CPU_C::ADD_GbEb },
/* 02 /wr */ { 0, &BX_CPU_C::ADD_GbEbR },
/* 03 /wr */ { 0, &BX_CPU_C::ADD_GwEwR },
/* 04 /wr */ { BxImmediate_Ib, &BX_CPU_C::ADD_ALIb },
/* 05 /wr */ { BxImmediate_Iv, &BX_CPU_C::ADD_AXIw },
@ -183,56 +183,56 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
/* 07 /wr */ { 0, &BX_CPU_C::BxError },
/* 08 /wr */ { 0, &BX_CPU_C::OR_EbGbR },
/* 09 /wr */ { 0, &BX_CPU_C::OR_EwGwR },
/* 0A /wr */ { 0, &BX_CPU_C::OR_GbEb },
/* 0B /wr */ { 0, &BX_CPU_C::OR_GwEw },
/* 0A /wr */ { 0, &BX_CPU_C::OR_GbEbR },
/* 0B /wr */ { 0, &BX_CPU_C::OR_GwEwR },
/* 0C /wr */ { BxImmediate_Ib, &BX_CPU_C::OR_ALIb },
/* 0D /wr */ { BxImmediate_Iv, &BX_CPU_C::OR_AXIw },
/* 0E /wr */ { 0, &BX_CPU_C::BxError },
/* 0F /wr */ { 0, &BX_CPU_C::BxError }, // 2-byte escape
/* 10 /wr */ { 0, &BX_CPU_C::ADC_EbGbR },
/* 11 /wr */ { 0, &BX_CPU_C::ADC_EwGwR },
/* 12 /wr */ { 0, &BX_CPU_C::ADC_GbEb },
/* 13 /wr */ { 0, &BX_CPU_C::ADC_GwEw },
/* 12 /wr */ { 0, &BX_CPU_C::ADC_GbEbR },
/* 13 /wr */ { 0, &BX_CPU_C::ADC_GwEwR },
/* 14 /wr */ { BxImmediate_Ib, &BX_CPU_C::ADC_ALIb },
/* 15 /wr */ { BxImmediate_Iv, &BX_CPU_C::ADC_AXIw },
/* 16 /wr */ { 0, &BX_CPU_C::BxError },
/* 17 /wr */ { 0, &BX_CPU_C::BxError },
/* 18 /wr */ { 0, &BX_CPU_C::SBB_EbGbR },
/* 19 /wr */ { 0, &BX_CPU_C::SBB_EwGwR },
/* 1A /wr */ { 0, &BX_CPU_C::SBB_GbEb },
/* 1B /wr */ { 0, &BX_CPU_C::SBB_GwEw },
/* 1A /wr */ { 0, &BX_CPU_C::SBB_GbEbR },
/* 1B /wr */ { 0, &BX_CPU_C::SBB_GwEwR },
/* 1C /wr */ { BxImmediate_Ib, &BX_CPU_C::SBB_ALIb },
/* 1D /wr */ { BxImmediate_Iv, &BX_CPU_C::SBB_AXIw },
/* 1E /wr */ { 0, &BX_CPU_C::BxError },
/* 1F /wr */ { 0, &BX_CPU_C::BxError },
/* 20 /wr */ { 0, &BX_CPU_C::AND_EbGbR },
/* 21 /wr */ { 0, &BX_CPU_C::AND_EwGwR },
/* 22 /wr */ { 0, &BX_CPU_C::AND_GbEb },
/* 23 /wr */ { 0, &BX_CPU_C::AND_GwEw },
/* 22 /wr */ { 0, &BX_CPU_C::AND_GbEbR },
/* 23 /wr */ { 0, &BX_CPU_C::AND_GwEwR },
/* 24 /wr */ { BxImmediate_Ib, &BX_CPU_C::AND_ALIb },
/* 25 /wr */ { BxImmediate_Iv, &BX_CPU_C::AND_AXIw },
/* 26 /wr */ { BxPrefix, &BX_CPU_C::BxError }, // ES:
/* 27 /wr */ { 0, &BX_CPU_C::BxError },
/* 28 /wr */ { 0, &BX_CPU_C::SUB_EbGbR },
/* 29 /wr */ { 0, &BX_CPU_C::SUB_EwGwR },
/* 2A /wr */ { 0, &BX_CPU_C::SUB_GbEb },
/* 2B /wr */ { 0, &BX_CPU_C::SUB_GwEw },
/* 2A /wr */ { 0, &BX_CPU_C::SUB_GbEbR },
/* 2B /wr */ { 0, &BX_CPU_C::SUB_GwEwR },
/* 2C /wr */ { BxImmediate_Ib, &BX_CPU_C::SUB_ALIb },
/* 2D /wr */ { BxImmediate_Iv, &BX_CPU_C::SUB_AXIw },
/* 2E /wr */ { BxPrefix, &BX_CPU_C::BxError }, // CS:
/* 2F /wr */ { 0, &BX_CPU_C::BxError },
/* 30 /wr */ { 0, &BX_CPU_C::XOR_EbGbR },
/* 31 /wr */ { 0, &BX_CPU_C::XOR_EwGwR },
/* 32 /wr */ { 0, &BX_CPU_C::XOR_GbEb },
/* 33 /wr */ { 0, &BX_CPU_C::XOR_GwEw },
/* 32 /wr */ { 0, &BX_CPU_C::XOR_GbEbR },
/* 33 /wr */ { 0, &BX_CPU_C::XOR_GwEwR },
/* 34 /wr */ { BxImmediate_Ib, &BX_CPU_C::XOR_ALIb },
/* 35 /wr */ { BxImmediate_Iv, &BX_CPU_C::XOR_AXIw },
/* 36 /wr */ { BxPrefix, &BX_CPU_C::BxError }, // SS:
/* 37 /wr */ { 0, &BX_CPU_C::BxError },
/* 38 /wr */ { 0, &BX_CPU_C::CMP_EbGbR },
/* 39 /wr */ { 0, &BX_CPU_C::CMP_EwGwR },
/* 3A /wr */ { 0, &BX_CPU_C::CMP_GbEb },
/* 3B /wr */ { 0, &BX_CPU_C::CMP_GwEw },
/* 3A /wr */ { 0, &BX_CPU_C::CMP_GbEbR },
/* 3B /wr */ { 0, &BX_CPU_C::CMP_GwEwR },
/* 3C /wr */ { BxImmediate_Ib, &BX_CPU_C::CMP_ALIb },
/* 3D /wr */ { BxImmediate_Iv, &BX_CPU_C::CMP_AXIw },
/* 3E /wr */ { BxPrefix, &BX_CPU_C::BxError }, // DS:
@ -308,7 +308,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
/* 84 /wr */ { 0, &BX_CPU_C::TEST_EbGbR },
/* 85 /wr */ { 0, &BX_CPU_C::TEST_EwGwR },
/* 86 /wr */ { 0, &BX_CPU_C::XCHG_EbGbR },
/* 87 /wr */ { 0, &BX_CPU_C::XCHG_EwGw },
/* 87 /wr */ { 0, &BX_CPU_C::XCHG_EwGwR },
/* 88 /wr */ { 0, &BX_CPU_C::MOV_EbGbR },
/* 89 /wr */ { 0, &BX_CPU_C::MOV_EwGwR },
/* 8A /wr */ { 0, &BX_CPU_C::MOV_GbEbR },
@ -704,7 +704,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
// 512 entries for 32bit operand size
/* 00 /dr */ { 0, &BX_CPU_C::ADD_EbGbR },
/* 01 /dr */ { 0, &BX_CPU_C::ADD_EdGdR },
/* 02 /dr */ { 0, &BX_CPU_C::ADD_GbEb },
/* 02 /dr */ { 0, &BX_CPU_C::ADD_GbEbR },
/* 03 /dr */ { 0, &BX_CPU_C::ADD_GdEdR },
/* 04 /dr */ { BxImmediate_Ib, &BX_CPU_C::ADD_ALIb },
/* 05 /dr */ { BxImmediate_Iv, &BX_CPU_C::ADD_EAXId },
@ -712,56 +712,56 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
/* 07 /dr */ { 0, &BX_CPU_C::BxError },
/* 08 /dr */ { 0, &BX_CPU_C::OR_EbGbR },
/* 09 /dr */ { 0, &BX_CPU_C::OR_EdGdR },
/* 0A /dr */ { 0, &BX_CPU_C::OR_GbEb },
/* 0B /dr */ { 0, &BX_CPU_C::OR_GdEd },
/* 0A /dr */ { 0, &BX_CPU_C::OR_GbEbR },
/* 0B /dr */ { 0, &BX_CPU_C::OR_GdEdR },
/* 0C /dr */ { BxImmediate_Ib, &BX_CPU_C::OR_ALIb },
/* 0D /dr */ { BxImmediate_Iv, &BX_CPU_C::OR_EAXId },
/* 0E /dr */ { 0, &BX_CPU_C::BxError },
/* 0F /dr */ { 0, &BX_CPU_C::BxError }, // 2-byte escape
/* 10 /dr */ { 0, &BX_CPU_C::ADC_EbGbR },
/* 11 /dr */ { 0, &BX_CPU_C::ADC_EdGdR },
/* 12 /dr */ { 0, &BX_CPU_C::ADC_GbEb },
/* 13 /dr */ { 0, &BX_CPU_C::ADC_GdEd },
/* 12 /dr */ { 0, &BX_CPU_C::ADC_GbEbR },
/* 13 /dr */ { 0, &BX_CPU_C::ADC_GdEdR },
/* 14 /dr */ { BxImmediate_Ib, &BX_CPU_C::ADC_ALIb },
/* 15 /dr */ { BxImmediate_Iv, &BX_CPU_C::ADC_EAXId },
/* 16 /dr */ { 0, &BX_CPU_C::BxError },
/* 17 /dr */ { 0, &BX_CPU_C::BxError },
/* 18 /dr */ { 0, &BX_CPU_C::SBB_EbGbR },
/* 19 /dr */ { 0, &BX_CPU_C::SBB_EdGdR },
/* 1A /dr */ { 0, &BX_CPU_C::SBB_GbEb },
/* 1B /dr */ { 0, &BX_CPU_C::SBB_GdEd },
/* 1A /dr */ { 0, &BX_CPU_C::SBB_GbEbR },
/* 1B /dr */ { 0, &BX_CPU_C::SBB_GdEdR },
/* 1C /dr */ { BxImmediate_Ib, &BX_CPU_C::SBB_ALIb },
/* 1D /dr */ { BxImmediate_Iv, &BX_CPU_C::SBB_EAXId },
/* 1E /dr */ { 0, &BX_CPU_C::BxError },
/* 1F /dr */ { 0, &BX_CPU_C::BxError },
/* 20 /dr */ { 0, &BX_CPU_C::AND_EbGbR },
/* 21 /dr */ { 0, &BX_CPU_C::AND_EdGdR },
/* 22 /dr */ { 0, &BX_CPU_C::AND_GbEb },
/* 23 /dr */ { 0, &BX_CPU_C::AND_GdEd },
/* 22 /dr */ { 0, &BX_CPU_C::AND_GbEbR },
/* 23 /dr */ { 0, &BX_CPU_C::AND_GdEdR },
/* 24 /dr */ { BxImmediate_Ib, &BX_CPU_C::AND_ALIb },
/* 25 /dr */ { BxImmediate_Iv, &BX_CPU_C::AND_EAXId },
/* 26 /dr */ { BxPrefix, &BX_CPU_C::BxError }, // ES:
/* 27 /dr */ { 0, &BX_CPU_C::BxError },
/* 28 /dr */ { 0, &BX_CPU_C::SUB_EbGbR },
/* 29 /dr */ { 0, &BX_CPU_C::SUB_EdGdR },
/* 2A /dr */ { 0, &BX_CPU_C::SUB_GbEb },
/* 2B /dr */ { 0, &BX_CPU_C::SUB_GdEd },
/* 2A /dr */ { 0, &BX_CPU_C::SUB_GbEbR },
/* 2B /dr */ { 0, &BX_CPU_C::SUB_GdEdR },
/* 2C /dr */ { BxImmediate_Ib, &BX_CPU_C::SUB_ALIb },
/* 2D /dr */ { BxImmediate_Iv, &BX_CPU_C::SUB_EAXId },
/* 2E /dr */ { BxPrefix, &BX_CPU_C::BxError }, // CS:
/* 2F /dr */ { 0, &BX_CPU_C::BxError },
/* 30 /dr */ { 0, &BX_CPU_C::XOR_EbGbR },
/* 31 /dr */ { 0, &BX_CPU_C::XOR_EdGdR },
/* 32 /dr */ { 0, &BX_CPU_C::XOR_GbEb },
/* 33 /dr */ { 0, &BX_CPU_C::XOR_GdEd },
/* 32 /dr */ { 0, &BX_CPU_C::XOR_GbEbR },
/* 33 /dr */ { 0, &BX_CPU_C::XOR_GdEdR },
/* 34 /dr */ { BxImmediate_Ib, &BX_CPU_C::XOR_ALIb },
/* 35 /dr */ { BxImmediate_Iv, &BX_CPU_C::XOR_EAXId },
/* 36 /dr */ { BxPrefix, &BX_CPU_C::BxError }, // SS:
/* 37 /dr */ { 0, &BX_CPU_C::BxError },
/* 38 /dr */ { 0, &BX_CPU_C::CMP_EbGbR },
/* 39 /dr */ { 0, &BX_CPU_C::CMP_EdGdR },
/* 3A /dr */ { 0, &BX_CPU_C::CMP_GbEb },
/* 3B /dr */ { 0, &BX_CPU_C::CMP_GdEd },
/* 3A /dr */ { 0, &BX_CPU_C::CMP_GbEbR },
/* 3B /dr */ { 0, &BX_CPU_C::CMP_GdEdR },
/* 3C /dr */ { BxImmediate_Ib, &BX_CPU_C::CMP_ALIb },
/* 3D /dr */ { BxImmediate_Iv, &BX_CPU_C::CMP_EAXId },
/* 3E /dr */ { BxPrefix, &BX_CPU_C::BxError }, // DS:
@ -1233,64 +1233,64 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
// 512 entries for 64bit operand size
/* 00 /qr */ { 0, &BX_CPU_C::ADD_EbGbR },
/* 01 /qr */ { 0, &BX_CPU_C::ADD_EqGqR },
/* 02 /qr */ { 0, &BX_CPU_C::ADD_GbEb },
/* 03 /qr */ { 0, &BX_CPU_C::ADD_GqEq },
/* 02 /qr */ { 0, &BX_CPU_C::ADD_GbEbR },
/* 03 /qr */ { 0, &BX_CPU_C::ADD_GqEqR },
/* 04 /qr */ { BxImmediate_Ib, &BX_CPU_C::ADD_ALIb },
/* 05 /qr */ { BxImmediate_Iv, &BX_CPU_C::ADD_RAXId },
/* 06 /qr */ { 0, &BX_CPU_C::BxError },
/* 07 /qr */ { 0, &BX_CPU_C::BxError },
/* 08 /qr */ { 0, &BX_CPU_C::OR_EbGbR },
/* 09 /qr */ { 0, &BX_CPU_C::OR_EqGqR },
/* 0A /qr */ { 0, &BX_CPU_C::OR_GbEb },
/* 0B /qr */ { 0, &BX_CPU_C::OR_GqEq },
/* 0A /qr */ { 0, &BX_CPU_C::OR_GbEbR },
/* 0B /qr */ { 0, &BX_CPU_C::OR_GqEqR },
/* 0C /qr */ { BxImmediate_Ib, &BX_CPU_C::OR_ALIb },
/* 0D /qr */ { BxImmediate_Iv, &BX_CPU_C::OR_RAXId },
/* 0E /qr */ { 0, &BX_CPU_C::BxError },
/* 0F /qr */ { 0, &BX_CPU_C::BxError }, // 2-byte escape
/* 10 /qr */ { 0, &BX_CPU_C::ADC_EbGbR },
/* 11 /qr */ { 0, &BX_CPU_C::ADC_EqGqR },
/* 12 /qr */ { 0, &BX_CPU_C::ADC_GbEb },
/* 13 /qr */ { 0, &BX_CPU_C::ADC_GqEq },
/* 12 /qr */ { 0, &BX_CPU_C::ADC_GbEbR },
/* 13 /qr */ { 0, &BX_CPU_C::ADC_GqEqR },
/* 14 /qr */ { BxImmediate_Ib, &BX_CPU_C::ADC_ALIb },
/* 15 /qr */ { BxImmediate_Iv, &BX_CPU_C::ADC_RAXId },
/* 16 /qr */ { 0, &BX_CPU_C::BxError },
/* 17 /qr */ { 0, &BX_CPU_C::BxError },
/* 18 /qr */ { 0, &BX_CPU_C::SBB_EbGbR },
/* 19 /qr */ { 0, &BX_CPU_C::SBB_EqGqR },
/* 1A /qr */ { 0, &BX_CPU_C::SBB_GbEb },
/* 1B /qr */ { 0, &BX_CPU_C::SBB_GqEq },
/* 1A /qr */ { 0, &BX_CPU_C::SBB_GbEbR },
/* 1B /qr */ { 0, &BX_CPU_C::SBB_GqEqR },
/* 1C /qr */ { BxImmediate_Ib, &BX_CPU_C::SBB_ALIb },
/* 1D /qr */ { BxImmediate_Iv, &BX_CPU_C::SBB_RAXId },
/* 1E /qr */ { 0, &BX_CPU_C::BxError },
/* 1F /qr */ { 0, &BX_CPU_C::BxError },
/* 20 /qr */ { 0, &BX_CPU_C::AND_EbGbR },
/* 21 /qr */ { 0, &BX_CPU_C::AND_EqGqR },
/* 22 /qr */ { 0, &BX_CPU_C::AND_GbEb },
/* 23 /qr */ { 0, &BX_CPU_C::AND_GqEq },
/* 22 /qr */ { 0, &BX_CPU_C::AND_GbEbR },
/* 23 /qr */ { 0, &BX_CPU_C::AND_GqEqR },
/* 24 /qr */ { BxImmediate_Ib, &BX_CPU_C::AND_ALIb },
/* 25 /qr */ { BxImmediate_Iv, &BX_CPU_C::AND_RAXId },
/* 26 /qr */ { BxPrefix, &BX_CPU_C::BxError }, // ES:
/* 27 /qr */ { 0, &BX_CPU_C::BxError },
/* 28 /qr */ { 0, &BX_CPU_C::SUB_EbGbR },
/* 29 /qr */ { 0, &BX_CPU_C::SUB_EqGqR },
/* 2A /qr */ { 0, &BX_CPU_C::SUB_GbEb },
/* 2B /qr */ { 0, &BX_CPU_C::SUB_GqEq },
/* 2A /qr */ { 0, &BX_CPU_C::SUB_GbEbR },
/* 2B /qr */ { 0, &BX_CPU_C::SUB_GqEqR },
/* 2C /qr */ { BxImmediate_Ib, &BX_CPU_C::SUB_ALIb },
/* 2D /qr */ { BxImmediate_Iv, &BX_CPU_C::SUB_RAXId },
/* 2E /qr */ { BxPrefix, &BX_CPU_C::BxError }, // CS:
/* 2F /qr */ { 0, &BX_CPU_C::BxError },
/* 30 /qr */ { 0, &BX_CPU_C::XOR_EbGbR },
/* 31 /qr */ { 0, &BX_CPU_C::XOR_EqGqR },
/* 32 /qr */ { 0, &BX_CPU_C::XOR_GbEb },
/* 33 /qr */ { 0, &BX_CPU_C::XOR_GqEq },
/* 32 /qr */ { 0, &BX_CPU_C::XOR_GbEbR },
/* 33 /qr */ { 0, &BX_CPU_C::XOR_GqEqR },
/* 34 /qr */ { BxImmediate_Ib, &BX_CPU_C::XOR_ALIb },
/* 35 /qr */ { BxImmediate_Iv, &BX_CPU_C::XOR_RAXId },
/* 36 /qr */ { BxPrefix, &BX_CPU_C::BxError }, // SS:
/* 37 /qr */ { 0, &BX_CPU_C::BxError },
/* 38 /qr */ { 0, &BX_CPU_C::CMP_EbGbR },
/* 39 /qr */ { 0, &BX_CPU_C::CMP_EqGqR },
/* 3A /qr */ { 0, &BX_CPU_C::CMP_GbEb },
/* 3B /qr */ { 0, &BX_CPU_C::CMP_GqEq },
/* 3A /qr */ { 0, &BX_CPU_C::CMP_GbEbR },
/* 3B /qr */ { 0, &BX_CPU_C::CMP_GqEqR },
/* 3C /qr */ { BxImmediate_Ib, &BX_CPU_C::CMP_ALIb },
/* 3D /qr */ { BxImmediate_Iv, &BX_CPU_C::CMP_RAXId },
/* 3E /qr */ { BxPrefix, &BX_CPU_C::BxError }, // DS:
@ -1768,7 +1768,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64M[512*3] = {
// 512 entries for 16bit operand size
/* 00 /wm */ { BxLockable, &BX_CPU_C::ADD_EbGbM },
/* 01 /wm */ { BxLockable, &BX_CPU_C::ADD_EwGwM },
/* 02 /wm */ { 0, &BX_CPU_C::ADD_GbEb },
/* 02 /wm */ { 0, &BX_CPU_C::ADD_GbEbM },
/* 03 /wm */ { 0, &BX_CPU_C::ADD_GwEwM },
/* 04 /wm */ { BxImmediate_Ib, &BX_CPU_C::ADD_ALIb },
/* 05 /wm */ { BxImmediate_Iv, &BX_CPU_C::ADD_AXIw },
@ -1776,56 +1776,56 @@ static const BxOpcodeInfo_t BxOpcodeInfo64M[512*3] = {
/* 07 /wm */ { 0, &BX_CPU_C::BxError },
/* 08 /wm */ { BxLockable, &BX_CPU_C::OR_EbGbM },
/* 09 /wm */ { BxLockable, &BX_CPU_C::OR_EwGwM },
/* 0A /wm */ { 0, &BX_CPU_C::OR_GbEb },
/* 0B /wm */ { 0, &BX_CPU_C::OR_GwEw },
/* 0A /wm */ { 0, &BX_CPU_C::OR_GbEbM },
/* 0B /wm */ { 0, &BX_CPU_C::OR_GwEwM },
/* 0C /wm */ { BxImmediate_Ib, &BX_CPU_C::OR_ALIb },
/* 0D /wm */ { BxImmediate_Iv, &BX_CPU_C::OR_AXIw },
/* 0E /wm */ { 0, &BX_CPU_C::BxError },
/* 0F /wm */ { 0, &BX_CPU_C::BxError }, // 2-byte escape
/* 10 /wm */ { BxLockable, &BX_CPU_C::ADC_EbGbM },
/* 11 /wm */ { BxLockable, &BX_CPU_C::ADC_EwGwM },
/* 12 /wm */ { 0, &BX_CPU_C::ADC_GbEb },
/* 13 /wm */ { 0, &BX_CPU_C::ADC_GwEw },
/* 12 /wm */ { 0, &BX_CPU_C::ADC_GbEbM },
/* 13 /wm */ { 0, &BX_CPU_C::ADC_GwEwM },
/* 14 /wm */ { BxImmediate_Ib, &BX_CPU_C::ADC_ALIb },
/* 15 /wm */ { BxImmediate_Iv, &BX_CPU_C::ADC_AXIw },
/* 16 /wm */ { 0, &BX_CPU_C::BxError },
/* 17 /wm */ { 0, &BX_CPU_C::BxError },
/* 18 /wm */ { BxLockable, &BX_CPU_C::SBB_EbGbM },
/* 19 /wm */ { BxLockable, &BX_CPU_C::SBB_EwGwM },
/* 1A /wm */ { 0, &BX_CPU_C::SBB_GbEb },
/* 1B /wm */ { 0, &BX_CPU_C::SBB_GwEw },
/* 1A /wm */ { 0, &BX_CPU_C::SBB_GbEbM },
/* 1B /wm */ { 0, &BX_CPU_C::SBB_GwEwM },
/* 1C /wm */ { BxImmediate_Ib, &BX_CPU_C::SBB_ALIb },
/* 1D /wm */ { BxImmediate_Iv, &BX_CPU_C::SBB_AXIw },
/* 1E /wm */ { 0, &BX_CPU_C::BxError },
/* 1F /wm */ { 0, &BX_CPU_C::BxError },
/* 20 /wm */ { BxLockable, &BX_CPU_C::AND_EbGbM },
/* 21 /wm */ { BxLockable, &BX_CPU_C::AND_EwGwM },
/* 22 /wm */ { 0, &BX_CPU_C::AND_GbEb },
/* 23 /wm */ { 0, &BX_CPU_C::AND_GwEw },
/* 22 /wm */ { 0, &BX_CPU_C::AND_GbEbM },
/* 23 /wm */ { 0, &BX_CPU_C::AND_GwEwM },
/* 24 /wm */ { BxImmediate_Ib, &BX_CPU_C::AND_ALIb },
/* 25 /wm */ { BxImmediate_Iv, &BX_CPU_C::AND_AXIw },
/* 26 /wm */ { BxPrefix, &BX_CPU_C::BxError }, // ES:
/* 27 /wm */ { 0, &BX_CPU_C::BxError },
/* 28 /wm */ { BxLockable, &BX_CPU_C::SUB_EbGbM },
/* 29 /wm */ { BxLockable, &BX_CPU_C::SUB_EwGwM },
/* 2A /wm */ { 0, &BX_CPU_C::SUB_GbEb },
/* 2B /wm */ { 0, &BX_CPU_C::SUB_GwEw },
/* 2A /wm */ { 0, &BX_CPU_C::SUB_GbEbM },
/* 2B /wm */ { 0, &BX_CPU_C::SUB_GwEwM },
/* 2C /wm */ { BxImmediate_Ib, &BX_CPU_C::SUB_ALIb },
/* 2D /wm */ { BxImmediate_Iv, &BX_CPU_C::SUB_AXIw },
/* 2E /wm */ { BxPrefix, &BX_CPU_C::BxError }, // CS:
/* 2F /wm */ { 0, &BX_CPU_C::BxError },
/* 30 /wm */ { BxLockable, &BX_CPU_C::XOR_EbGbM },
/* 31 /wm */ { BxLockable, &BX_CPU_C::XOR_EwGwM },
/* 32 /wm */ { 0, &BX_CPU_C::XOR_GbEb },
/* 33 /wm */ { 0, &BX_CPU_C::XOR_GwEw },
/* 32 /wm */ { 0, &BX_CPU_C::XOR_GbEbM },
/* 33 /wm */ { 0, &BX_CPU_C::XOR_GwEwM },
/* 34 /wm */ { BxImmediate_Ib, &BX_CPU_C::XOR_ALIb },
/* 35 /wm */ { BxImmediate_Iv, &BX_CPU_C::XOR_AXIw },
/* 36 /wm */ { BxPrefix, &BX_CPU_C::BxError }, // SS:
/* 37 /wm */ { 0, &BX_CPU_C::BxError },
/* 38 /wm */ { 0, &BX_CPU_C::CMP_EbGbM },
/* 39 /wm */ { 0, &BX_CPU_C::CMP_EwGwM },
/* 3A /wm */ { 0, &BX_CPU_C::CMP_GbEb },
/* 3B /wm */ { 0, &BX_CPU_C::CMP_GwEw },
/* 3A /wm */ { 0, &BX_CPU_C::CMP_GbEbM },
/* 3B /wm */ { 0, &BX_CPU_C::CMP_GwEwM },
/* 3C /wm */ { BxImmediate_Ib, &BX_CPU_C::CMP_ALIb },
/* 3D /wm */ { BxImmediate_Iv, &BX_CPU_C::CMP_AXIw },
/* 3E /wm */ { BxPrefix, &BX_CPU_C::BxError }, // DS:
@ -1901,7 +1901,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64M[512*3] = {
/* 84 /wm */ { 0, &BX_CPU_C::TEST_EbGbM },
/* 85 /wm */ { 0, &BX_CPU_C::TEST_EwGwM },
/* 86 /wm */ { BxLockable, &BX_CPU_C::XCHG_EbGbM },
/* 87 /wm */ { BxLockable, &BX_CPU_C::XCHG_EwGw },
/* 87 /wm */ { BxLockable, &BX_CPU_C::XCHG_EwGwM },
/* 88 /wm */ { 0, &BX_CPU_C::MOV_EbGbM },
/* 89 /wm */ { 0, &BX_CPU_C::MOV_EwGwM },
/* 8A /wm */ { 0, &BX_CPU_C::MOV_GbEbM },
@ -2297,7 +2297,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64M[512*3] = {
// 512 entries for 32bit operand size
/* 00 /dm */ { BxLockable, &BX_CPU_C::ADD_EbGbM },
/* 01 /dm */ { BxLockable, &BX_CPU_C::ADD_EdGdM },
/* 02 /dm */ { 0, &BX_CPU_C::ADD_GbEb },
/* 02 /dm */ { 0, &BX_CPU_C::ADD_GbEbM },
/* 03 /dm */ { 0, &BX_CPU_C::ADD_GdEdM },
/* 04 /dm */ { BxImmediate_Ib, &BX_CPU_C::ADD_ALIb },
/* 05 /dm */ { BxImmediate_Iv, &BX_CPU_C::ADD_EAXId },
@ -2305,56 +2305,56 @@ static const BxOpcodeInfo_t BxOpcodeInfo64M[512*3] = {
/* 07 /dm */ { 0, &BX_CPU_C::BxError },
/* 08 /dm */ { BxLockable, &BX_CPU_C::OR_EbGbM },
/* 09 /dm */ { BxLockable, &BX_CPU_C::OR_EdGdM },
/* 0A /dm */ { 0, &BX_CPU_C::OR_GbEb },
/* 0B /dm */ { 0, &BX_CPU_C::OR_GdEd },
/* 0A /dm */ { 0, &BX_CPU_C::OR_GbEbM },
/* 0B /dm */ { 0, &BX_CPU_C::OR_GdEdM },
/* 0C /dm */ { BxImmediate_Ib, &BX_CPU_C::OR_ALIb },
/* 0D /dm */ { BxImmediate_Iv, &BX_CPU_C::OR_EAXId },
/* 0E /dm */ { 0, &BX_CPU_C::BxError },
/* 0F /dm */ { 0, &BX_CPU_C::BxError }, // 2-byte escape
/* 10 /dm */ { BxLockable, &BX_CPU_C::ADC_EbGbM },
/* 11 /dm */ { BxLockable, &BX_CPU_C::ADC_EdGdM },
/* 12 /dm */ { 0, &BX_CPU_C::ADC_GbEb },
/* 13 /dm */ { 0, &BX_CPU_C::ADC_GdEd },
/* 12 /dm */ { 0, &BX_CPU_C::ADC_GbEbM },
/* 13 /dm */ { 0, &BX_CPU_C::ADC_GdEdM },
/* 14 /dm */ { BxImmediate_Ib, &BX_CPU_C::ADC_ALIb },
/* 15 /dm */ { BxImmediate_Iv, &BX_CPU_C::ADC_EAXId },
/* 16 /dm */ { 0, &BX_CPU_C::BxError },
/* 17 /dm */ { 0, &BX_CPU_C::BxError },
/* 18 /dm */ { BxLockable, &BX_CPU_C::SBB_EbGbM },
/* 19 /dm */ { BxLockable, &BX_CPU_C::SBB_EdGdM },
/* 1A /dm */ { 0, &BX_CPU_C::SBB_GbEb },
/* 1B /dm */ { 0, &BX_CPU_C::SBB_GdEd },
/* 1A /dm */ { 0, &BX_CPU_C::SBB_GbEbM },
/* 1B /dm */ { 0, &BX_CPU_C::SBB_GdEdM },
/* 1C /dm */ { BxImmediate_Ib, &BX_CPU_C::SBB_ALIb },
/* 1D /dm */ { BxImmediate_Iv, &BX_CPU_C::SBB_EAXId },
/* 1E /dm */ { 0, &BX_CPU_C::BxError },
/* 1F /dm */ { 0, &BX_CPU_C::BxError },
/* 20 /dm */ { BxLockable, &BX_CPU_C::AND_EbGbM },
/* 21 /dm */ { BxLockable, &BX_CPU_C::AND_EdGdM },
/* 22 /dm */ { 0, &BX_CPU_C::AND_GbEb },
/* 23 /dm */ { 0, &BX_CPU_C::AND_GdEd },
/* 22 /dm */ { 0, &BX_CPU_C::AND_GbEbM },
/* 23 /dm */ { 0, &BX_CPU_C::AND_GdEdM },
/* 24 /dm */ { BxImmediate_Ib, &BX_CPU_C::AND_ALIb },
/* 25 /dm */ { BxImmediate_Iv, &BX_CPU_C::AND_EAXId },
/* 26 /dm */ { BxPrefix, &BX_CPU_C::BxError }, // ES:
/* 27 /dm */ { 0, &BX_CPU_C::BxError },
/* 28 /dm */ { BxLockable, &BX_CPU_C::SUB_EbGbM },
/* 29 /dm */ { BxLockable, &BX_CPU_C::SUB_EdGdM },
/* 2A /dm */ { 0, &BX_CPU_C::SUB_GbEb },
/* 2B /dm */ { 0, &BX_CPU_C::SUB_GdEd },
/* 2A /dm */ { 0, &BX_CPU_C::SUB_GbEbM },
/* 2B /dm */ { 0, &BX_CPU_C::SUB_GdEdM },
/* 2C /dm */ { BxImmediate_Ib, &BX_CPU_C::SUB_ALIb },
/* 2D /dm */ { BxImmediate_Iv, &BX_CPU_C::SUB_EAXId },
/* 2E /dm */ { BxPrefix, &BX_CPU_C::BxError }, // CS:
/* 2F /dm */ { 0, &BX_CPU_C::BxError },
/* 30 /dm */ { BxLockable, &BX_CPU_C::XOR_EbGbM },
/* 31 /dm */ { BxLockable, &BX_CPU_C::XOR_EdGdM },
/* 32 /dm */ { 0, &BX_CPU_C::XOR_GbEb },
/* 33 /dm */ { 0, &BX_CPU_C::XOR_GdEd },
/* 32 /dm */ { 0, &BX_CPU_C::XOR_GbEbM },
/* 33 /dm */ { 0, &BX_CPU_C::XOR_GdEdM },
/* 34 /dm */ { BxImmediate_Ib, &BX_CPU_C::XOR_ALIb },
/* 35 /dm */ { BxImmediate_Iv, &BX_CPU_C::XOR_EAXId },
/* 36 /dm */ { BxPrefix, &BX_CPU_C::BxError }, // SS:
/* 37 /dm */ { 0, &BX_CPU_C::BxError },
/* 38 /dm */ { 0, &BX_CPU_C::CMP_EbGbM },
/* 39 /dm */ { 0, &BX_CPU_C::CMP_EdGdM },
/* 3A /dm */ { 0, &BX_CPU_C::CMP_GbEb },
/* 3B /dm */ { 0, &BX_CPU_C::CMP_GdEd },
/* 3A /dm */ { 0, &BX_CPU_C::CMP_GbEbM },
/* 3B /dm */ { 0, &BX_CPU_C::CMP_GdEdM },
/* 3C /dm */ { BxImmediate_Ib, &BX_CPU_C::CMP_ALIb },
/* 3D /dm */ { BxImmediate_Iv, &BX_CPU_C::CMP_EAXId },
/* 3E /dm */ { BxPrefix, &BX_CPU_C::BxError }, // DS:
@ -2826,64 +2826,64 @@ static const BxOpcodeInfo_t BxOpcodeInfo64M[512*3] = {
// 512 entries for 64bit operand size
/* 00 /qm */ { BxLockable, &BX_CPU_C::ADD_EbGbM },
/* 01 /qm */ { BxLockable, &BX_CPU_C::ADD_EqGqM },
/* 02 /qm */ { 0, &BX_CPU_C::ADD_GbEb },
/* 03 /qm */ { 0, &BX_CPU_C::ADD_GqEq },
/* 02 /qm */ { 0, &BX_CPU_C::ADD_GbEbM },
/* 03 /qm */ { 0, &BX_CPU_C::ADD_GqEqM },
/* 04 /qm */ { BxImmediate_Ib, &BX_CPU_C::ADD_ALIb },
/* 05 /qm */ { BxImmediate_Iv, &BX_CPU_C::ADD_RAXId },
/* 06 /qm */ { 0, &BX_CPU_C::BxError },
/* 07 /qm */ { 0, &BX_CPU_C::BxError },
/* 08 /qm */ { 0, &BX_CPU_C::OR_EbGbM },
/* 09 /qm */ { BxLockable, &BX_CPU_C::OR_EqGqM },
/* 0A /qm */ { BxLockable, &BX_CPU_C::OR_GbEb },
/* 0B /qm */ { 0, &BX_CPU_C::OR_GqEq },
/* 0A /qm */ { 0, &BX_CPU_C::OR_GbEbM },
/* 0B /qm */ { 0, &BX_CPU_C::OR_GqEqM },
/* 0C /qm */ { BxImmediate_Ib, &BX_CPU_C::OR_ALIb },
/* 0D /qm */ { BxImmediate_Iv, &BX_CPU_C::OR_RAXId },
/* 0E /qm */ { 0, &BX_CPU_C::BxError },
/* 0F /qm */ { 0, &BX_CPU_C::BxError }, // 2-byte escape
/* 10 /qm */ { BxLockable, &BX_CPU_C::ADC_EbGbM },
/* 11 /qm */ { BxLockable, &BX_CPU_C::ADC_EqGqM },
/* 12 /qm */ { 0, &BX_CPU_C::ADC_GbEb },
/* 13 /qm */ { 0, &BX_CPU_C::ADC_GqEq },
/* 12 /qm */ { 0, &BX_CPU_C::ADC_GbEbM },
/* 13 /qm */ { 0, &BX_CPU_C::ADC_GqEqM },
/* 14 /qm */ { BxImmediate_Ib, &BX_CPU_C::ADC_ALIb },
/* 15 /qm */ { BxImmediate_Iv, &BX_CPU_C::ADC_RAXId },
/* 16 /qm */ { 0, &BX_CPU_C::BxError },
/* 17 /qm */ { 0, &BX_CPU_C::BxError },
/* 18 /qm */ { BxLockable, &BX_CPU_C::SBB_EbGbM },
/* 19 /qm */ { BxLockable, &BX_CPU_C::SBB_EqGqM },
/* 1A /qm */ { 0, &BX_CPU_C::SBB_GbEb },
/* 1B /qm */ { 0, &BX_CPU_C::SBB_GqEq },
/* 1A /qm */ { 0, &BX_CPU_C::SBB_GbEbM },
/* 1B /qm */ { 0, &BX_CPU_C::SBB_GqEqM },
/* 1C /qm */ { BxImmediate_Ib, &BX_CPU_C::SBB_ALIb },
/* 1D /qm */ { BxImmediate_Iv, &BX_CPU_C::SBB_RAXId },
/* 1E /qm */ { 0, &BX_CPU_C::BxError },
/* 1F /qm */ { 0, &BX_CPU_C::BxError },
/* 20 /qm */ { BxLockable, &BX_CPU_C::AND_EbGbM },
/* 21 /qm */ { BxLockable, &BX_CPU_C::AND_EqGqM },
/* 22 /qm */ { 0, &BX_CPU_C::AND_GbEb },
/* 23 /qm */ { 0, &BX_CPU_C::AND_GqEq },
/* 22 /qm */ { 0, &BX_CPU_C::AND_GbEbM },
/* 23 /qm */ { 0, &BX_CPU_C::AND_GqEqM },
/* 24 /qm */ { BxImmediate_Ib, &BX_CPU_C::AND_ALIb },
/* 25 /qm */ { BxImmediate_Iv, &BX_CPU_C::AND_RAXId },
/* 26 /qm */ { BxPrefix, &BX_CPU_C::BxError }, // ES:
/* 27 /qm */ { 0, &BX_CPU_C::BxError },
/* 28 /qm */ { BxLockable, &BX_CPU_C::SUB_EbGbM },
/* 29 /qm */ { BxLockable, &BX_CPU_C::SUB_EqGqM },
/* 2A /qm */ { 0, &BX_CPU_C::SUB_GbEb },
/* 2B /qm */ { 0, &BX_CPU_C::SUB_GqEq },
/* 2A /qm */ { 0, &BX_CPU_C::SUB_GbEbM },
/* 2B /qm */ { 0, &BX_CPU_C::SUB_GqEqM },
/* 2C /qm */ { BxImmediate_Ib, &BX_CPU_C::SUB_ALIb },
/* 2D /qm */ { BxImmediate_Iv, &BX_CPU_C::SUB_RAXId },
/* 2E /qm */ { BxPrefix, &BX_CPU_C::BxError }, // CS:
/* 2F /qm */ { 0, &BX_CPU_C::BxError },
/* 30 /qm */ { BxLockable, &BX_CPU_C::XOR_EbGbM },
/* 31 /qm */ { BxLockable, &BX_CPU_C::XOR_EqGqM },
/* 32 /qm */ { 0, &BX_CPU_C::XOR_GbEb },
/* 33 /qm */ { 0, &BX_CPU_C::XOR_GqEq },
/* 32 /qm */ { 0, &BX_CPU_C::XOR_GbEbM },
/* 33 /qm */ { 0, &BX_CPU_C::XOR_GqEqM },
/* 34 /qm */ { BxImmediate_Ib, &BX_CPU_C::XOR_ALIb },
/* 35 /qm */ { BxImmediate_Iv, &BX_CPU_C::XOR_RAXId },
/* 36 /qm */ { BxPrefix, &BX_CPU_C::BxError }, // SS:
/* 37 /qm */ { 0, &BX_CPU_C::BxError },
/* 38 /qm */ { 0, &BX_CPU_C::CMP_EbGbM },
/* 39 /qm */ { 0, &BX_CPU_C::CMP_EqGqM },
/* 3A /qm */ { 0, &BX_CPU_C::CMP_GbEb },
/* 3B /qm */ { 0, &BX_CPU_C::CMP_GqEq },
/* 3A /qm */ { 0, &BX_CPU_C::CMP_GbEbM },
/* 3B /qm */ { 0, &BX_CPU_C::CMP_GqEqM },
/* 3C /qm */ { BxImmediate_Ib, &BX_CPU_C::CMP_ALIb },
/* 3D /qm */ { BxImmediate_Iv, &BX_CPU_C::CMP_RAXId },
/* 3E /qm */ { BxPrefix, &BX_CPU_C::BxError }, // DS:

68
bochs/cpu/logical16.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: logical16.cc,v 1.34 2007-11-20 17:15:33 sshwarts Exp $
// $Id: logical16.cc,v 1.35 2007-11-21 22:36:01 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -52,21 +52,25 @@ void BX_CPU_C::XOR_EwGwR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
}
void BX_CPU_C::XOR_GwEw(bxInstruction_c *i)
void BX_CPU_C::XOR_GwEwM(bxInstruction_c *i)
{
Bit16u op1_16, op2_16;
op1_16 = BX_READ_16BIT_REG(i->nnn());
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
}
else {
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
}
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
op1_16 ^= op2_16;
BX_WRITE_16BIT_REG(i->nnn(), op1_16);
SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
}
void BX_CPU_C::XOR_GwEwR(bxInstruction_c *i)
{
Bit16u op1_16, op2_16;
op1_16 = BX_READ_16BIT_REG(i->nnn());
op2_16 = BX_READ_16BIT_REG(i->rm());
op1_16 ^= op2_16;
BX_WRITE_16BIT_REG(i->nnn(), op1_16);
SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
@ -163,21 +167,25 @@ void BX_CPU_C::OR_EwGwR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
}
void BX_CPU_C::OR_GwEw(bxInstruction_c *i)
void BX_CPU_C::OR_GwEwM(bxInstruction_c *i)
{
Bit16u op1_16, op2_16;
op1_16 = BX_READ_16BIT_REG(i->nnn());
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
}
else {
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
}
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
op1_16 |= op2_16;
BX_WRITE_16BIT_REG(i->nnn(), op1_16);
SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
}
void BX_CPU_C::OR_GwEwR(bxInstruction_c *i)
{
Bit16u op1_16, op2_16;
op1_16 = BX_READ_16BIT_REG(i->nnn());
op2_16 = BX_READ_16BIT_REG(i->rm());
op1_16 |= op2_16;
BX_WRITE_16BIT_REG(i->nnn(), op1_16);
SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
@ -219,21 +227,25 @@ void BX_CPU_C::AND_EwGwR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
}
void BX_CPU_C::AND_GwEw(bxInstruction_c *i)
void BX_CPU_C::AND_GwEwM(bxInstruction_c *i)
{
Bit16u op1_16, op2_16;
op1_16 = BX_READ_16BIT_REG(i->nnn());
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
}
else {
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
}
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
op1_16 &= op2_16;
BX_WRITE_16BIT_REG(i->nnn(), op1_16);
SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
}
void BX_CPU_C::AND_GwEwR(bxInstruction_c *i)
{
Bit16u op1_16, op2_16;
op1_16 = BX_READ_16BIT_REG(i->nnn());
op2_16 = BX_READ_16BIT_REG(i->rm());
op1_16 &= op2_16;
BX_WRITE_16BIT_REG(i->nnn(), op1_16);
SET_FLAGS_OSZAPC_LOGIC_16(op1_16);

68
bochs/cpu/logical32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: logical32.cc,v 1.35 2007-11-20 17:15:33 sshwarts Exp $
// $Id: logical32.cc,v 1.36 2007-11-21 22:36:01 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -59,21 +59,25 @@ void BX_CPU_C::XOR_EdGdR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
}
void BX_CPU_C::XOR_GdEd(bxInstruction_c *i)
void BX_CPU_C::XOR_GdEdM(bxInstruction_c *i)
{
Bit32u op1_32, op2_32;
op1_32 = BX_READ_32BIT_REG(i->nnn());
if (i->modC0()) {
op2_32 = BX_READ_32BIT_REG(i->rm());
}
else {
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
}
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
op1_32 ^= op2_32;
BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
}
void BX_CPU_C::XOR_GdEdR(bxInstruction_c *i)
{
Bit32u op1_32, op2_32;
op1_32 = BX_READ_32BIT_REG(i->nnn());
op2_32 = BX_READ_32BIT_REG(i->rm());
op1_32 ^= op2_32;
BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
@ -170,21 +174,25 @@ void BX_CPU_C::OR_EdGdR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
}
void BX_CPU_C::OR_GdEd(bxInstruction_c *i)
void BX_CPU_C::OR_GdEdM(bxInstruction_c *i)
{
Bit32u op1_32, op2_32;
op1_32 = BX_READ_32BIT_REG(i->nnn());
if (i->modC0()) {
op2_32 = BX_READ_32BIT_REG(i->rm());
}
else {
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
}
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
op1_32 |= op2_32;
BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
}
void BX_CPU_C::OR_GdEdR(bxInstruction_c *i)
{
Bit32u op1_32, op2_32;
op1_32 = BX_READ_32BIT_REG(i->nnn());
op2_32 = BX_READ_32BIT_REG(i->rm());
op1_32 |= op2_32;
BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
@ -226,21 +234,25 @@ void BX_CPU_C::AND_EdGdR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
}
void BX_CPU_C::AND_GdEd(bxInstruction_c *i)
void BX_CPU_C::AND_GdEdM(bxInstruction_c *i)
{
Bit32u op1_32, op2_32;
op1_32 = BX_READ_32BIT_REG(i->nnn());
if (i->modC0()) {
op2_32 = BX_READ_32BIT_REG(i->rm());
}
else {
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
}
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
op1_32 &= op2_32;
BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
}
void BX_CPU_C::AND_GdEdR(bxInstruction_c *i)
{
Bit32u op1_32, op2_32;
op1_32 = BX_READ_32BIT_REG(i->nnn());
op2_32 = BX_READ_32BIT_REG(i->rm());
op1_32 &= op2_32;
BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
SET_FLAGS_OSZAPC_LOGIC_32(op1_32);

71
bochs/cpu/logical64.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: logical64.cc,v 1.23 2007-11-20 17:15:33 sshwarts Exp $
// $Id: logical64.cc,v 1.24 2007-11-21 22:36:02 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -57,21 +57,26 @@ void BX_CPU_C::XOR_EqGqR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
}
void BX_CPU_C::XOR_GqEq(bxInstruction_c *i)
void BX_CPU_C::XOR_GqEqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
op1_64 ^= op2_64;
/* op2_64 is a register or memory reference */
if (i->modC0()) {
op2_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
}
/* now write result back to destination */
BX_WRITE_64BIT_REG(i->nnn(), op1_64);
SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
}
void BX_CPU_C::XOR_GqEqR(bxInstruction_c *i)
{
Bit64u op1_64, op2_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
op2_64 = BX_READ_64BIT_REG(i->rm());
op1_64 ^= op2_64;
/* now write result back to destination */
@ -181,21 +186,26 @@ void BX_CPU_C::OR_EqGqR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
}
void BX_CPU_C::OR_GqEq(bxInstruction_c *i)
void BX_CPU_C::OR_GqEqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
op1_64 |= op2_64;
/* op2_64 is a register or memory reference */
if (i->modC0()) {
op2_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
}
/* now write result back to destination */
BX_WRITE_64BIT_REG(i->nnn(), op1_64);
SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
}
void BX_CPU_C::OR_GqEqR(bxInstruction_c *i)
{
Bit64u op1_64, op2_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
op2_64 = BX_READ_64BIT_REG(i->rm());
op1_64 |= op2_64;
/* now write result back to destination */
@ -242,21 +252,26 @@ void BX_CPU_C::AND_EqGqR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
}
void BX_CPU_C::AND_GqEq(bxInstruction_c *i)
void BX_CPU_C::AND_GqEqM(bxInstruction_c *i)
{
Bit64u op1_64, op2_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
op1_64 &= op2_64;
/* op2_64 is a register or memory reference */
if (i->modC0()) {
op2_64 = BX_READ_64BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
}
/* now write result back to destination */
BX_WRITE_64BIT_REG(i->nnn(), op1_64);
SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
}
void BX_CPU_C::AND_GqEqR(bxInstruction_c *i)
{
Bit64u op1_64, op2_64;
op1_64 = BX_READ_64BIT_REG(i->nnn());
op2_64 = BX_READ_64BIT_REG(i->rm());
op1_64 &= op2_64;
/* now write result back to destination */

68
bochs/cpu/logical8.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: logical8.cc,v 1.34 2007-11-20 17:15:33 sshwarts Exp $
// $Id: logical8.cc,v 1.35 2007-11-21 22:36:02 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -56,21 +56,25 @@ void BX_CPU_C::XOR_EbGbR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_LOGIC_8(op1);
}
void BX_CPU_C::XOR_GbEb(bxInstruction_c *i)
void BX_CPU_C::XOR_GbEbM(bxInstruction_c *i)
{
Bit8u op1, op2;
op1 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
if (i->modC0()) {
op2 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
}
else {
read_virtual_byte(i->seg(), RMAddr(i), &op2);
}
read_virtual_byte(i->seg(), RMAddr(i), &op2);
op1 ^= op2;
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), op1);
SET_FLAGS_OSZAPC_LOGIC_8(op1);
}
void BX_CPU_C::XOR_GbEbR(bxInstruction_c *i)
{
Bit8u op1, op2;
op1 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
op2 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
op1 ^= op2;
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), op1);
SET_FLAGS_OSZAPC_LOGIC_8(op1);
@ -171,21 +175,25 @@ void BX_CPU_C::OR_EbGbR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_LOGIC_8(op1);
}
void BX_CPU_C::OR_GbEb(bxInstruction_c *i)
void BX_CPU_C::OR_GbEbM(bxInstruction_c *i)
{
Bit8u op1, op2;
op1 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
if (i->modC0()) {
op2 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
}
else {
read_virtual_byte(i->seg(), RMAddr(i), &op2);
}
read_virtual_byte(i->seg(), RMAddr(i), &op2);
op1 |= op2;
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), op1);
SET_FLAGS_OSZAPC_LOGIC_8(op1);
}
void BX_CPU_C::OR_GbEbR(bxInstruction_c *i)
{
Bit8u op1, op2;
op1 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
op2 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
op1 |= op2;
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), op1);
SET_FLAGS_OSZAPC_LOGIC_8(op1);
@ -227,21 +235,25 @@ void BX_CPU_C::AND_EbGbR(bxInstruction_c *i)
SET_FLAGS_OSZAPC_LOGIC_8(op1);
}
void BX_CPU_C::AND_GbEb(bxInstruction_c *i)
void BX_CPU_C::AND_GbEbM(bxInstruction_c *i)
{
Bit8u op1, op2;
op1 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
if (i->modC0()) {
op2 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
}
else {
read_virtual_byte(i->seg(), RMAddr(i), &op2);
}
read_virtual_byte(i->seg(), RMAddr(i), &op2);
op1 &= op2;
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), op1);
SET_FLAGS_OSZAPC_LOGIC_8(op1);
}
void BX_CPU_C::AND_GbEbR(bxInstruction_c *i)
{
Bit8u op1, op2;
op1 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
op2 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
op1 &= op2;
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), op1);
SET_FLAGS_OSZAPC_LOGIC_8(op1);