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implement prefetch hint opcodes

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This commit is contained in:
Stanislav Shwartsman 2007-08-23 16:47:51 +00:00
parent 8f00ef6907
commit b64fc08c54
5 changed files with 1304 additions and 1325 deletions
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18
bochs/cpu/fetchdecode.cc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: fetchdecode.cc,v 1.107 2007-08-18 13:51:15 sshwarts Exp $
// $Id: fetchdecode.cc,v 1.108 2007-08-23 16:47:51 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -400,18 +400,6 @@ static const BxOpcodeInfo_t BxOpcodeInfoG15[8] = {
/* 7 */ { 0, &BX_CPU_C::CLFLUSH } /* SFENCE/CFLUSH */
};
static const BxOpcodeInfo_t BxOpcodeInfoG16[8] = {
/* 0 */ { 0, &BX_CPU_C::PREFETCH }, /* PREFETCH_NTA */
/* 1 */ { 0, &BX_CPU_C::PREFETCH }, /* PREFETCH_T0 */
/* 2 */ { 0, &BX_CPU_C::PREFETCH }, /* PREFETCH_T1 */
/* 3 */ { 0, &BX_CPU_C::PREFETCH }, /* PREFETCH_T2 */
/* 4 */ { 0, &BX_CPU_C::BxError },
/* 5 */ { 0, &BX_CPU_C::BxError },
/* 6 */ { 0, &BX_CPU_C::BxError },
/* 7 */ { 0, &BX_CPU_C::BxError }
};
/* ************************** */
/* 512 entries for 16bit mode */
/* 512 entries for 32bit mode */
@ -731,7 +719,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
/* 0F 15 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f15 },
/* 0F 16 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f16 },
/* 0F 17 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f17 },
/* 0F 18 */ { BxAnother | BxGroup16, NULL, BxOpcodeInfoG16 },
/* 0F 18 */ { BxAnother, &BX_CPU_C::PREFETCH }, // opcode group G16, PREFETCH hints
/* 0F 19 */ { 0, &BX_CPU_C::BxError },
/* 0F 1A */ { 0, &BX_CPU_C::BxError },
/* 0F 1B */ { 0, &BX_CPU_C::BxError },
@ -1289,7 +1277,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
/* 0F 15 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f15 },
/* 0F 16 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f16 },
/* 0F 17 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f17 },
/* 0F 18 */ { BxAnother | BxGroup16, NULL, BxOpcodeInfoG16 },
/* 0F 18 */ { BxAnother, &BX_CPU_C::PREFETCH }, // opcode group G16, PREFETCH hints
/* 0F 19 */ { 0, &BX_CPU_C::BxError },
/* 0F 1A */ { 0, &BX_CPU_C::BxError },
/* 0F 1B */ { 0, &BX_CPU_C::BxError },

19
bochs/cpu/fetchdecode64.cc
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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: fetchdecode64.cc,v 1.112 2007-08-18 13:51:16 sshwarts Exp $
// $Id: fetchdecode64.cc,v 1.113 2007-08-23 16:47:51 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -550,17 +550,6 @@ static const BxOpcodeInfo_t BxOpcodeInfo64G15[8] = {
/* 7 */ { 0, &BX_CPU_C::CLFLUSH } /* SFENCE/CFLUSH */
};
static const BxOpcodeInfo_t BxOpcodeInfo64G16[8] = {
/* 0 */ { 0, &BX_CPU_C::PREFETCH }, /* PREFETCH_NTA */
/* 1 */ { 0, &BX_CPU_C::PREFETCH }, /* PREFETCH_T0 */
/* 2 */ { 0, &BX_CPU_C::PREFETCH }, /* PREFETCH_T1 */
/* 3 */ { 0, &BX_CPU_C::PREFETCH }, /* PREFETCH_T2 */
/* 4 */ { 0, &BX_CPU_C::BxError },
/* 5 */ { 0, &BX_CPU_C::BxError },
/* 6 */ { 0, &BX_CPU_C::BxError },
/* 7 */ { 0, &BX_CPU_C::BxError }
};
// 512 entries for 16bit operand size
// 512 entries for 32bit operand size
// 512 entries for 64bit operand size
@ -854,7 +843,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3] = {
/* 0F 15 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f15 },
/* 0F 16 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f16 },
/* 0F 17 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f17 },
/* 0F 18 */ { BxAnother | BxGroup16, NULL, BxOpcodeInfo64G16 },
/* 0F 18 */ { BxAnother, &BX_CPU_C::PREFETCH }, // opcode group G16, PREFETCH hints
/* 0F 19 */ { 0, &BX_CPU_C::BxError },
/* 0F 1A */ { 0, &BX_CPU_C::BxError },
/* 0F 1B */ { 0, &BX_CPU_C::BxError },
@ -1383,7 +1372,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3] = {
/* 0F 15 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f15 },
/* 0F 16 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f16 },
/* 0F 17 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f17 },
/* 0F 18 */ { BxAnother | BxGroup16, NULL, BxOpcodeInfo64G16 },
/* 0F 18 */ { BxAnother, &BX_CPU_C::PREFETCH }, // opcode group G16, PREFETCH hints
/* 0F 19 */ { 0, &BX_CPU_C::BxError },
/* 0F 1A */ { 0, &BX_CPU_C::BxError },
/* 0F 1B */ { 0, &BX_CPU_C::BxError },
@ -1912,7 +1901,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3] = {
/* 0F 15 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f15 },
/* 0F 16 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f16 },
/* 0F 17 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f17 },
/* 0F 18 */ { BxAnother | BxGroup16, NULL, BxOpcodeInfo64G16 },
/* 0F 18 */ { BxAnother, &BX_CPU_C::PREFETCH }, // opcode group G16, PREFETCH hints
/* 0F 19 */ { 0, &BX_CPU_C::BxError },
/* 0F 1A */ { 0, &BX_CPU_C::BxError },
/* 0F 1B */ { 0, &BX_CPU_C::BxError },

8
bochs/disasm/dis_tables.inc
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@ -1897,10 +1897,10 @@ static BxDisasmOpcodeTable_t BxDisasmGroupG16[8] =
/* 1 */ { 0, &Ia_prefetcht0 },
/* 2 */ { 0, &Ia_prefetcht1 },
/* 3 */ { 0, &Ia_prefetcht2 },
/* 4 */ { 0, &Ia_Invalid },
/* 5 */ { 0, &Ia_Invalid },
/* 6 */ { 0, &Ia_Invalid },
/* 7 */ { 0, &Ia_Invalid }
/* 4 */ { 0, &Ia_prefetch_hint },
/* 5 */ { 0, &Ia_prefetch_hint },
/* 6 */ { 0, &Ia_prefetch_hint },
/* 7 */ { 0, &Ia_prefetch_hint }
};
/* ************************************************************************ */

1
bochs/disasm/disasm.h
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@ -37,6 +37,7 @@
#define IA_SYSCALL_SYSRET 0x00020000 /* SYSCALL/SYSRET instruction */
#define IA_SYSENTER_SYSEXIT 0x00040000 /* SYSENTER/SYSEXIT instruction */
#define IA_VMX 0x00080000 /* VMX instruction */
#define IA_UNDOCUMENTED 0x80000000 /* instruction undocumented */
/* general purpose bit register */
enum {

2583
bochs/disasm/opcodes.inc
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