Stanislav Shwartsman
d36e6d78e7
typo fix
2010-03-02 06:49:41 +00:00
Stanislav Shwartsman
01cfbdccbc
Move MMX to be runtime option
2010-03-01 18:53:53 +00:00
Stanislav Shwartsman
927c3594d6
enable compilation with CPU_LEVEL <= 6
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converted SEP to runtime option as well
2010-02-26 11:44:50 +00:00
Stanislav Shwartsman
033a20b3b2
allow to configure CPU features at runtime - implemened on example of SSE/AES/MOVBE/POPCNT
2010-02-25 22:04:31 +00:00
Stanislav Shwartsman
70dc124b3a
1st step of moving CPU options to runtime
2010-02-24 19:27:51 +00:00
Stanislav Shwartsman
5f89b554aa
split few more opcodes
2010-02-10 17:21:15 +00:00
Stanislav Shwartsman
edaf19f0a1
Split MOVQ_PqQq opcode
2009-12-14 11:55:42 +00:00
Stanislav Shwartsman
67e4f97e73
make maskmov fault order like in real HWQ
2009-11-13 09:55:22 +00:00
Stanislav Shwartsman
78e4b3d616
split SSE move instructions
2009-10-24 11:17:51 +00:00
Stanislav Shwartsman
7254ea36a1
copyright fixes + small optimization
2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
f1eb1d00fd
do not produce fpu2mmx transition if mem write faults
2009-02-13 10:15:16 +00:00
Stanislav Shwartsman
9929e6ed78
- updated FSF address
2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
ab716f62aa
inline prepareMMX method
2008-10-08 11:14:35 +00:00
Stanislav Shwartsman
489447ae57
Fixed FPU2MMX state transition - should be done only fater all memory faults already checked
2008-10-08 10:51:38 +00:00
Stanislav Shwartsman
5dd02b26e3
Make even more efficient RmAddr calculation - good optimizing compiler could make more efficient code than it was before
2008-08-08 09:22:49 +00:00
Stanislav Shwartsman
709d74728d
Call #UD exception directly instead of UndefinedOpcode function - for future use
2008-07-13 15:35:10 +00:00
Stanislav Shwartsman
ec1ff39a5f
Splitted memory access methods for 32 and 64-bit code.
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The 64-bit code got >10% speedup, the 32-bit code also got about 2% because laddr cacluation optimization
2008-05-10 18:10:53 +00:00
Stanislav Shwartsman
b3167d1a8f
Docs for MASKMOVQ were also not correct :(
2008-04-16 05:45:45 +00:00
Stanislav Shwartsman
4f3f8608f7
Fixed MASKMOVDQU instruction decoding
2008-04-16 05:41:43 +00:00
Stanislav Shwartsman
420f30816d
inline integer saturation code - speedup for MMX/SSE integer
2008-04-06 13:56:22 +00:00
Stanislav Shwartsman
167c7075fb
Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code
2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
457152334e
step2 in XSAVE implementation
2008-02-13 16:45:21 +00:00
Stanislav Shwartsman
a2897933a3
white space cleanup
2008-02-02 21:46:54 +00:00
Stanislav Shwartsman
37fbb82baa
Cleanups. Move bxInstruction_c definition to separate file instr.h
2008-01-29 17:13:10 +00:00
Stanislav Shwartsman
d9984bb3a1
Eliminate BxResolve call from the heart of cpu loop and move into instructions that really require this calculation. Yes, it blows the code of EVERY CPU method but it has >15% speedup !
2008-01-10 19:37:56 +00:00
Stanislav Shwartsman
79fc57dec8
Fixed more VCPP2008 warnings
2007-12-26 23:07:44 +00:00
Stanislav Shwartsman
838fb2a048
Fixing V2008 warnings - they found a bug in sse_pfp.cc !
2007-12-23 17:21:28 +00:00
Stanislav Shwartsman
5d4e32b8da
Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads
2007-12-20 20:58:38 +00:00
Stanislav Shwartsman
b516589e4e
Changes in write_virtual_* and pop_* functions -> avoid moving parameteres by pointer
2007-12-20 18:29:42 +00:00
Stanislav Shwartsman
6ac7fa7106
MMX - modify masked write to RMW - faster execution
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CMPXCHG8B/16B - fixed possible problem. Instruction not allowed to fault after some part of it written to the memory
2007-12-19 23:21:11 +00:00
Stanislav Shwartsman
c9932e97eb
Fixes in resolve.cc -> reduce amount of resolve functions even more
2007-12-18 21:41:44 +00:00
Stanislav Shwartsman
8cfd17202a
some simple SSE code optimizations
2007-11-27 22:12:45 +00:00
Stanislav Shwartsman
d9e58bd598
split11b on opcode tables level - split almost eevery splittable instruction
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will be continued
2007-11-17 12:44:10 +00:00
Stanislav Shwartsman
f6ed95785f
added cpu state param - for future use and for dbg info
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started to move debugger to info bx_param interface -> info sse and info mmx commands modified
2007-10-11 18:12:00 +00:00
Stanislav Shwartsman
38d1f39c77
Converted CR0 bits to one register similar to CR4 - a bit slower but helps with other features implemntation
2007-07-09 15:16:14 +00:00
Stanislav Shwartsman
5189cfbf10
SSE4 support
2007-04-19 16:12:21 +00:00
Stanislav Shwartsman
26f08fdb2c
Change my e-mail to #SF one
2007-03-23 21:27:13 +00:00
Stanislav Shwartsman
c24627c00f
Implemented CLFLUSH instruction
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Set of minor fixes for correctness
2007-01-28 21:27:31 +00:00
Stanislav Shwartsman
8221fa6838
- Fixed zero upper 32-bit part of GPR in x86-64 mode
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- CMOV_GdEd should zero upper 32-bit part of GPR register even if the
'cmov' condition was false !
2007-01-26 22:12:05 +00:00
Stanislav Shwartsman
acd1a05f6f
Fixed bugs for SSE3E execution and decoding
2007-01-25 21:44:35 +00:00
Stanislav Shwartsman
f8003098b1
Rename SSE4 to SSE3E to match intel docs. SSE4 coming later ;)
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Fixed "last prefix" for REX in 64-bit mode
2007-01-25 19:09:41 +00:00
Stanislav Shwartsman
16713b309d
PALIGNR fixed
2006-05-16 16:20:26 +00:00
Stanislav Shwartsman
03eac64013
Added decoding of new SSE4 instructions (recently published in Intel docs)
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At least CPUID detects them correctly
The code is never tested (still) ! (but should work fine)
2006-04-06 18:30:05 +00:00
Stanislav Shwartsman
7b6c2587a9
Now devices could be compiled separatelly from CPU
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Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
0150904e9d
Improve debug messages and optimize
2006-02-22 20:58:16 +00:00
Stanislav Shwartsman
5c58b22f44
Fixed opcode names according to Intel docs
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Fixed bug found during disasm validation
2006-02-17 13:34:31 +00:00
Stanislav Shwartsman
d1c722211e
Fix duplicate opcodes, fix opcode names and disasm bugs
2005-09-23 16:45:41 +00:00
Stanislav Shwartsman
3d9ee328fb
PMOVMSKB and PEXTRW instruction should zero-extend dest when in 64-bit mode
2005-09-12 18:08:35 +00:00
Stanislav Shwartsman
80c895498e
Fixed comments for code
2005-08-10 18:40:38 +00:00
Stanislav Shwartsman
a66b45e024
Fixed bug for masked writes in 64-bit mode
2005-08-10 18:34:00 +00:00
