split few more opcodes
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.637 2010-02-09 19:44:25 sshwarts Exp $
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// $Id: cpu.h,v 1.638 2010-02-10 17:21:14 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2009 The Bochs Project
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@ -1850,15 +1850,18 @@ public: // for now...
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BX_SMF void PUNPCKHWD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void PUNPCKHDQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void PACKSSDW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVD_PqEd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVD_PqEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVD_PqEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVQ_PqQqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVQ_PqQqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void PCMPEQB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void PCMPEQW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void PCMPEQD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void EMMS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVD_EdPd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVQ_QqPq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVD_EdPdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVD_EdPdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVQ_QqPqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVQ_QqPqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void PSRLW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void PSRLD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void PSRLQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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@ -2720,7 +2723,7 @@ public: // for now...
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BX_SMF void LOOP64_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void JRCXZ_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVQ_EqPq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVQ_EqPqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVQ_EqVqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVQ_PqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVQ_VdqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode.cc,v 1.250 2010-02-09 19:44:25 sshwarts Exp $
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// $Id: fetchdecode.cc,v 1.251 2010-02-10 17:21:14 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2009 The Bochs Project
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@ -595,7 +595,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
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/* 0F 6B /wr */ { BxPrefixSSE, BX_IA_PACKSSDW_PqQq, BxOpcodeGroupSSE_0f6b },
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/* 0F 6C /wr */ { BxPrefixSSE66, BX_IA_PUNPCKLQDQ_VdqWdq },
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/* 0F 6D /wr */ { BxPrefixSSE66, BX_IA_PUNPCKHQDQ_VdqWdq },
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/* 0F 6E /wr */ { BxPrefixSSE, BX_IA_MOVD_PqEd, BxOpcodeGroupSSE_0f6eR },
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/* 0F 6E /wr */ { BxPrefixSSE, BX_IA_MOVD_PqEdR, BxOpcodeGroupSSE_0f6eR },
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/* 0F 6F /wr */ { BxPrefixSSE, BX_IA_MOVQ_PqQqR, BxOpcodeGroupSSE_0f6fR },
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/* 0F 70 /wr */ { BxPrefixSSE | BxImmediate_Ib, BX_IA_PSHUFW_PqQqIb, BxOpcodeGroupSSE_0f70 },
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/* 0F 71 /wr */ { BxGroup12, BX_IA_ERROR, BxOpcodeInfoG12R },
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@ -611,8 +611,8 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
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/* 0F 7B /wr */ { 0, BX_IA_ERROR },
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/* 0F 7C /wr */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7c },
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/* 0F 7D /wr */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7d },
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/* 0F 7E /wr */ { BxPrefixSSE, BX_IA_MOVD_EdPd, BxOpcodeGroupSSE_0f7eR },
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/* 0F 7F /wr */ { BxPrefixSSE, BX_IA_MOVQ_QqPq, BxOpcodeGroupSSE_0f7fR },
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/* 0F 7E /wr */ { BxPrefixSSE, BX_IA_MOVD_EdPdR, BxOpcodeGroupSSE_0f7eR },
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/* 0F 7F /wr */ { BxPrefixSSE, BX_IA_MOVQ_QqPqR, BxOpcodeGroupSSE_0f7fR },
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/* 0F 80 /wr */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JO_Jw },
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/* 0F 81 /wr */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JNO_Jw },
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/* 0F 82 /wr */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JB_Jw },
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@ -1158,7 +1158,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
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/* 0F 6B /dr */ { BxPrefixSSE, BX_IA_PACKSSDW_PqQq, BxOpcodeGroupSSE_0f6b },
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/* 0F 6C /dr */ { BxPrefixSSE66, BX_IA_PUNPCKLQDQ_VdqWdq },
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/* 0F 6D /dr */ { BxPrefixSSE66, BX_IA_PUNPCKHQDQ_VdqWdq },
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/* 0F 6E /dr */ { BxPrefixSSE, BX_IA_MOVD_PqEd, BxOpcodeGroupSSE_0f6eR },
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/* 0F 6E /dr */ { BxPrefixSSE, BX_IA_MOVD_PqEdR, BxOpcodeGroupSSE_0f6eR },
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/* 0F 6F /dr */ { BxPrefixSSE, BX_IA_MOVQ_PqQqR, BxOpcodeGroupSSE_0f6fR },
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/* 0F 70 /dr */ { BxPrefixSSE | BxImmediate_Ib, BX_IA_PSHUFW_PqQqIb, BxOpcodeGroupSSE_0f70 },
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/* 0F 71 /dr */ { BxGroup12, BX_IA_ERROR, BxOpcodeInfoG12R },
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@ -1174,8 +1174,8 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
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/* 0F 7B /dr */ { 0, BX_IA_ERROR },
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/* 0F 7C /dr */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7c },
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/* 0F 7D /dr */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7d },
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/* 0F 7E /dr */ { BxPrefixSSE, BX_IA_MOVD_EdPd, BxOpcodeGroupSSE_0f7eR },
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/* 0F 7F /dr */ { BxPrefixSSE, BX_IA_MOVQ_QqPq, BxOpcodeGroupSSE_0f7fR },
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/* 0F 7E /dr */ { BxPrefixSSE, BX_IA_MOVD_EdPdR, BxOpcodeGroupSSE_0f7eR },
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/* 0F 7F /dr */ { BxPrefixSSE, BX_IA_MOVQ_QqPqR, BxOpcodeGroupSSE_0f7fR },
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/* 0F 80 /dr */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JO_Jd },
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/* 0F 81 /dr */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNO_Jd },
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/* 0F 82 /dr */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JB_Jd },
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@ -1728,7 +1728,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32M[512*2] = {
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/* 0F 6B /wm */ { BxPrefixSSE, BX_IA_PACKSSDW_PqQq, BxOpcodeGroupSSE_0f6b },
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/* 0F 6C /wm */ { BxPrefixSSE66, BX_IA_PUNPCKLQDQ_VdqWdq },
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/* 0F 6D /wm */ { BxPrefixSSE66, BX_IA_PUNPCKHQDQ_VdqWdq },
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/* 0F 6E /wm */ { BxPrefixSSE, BX_IA_MOVD_PqEd, BxOpcodeGroupSSE_0f6eM },
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/* 0F 6E /wm */ { BxPrefixSSE, BX_IA_MOVD_PqEdM, BxOpcodeGroupSSE_0f6eM },
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/* 0F 6F /wm */ { BxPrefixSSE, BX_IA_MOVQ_PqQqM, BxOpcodeGroupSSE_0f6fM },
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/* 0F 70 /wm */ { BxPrefixSSE | BxImmediate_Ib, BX_IA_PSHUFW_PqQqIb, BxOpcodeGroupSSE_0f70 },
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/* 0F 71 /wm */ { 0, BX_IA_ERROR }, // SSE Group G12
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@ -1744,8 +1744,8 @@ static const BxOpcodeInfo_t BxOpcodeInfo32M[512*2] = {
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/* 0F 7B /wm */ { 0, BX_IA_ERROR },
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/* 0F 7C /wm */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7c },
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/* 0F 7D /wm */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7d },
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/* 0F 7E /wm */ { BxPrefixSSE, BX_IA_MOVD_EdPd, BxOpcodeGroupSSE_0f7eM },
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/* 0F 7F /wm */ { BxPrefixSSE, BX_IA_MOVQ_QqPq, BxOpcodeGroupSSE_0f7fM },
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/* 0F 7E /wm */ { BxPrefixSSE, BX_IA_MOVD_EdPdM, BxOpcodeGroupSSE_0f7eM },
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/* 0F 7F /wm */ { BxPrefixSSE, BX_IA_MOVQ_QqPqM, BxOpcodeGroupSSE_0f7fM },
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/* 0F 80 /wm */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JO_Jw },
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/* 0F 81 /wm */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JNO_Jw },
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/* 0F 82 /wm */ { BxImmediate_BrOff16 | BxTraceJCC, BX_IA_JB_Jw },
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@ -2291,7 +2291,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo32M[512*2] = {
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/* 0F 6B /dm */ { BxPrefixSSE, BX_IA_PACKSSDW_PqQq, BxOpcodeGroupSSE_0f6b },
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/* 0F 6C /dm */ { BxPrefixSSE66, BX_IA_PUNPCKLQDQ_VdqWdq },
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/* 0F 6D /dm */ { BxPrefixSSE66, BX_IA_PUNPCKHQDQ_VdqWdq },
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/* 0F 6E /dm */ { BxPrefixSSE, BX_IA_MOVD_PqEd, BxOpcodeGroupSSE_0f6eM },
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/* 0F 6E /dm */ { BxPrefixSSE, BX_IA_MOVD_PqEdM, BxOpcodeGroupSSE_0f6eM },
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/* 0F 6F /dm */ { BxPrefixSSE, BX_IA_MOVQ_PqQqM, BxOpcodeGroupSSE_0f6fM },
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/* 0F 70 /dm */ { BxPrefixSSE | BxImmediate_Ib, BX_IA_PSHUFW_PqQqIb, BxOpcodeGroupSSE_0f70 },
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/* 0F 71 /dm */ { 0, BX_IA_ERROR }, // SSE Group G12
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@ -2307,8 +2307,8 @@ static const BxOpcodeInfo_t BxOpcodeInfo32M[512*2] = {
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/* 0F 7B /dm */ { 0, BX_IA_ERROR },
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/* 0F 7C /dm */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7c },
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/* 0F 7D /dm */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7d },
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/* 0F 7E /dm */ { BxPrefixSSE, BX_IA_MOVD_EdPd, BxOpcodeGroupSSE_0f7eM },
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/* 0F 7F /dm */ { BxPrefixSSE, BX_IA_MOVQ_QqPq, BxOpcodeGroupSSE_0f7fM },
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/* 0F 7E /dm */ { BxPrefixSSE, BX_IA_MOVD_EdPdM, BxOpcodeGroupSSE_0f7eM },
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/* 0F 7F /dm */ { BxPrefixSSE, BX_IA_MOVQ_QqPqM, BxOpcodeGroupSSE_0f7fM },
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/* 0F 80 /dm */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JO_Jd },
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/* 0F 81 /dm */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNO_Jd },
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/* 0F 82 /dm */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JB_Jd },
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode64.cc,v 1.252 2010-02-09 19:44:25 sshwarts Exp $
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// $Id: fetchdecode64.cc,v 1.253 2010-02-10 17:21:14 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2009 The Bochs Project
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@ -535,7 +535,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
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/* 0F 6B /wr */ { BxPrefixSSE, BX_IA_PACKSSDW_PqQq, BxOpcodeGroupSSE_0f6b },
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/* 0F 6C /wr */ { BxPrefixSSE66, BX_IA_PUNPCKLQDQ_VdqWdq },
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/* 0F 6D /wr */ { BxPrefixSSE66, BX_IA_PUNPCKHQDQ_VdqWdq },
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/* 0F 6E /wr */ { BxPrefixSSE, BX_IA_MOVD_PqEd, BxOpcodeGroupSSE_0f6eR },
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/* 0F 6E /wr */ { BxPrefixSSE, BX_IA_MOVD_PqEdR, BxOpcodeGroupSSE_0f6eR },
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/* 0F 6F /wr */ { BxPrefixSSE, BX_IA_MOVQ_PqQqR, BxOpcodeGroupSSE_0f6fR },
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/* 0F 70 /wr */ { BxPrefixSSE | BxImmediate_Ib, BX_IA_PSHUFW_PqQqIb, BxOpcodeGroupSSE_0f70 },
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/* 0F 71 /wr */ { BxGroup12, BX_IA_ERROR, BxOpcodeInfoG12R },
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@ -551,8 +551,8 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
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/* 0F 7B /wr */ { 0, BX_IA_ERROR },
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/* 0F 7C /wr */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7c },
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/* 0F 7D /wr */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7d },
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/* 0F 7E /wr */ { BxPrefixSSE, BX_IA_MOVD_EdPd, BxOpcodeGroupSSE_0f7eR },
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/* 0F 7F /wr */ { BxPrefixSSE, BX_IA_MOVQ_QqPq, BxOpcodeGroupSSE_0f7fR },
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/* 0F 7E /wr */ { BxPrefixSSE, BX_IA_MOVD_EdPdR, BxOpcodeGroupSSE_0f7eR },
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/* 0F 7F /wr */ { BxPrefixSSE, BX_IA_MOVQ_QqPqR, BxOpcodeGroupSSE_0f7fR },
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/* 0F 80 /wr */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JO_Jq },
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/* 0F 81 /wr */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNO_Jq },
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/* 0F 82 /wr */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JB_Jq },
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@ -1062,7 +1062,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
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/* 0F 6B /dr */ { BxPrefixSSE, BX_IA_PACKSSDW_PqQq, BxOpcodeGroupSSE_0f6b },
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/* 0F 6C /dr */ { BxPrefixSSE66, BX_IA_PUNPCKLQDQ_VdqWdq },
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/* 0F 6D /dr */ { BxPrefixSSE66, BX_IA_PUNPCKHQDQ_VdqWdq },
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/* 0F 6E /dr */ { BxPrefixSSE, BX_IA_MOVD_PqEd, BxOpcodeGroupSSE_0f6eR },
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/* 0F 6E /dr */ { BxPrefixSSE, BX_IA_MOVD_PqEdR, BxOpcodeGroupSSE_0f6eR },
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/* 0F 6F /dr */ { BxPrefixSSE, BX_IA_MOVQ_PqQqR, BxOpcodeGroupSSE_0f6fR },
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/* 0F 70 /dr */ { BxPrefixSSE | BxImmediate_Ib, BX_IA_PSHUFW_PqQqIb, BxOpcodeGroupSSE_0f70 },
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/* 0F 71 /dr */ { BxGroup12, BX_IA_ERROR, BxOpcodeInfoG12R },
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@ -1078,8 +1078,8 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
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/* 0F 7B /dr */ { 0, BX_IA_ERROR },
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/* 0F 7C /dr */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7c },
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/* 0F 7D /dr */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7d },
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/* 0F 7E /dr */ { BxPrefixSSE, BX_IA_MOVD_EdPd, BxOpcodeGroupSSE_0f7eR },
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/* 0F 7F /dr */ { BxPrefixSSE, BX_IA_MOVQ_QqPq, BxOpcodeGroupSSE_0f7fR },
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/* 0F 7E /dr */ { BxPrefixSSE, BX_IA_MOVD_EdPdR, BxOpcodeGroupSSE_0f7eR },
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/* 0F 7F /dr */ { BxPrefixSSE, BX_IA_MOVQ_QqPqR, BxOpcodeGroupSSE_0f7fR },
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/* 0F 80 /dr */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JO_Jq },
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/* 0F 81 /dr */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNO_Jq },
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/* 0F 82 /dr */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JB_Jq },
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@ -1605,8 +1605,8 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
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/* 0F 7B /qr */ { 0, BX_IA_ERROR },
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/* 0F 7C /qr */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7c },
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/* 0F 7D /qr */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7d },
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/* 0F 7E /qr */ { BxPrefixSSE, BX_IA_MOVQ_EqPq, BxOpcodeGroupSSE_0f7eQR },
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/* 0F 7F /qr */ { BxPrefixSSE, BX_IA_MOVQ_QqPq, BxOpcodeGroupSSE_0f7fR },
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/* 0F 7E /qr */ { BxPrefixSSE, BX_IA_MOVQ_EqPqR, BxOpcodeGroupSSE_0f7eQR },
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/* 0F 7F /qr */ { BxPrefixSSE, BX_IA_MOVQ_QqPqR, BxOpcodeGroupSSE_0f7fR },
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/* 0F 80 /qr */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JO_Jq },
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/* 0F 81 /qr */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNO_Jq },
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/* 0F 82 /qr */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JB_Jq },
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@ -2122,7 +2122,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64M[512*3] = {
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/* 0F 6B /wm */ { BxPrefixSSE, BX_IA_PACKSSDW_PqQq, BxOpcodeGroupSSE_0f6b },
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/* 0F 6C /wm */ { BxPrefixSSE66, BX_IA_PUNPCKLQDQ_VdqWdq },
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/* 0F 6D /wm */ { BxPrefixSSE66, BX_IA_PUNPCKHQDQ_VdqWdq },
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/* 0F 6E /wm */ { BxPrefixSSE, BX_IA_MOVD_PqEd, BxOpcodeGroupSSE_0f6eM },
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/* 0F 6E /wm */ { BxPrefixSSE, BX_IA_MOVD_PqEdM, BxOpcodeGroupSSE_0f6eM },
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/* 0F 6F /wm */ { BxPrefixSSE, BX_IA_MOVQ_PqQqM, BxOpcodeGroupSSE_0f6fM },
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/* 0F 70 /wm */ { BxPrefixSSE | BxImmediate_Ib, BX_IA_PSHUFW_PqQqIb, BxOpcodeGroupSSE_0f70 },
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/* 0F 71 /wm */ { 0, BX_IA_ERROR }, // SSE Group G12
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@ -2138,8 +2138,8 @@ static const BxOpcodeInfo_t BxOpcodeInfo64M[512*3] = {
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/* 0F 7B /wm */ { 0, BX_IA_ERROR },
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/* 0F 7C /wm */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7c },
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/* 0F 7D /wm */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7d },
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/* 0F 7E /wm */ { BxPrefixSSE, BX_IA_MOVD_EdPd, BxOpcodeGroupSSE_0f7eM },
|
||||
/* 0F 7F /wm */ { BxPrefixSSE, BX_IA_MOVQ_QqPq, BxOpcodeGroupSSE_0f7fM },
|
||||
/* 0F 7E /wm */ { BxPrefixSSE, BX_IA_MOVD_EdPdM, BxOpcodeGroupSSE_0f7eM },
|
||||
/* 0F 7F /wm */ { BxPrefixSSE, BX_IA_MOVQ_QqPqM, BxOpcodeGroupSSE_0f7fM },
|
||||
/* 0F 80 /wm */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JO_Jq },
|
||||
/* 0F 81 /wm */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNO_Jq },
|
||||
/* 0F 82 /wm */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JB_Jq },
|
||||
@ -2649,7 +2649,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo64M[512*3] = {
|
||||
/* 0F 6B /dm */ { BxPrefixSSE, BX_IA_PACKSSDW_PqQq, BxOpcodeGroupSSE_0f6b },
|
||||
/* 0F 6C /dm */ { BxPrefixSSE66, BX_IA_PUNPCKLQDQ_VdqWdq },
|
||||
/* 0F 6D /dm */ { BxPrefixSSE66, BX_IA_PUNPCKHQDQ_VdqWdq },
|
||||
/* 0F 6E /dm */ { BxPrefixSSE, BX_IA_MOVD_PqEd, BxOpcodeGroupSSE_0f6eM },
|
||||
/* 0F 6E /dm */ { BxPrefixSSE, BX_IA_MOVD_PqEdM, BxOpcodeGroupSSE_0f6eM },
|
||||
/* 0F 6F /dm */ { BxPrefixSSE, BX_IA_MOVQ_PqQqM, BxOpcodeGroupSSE_0f6fM },
|
||||
/* 0F 70 /dm */ { BxPrefixSSE | BxImmediate_Ib, BX_IA_PSHUFW_PqQqIb, BxOpcodeGroupSSE_0f70 },
|
||||
/* 0F 71 /dm */ { 0, BX_IA_ERROR }, // SSE Group G12
|
||||
@ -2665,8 +2665,8 @@ static const BxOpcodeInfo_t BxOpcodeInfo64M[512*3] = {
|
||||
/* 0F 7B /dm */ { 0, BX_IA_ERROR },
|
||||
/* 0F 7C /dm */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7c },
|
||||
/* 0F 7D /dm */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7d },
|
||||
/* 0F 7E /dm */ { BxPrefixSSE, BX_IA_MOVD_EdPd, BxOpcodeGroupSSE_0f7eM },
|
||||
/* 0F 7F /dm */ { BxPrefixSSE, BX_IA_MOVQ_QqPq, BxOpcodeGroupSSE_0f7fM },
|
||||
/* 0F 7E /dm */ { BxPrefixSSE, BX_IA_MOVD_EdPdM, BxOpcodeGroupSSE_0f7eM },
|
||||
/* 0F 7F /dm */ { BxPrefixSSE, BX_IA_MOVQ_QqPqM, BxOpcodeGroupSSE_0f7fM },
|
||||
/* 0F 80 /dm */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JO_Jq },
|
||||
/* 0F 81 /dm */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNO_Jq },
|
||||
/* 0F 82 /dm */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JB_Jq },
|
||||
@ -3192,8 +3192,8 @@ static const BxOpcodeInfo_t BxOpcodeInfo64M[512*3] = {
|
||||
/* 0F 7B /qm */ { 0, BX_IA_ERROR },
|
||||
/* 0F 7C /qm */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7c },
|
||||
/* 0F 7D /qm */ { BxPrefixSSE, BX_IA_ERROR, BxOpcodeGroupSSE_0f7d },
|
||||
/* 0F 7E /qm */ { BxPrefixSSE, BX_IA_MOVQ_EqPq, BxOpcodeGroupSSE_0f7eQM },
|
||||
/* 0F 7F /qm */ { BxPrefixSSE, BX_IA_MOVQ_QqPq, BxOpcodeGroupSSE_0f7fM },
|
||||
/* 0F 7E /qm */ { BxPrefixSSE, BX_IA_MOVQ_EqPqM, BxOpcodeGroupSSE_0f7eQM },
|
||||
/* 0F 7F /qm */ { BxPrefixSSE, BX_IA_MOVQ_QqPqM, BxOpcodeGroupSSE_0f7fM },
|
||||
/* 0F 80 /qm */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JO_Jq },
|
||||
/* 0F 81 /qm */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JNO_Jq },
|
||||
/* 0F 82 /qm */ { BxImmediate_BrOff32 | BxTraceJCC, BX_IA_JB_Jq },
|
||||
|
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: ia_opcodes.h,v 1.35 2009-12-23 07:26:14 sshwarts Exp $
|
||||
// $Id: ia_opcodes.h,v 1.36 2010-02-10 17:21:15 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (c) 2008-2009 Stanislav Shwartsman
|
||||
@ -840,15 +840,18 @@ bx_define_opcode(BX_IA_PUNPCKHBW_PqQq, &BX_CPU_C::PUNPCKHBW_PqQq, NULL)
|
||||
bx_define_opcode(BX_IA_PUNPCKHWD_PqQq, &BX_CPU_C::PUNPCKHWD_PqQq, NULL)
|
||||
bx_define_opcode(BX_IA_PUNPCKHDQ_PqQq, &BX_CPU_C::PUNPCKHDQ_PqQq, NULL)
|
||||
bx_define_opcode(BX_IA_PACKSSDW_PqQq, &BX_CPU_C::PACKSSDW_PqQq, NULL)
|
||||
bx_define_opcode(BX_IA_MOVD_PqEd, &BX_CPU_C::MOVD_PqEd, NULL)
|
||||
bx_define_opcode(BX_IA_MOVD_PqEdR, &BX_CPU_C::MOVD_PqEdR, NULL)
|
||||
bx_define_opcode(BX_IA_MOVD_PqEdM, &BX_CPU_C::MOVD_PqEdM, NULL)
|
||||
bx_define_opcode(BX_IA_MOVQ_PqQqR, &BX_CPU_C::MOVQ_PqQqR, NULL)
|
||||
bx_define_opcode(BX_IA_MOVQ_PqQqM, &BX_CPU_C::MOVQ_PqQqM, NULL)
|
||||
bx_define_opcode(BX_IA_PCMPEQB_PqQq, &BX_CPU_C::PCMPEQB_PqQq, NULL)
|
||||
bx_define_opcode(BX_IA_PCMPEQW_PqQq, &BX_CPU_C::PCMPEQW_PqQq, NULL)
|
||||
bx_define_opcode(BX_IA_PCMPEQD_PqQq, &BX_CPU_C::PCMPEQD_PqQq, NULL)
|
||||
bx_define_opcode(BX_IA_EMMS, &BX_CPU_C::EMMS, NULL)
|
||||
bx_define_opcode(BX_IA_MOVD_EdPd, &BX_CPU_C::MOVD_EdPd, NULL)
|
||||
bx_define_opcode(BX_IA_MOVQ_QqPq, &BX_CPU_C::MOVQ_QqPq, NULL)
|
||||
bx_define_opcode(BX_IA_MOVD_EdPdR, &BX_CPU_C::MOVD_EdPdR, NULL)
|
||||
bx_define_opcode(BX_IA_MOVD_EdPdM, &BX_CPU_C::MOVD_EdPdM, NULL)
|
||||
bx_define_opcode(BX_IA_MOVQ_QqPqR, &BX_CPU_C::MOVQ_QqPqR, NULL)
|
||||
bx_define_opcode(BX_IA_MOVQ_QqPqM, &BX_CPU_C::MOVQ_QqPqM, NULL)
|
||||
bx_define_opcode(BX_IA_PSRLW_PqQq, &BX_CPU_C::PSRLW_PqQq, NULL)
|
||||
bx_define_opcode(BX_IA_PSRLD_PqQq, &BX_CPU_C::PSRLD_PqQq, NULL)
|
||||
bx_define_opcode(BX_IA_PSRLQ_PqQq, &BX_CPU_C::PSRLQ_PqQq, NULL)
|
||||
@ -1569,7 +1572,8 @@ bx_define_opcode(BX_IA_LOOPNE64_Jb, &BX_CPU_C::LOOPNE64_Jb, NULL)
|
||||
bx_define_opcode(BX_IA_LOOPE64_Jb, &BX_CPU_C::LOOPE64_Jb, NULL)
|
||||
bx_define_opcode(BX_IA_LOOP64_Jb, &BX_CPU_C::LOOP64_Jb, NULL)
|
||||
bx_define_opcode(BX_IA_JRCXZ_Jb, &BX_CPU_C::JRCXZ_Jb, NULL)
|
||||
bx_define_opcode(BX_IA_MOVQ_EqPq, &BX_CPU_C::MOVQ_EqPq, NULL)
|
||||
bx_define_opcode(BX_IA_MOVQ_EqPqR, &BX_CPU_C::MOVQ_EqPqR, NULL)
|
||||
bx_define_opcode(BX_IA_MOVQ_EqPqM, &BX_CPU_C::MOVQ_QqPqM, NULL)
|
||||
bx_define_opcode(BX_IA_MOVQ_EqVqR, &BX_CPU_C::MOVQ_EqVqR, NULL)
|
||||
bx_define_opcode(BX_IA_MOVQ_EqVqM, &BX_CPU_C::MOVQ_WqVqM, NULL)
|
||||
bx_define_opcode(BX_IA_MOVQ_PqEqR, &BX_CPU_C::MOVQ_PqEqR, NULL)
|
||||
|
111
bochs/cpu/mmx.cc
111
bochs/cpu/mmx.cc
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: mmx.cc,v 1.89 2009-12-14 11:55:42 sshwarts Exp $
|
||||
// $Id: mmx.cc,v 1.90 2010-02-10 17:21:15 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (c) 2002-2009 Stanislav Shwartsman
|
||||
@ -993,25 +993,36 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::PACKSSDW_PqQq(bxInstruction_c *i)
|
||||
}
|
||||
|
||||
/* 0F 6E */
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVD_PqEd(bxInstruction_c *i)
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVD_PqEdR(bxInstruction_c *i)
|
||||
{
|
||||
#if BX_SUPPORT_MMX
|
||||
BX_CPU_THIS_PTR prepareMMX();
|
||||
BX_CPU_THIS_PTR prepareFPU2MMX(); /* FPU2MMX transition */
|
||||
|
||||
BxPackedMmxRegister op;
|
||||
|
||||
MMXUD0(op) = BX_READ_32BIT_REG(i->rm());
|
||||
MMXUD1(op) = 0;
|
||||
|
||||
/* now write result back to destination */
|
||||
BX_WRITE_MMX_REG(i->nnn(), op);
|
||||
#else
|
||||
BX_INFO(("MOVD_PqEd: required MMX, use --enable-mmx option"));
|
||||
exception(BX_UD_EXCEPTION, 0, 0);
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVD_PqEdM(bxInstruction_c *i)
|
||||
{
|
||||
#if BX_SUPPORT_MMX
|
||||
BX_CPU_THIS_PTR prepareMMX();
|
||||
|
||||
BxPackedMmxRegister op;
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
MMXUD0(op) = read_virtual_dword(i->seg(), eaddr);
|
||||
MMXUD1(op) = 0;
|
||||
|
||||
/* op is a register or memory reference */
|
||||
if (i->modC0()) {
|
||||
MMXUD0(op) = BX_READ_32BIT_REG(i->rm());
|
||||
}
|
||||
else {
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
/* pointer, segment address pair */
|
||||
MMXUD0(op) = read_virtual_dword(i->seg(), eaddr);
|
||||
}
|
||||
|
||||
BX_CPU_THIS_PTR prepareFPU2MMX(); /* FPU2MMX transition */
|
||||
|
||||
/* now write result back to destination */
|
||||
@ -1045,8 +1056,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVQ_PqQqR(bxInstruction_c *i)
|
||||
BX_CPU_THIS_PTR prepareMMX();
|
||||
BX_CPU_THIS_PTR prepareFPU2MMX(); /* FPU2MMX transition */
|
||||
|
||||
BxPackedMmxRegister op = BX_READ_MMX_REG(i->rm());
|
||||
BX_WRITE_MMX_REG(i->nnn(), op);
|
||||
BX_WRITE_MMX_REG(i->nnn(), BX_READ_MMX_REG(i->rm()));
|
||||
#else
|
||||
BX_INFO(("MOVQ_PqQq: required MMX, use --enable-mmx option"));
|
||||
exception(BX_UD_EXCEPTION, 0, 0);
|
||||
@ -1061,7 +1071,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVQ_PqQqM(bxInstruction_c *i)
|
||||
BxPackedMmxRegister op;
|
||||
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
/* pointer, segment address pair */
|
||||
MMXUQ(op) = read_virtual_qword(i->seg(), eaddr);
|
||||
|
||||
BX_CPU_THIS_PTR prepareFPU2MMX(); /* FPU2MMX transition */
|
||||
@ -1223,22 +1232,30 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::EMMS(bxInstruction_c *i)
|
||||
}
|
||||
|
||||
/* 0F 7E */
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVD_EdPd(bxInstruction_c *i)
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVD_EdPdR(bxInstruction_c *i)
|
||||
{
|
||||
#if BX_SUPPORT_MMX
|
||||
BX_CPU_THIS_PTR prepareMMX();
|
||||
BX_CPU_THIS_PTR prepareFPU2MMX();
|
||||
|
||||
BxPackedMmxRegister op = BX_READ_MMX_REG(i->nnn());
|
||||
BX_WRITE_32BIT_REGZ(i->rm(), MMXUD0(op));
|
||||
#else
|
||||
BX_INFO(("MOVD_EdPd: required MMX, use --enable-mmx option"));
|
||||
exception(BX_UD_EXCEPTION, 0, 0);
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVD_EdPdM(bxInstruction_c *i)
|
||||
{
|
||||
#if BX_SUPPORT_MMX
|
||||
BX_CPU_THIS_PTR prepareMMX();
|
||||
|
||||
BxPackedMmxRegister op = BX_READ_MMX_REG(i->nnn());
|
||||
|
||||
/* destination is a register or memory reference */
|
||||
if (i->modC0()) {
|
||||
BX_WRITE_32BIT_REGZ(i->rm(), MMXUD0(op));
|
||||
}
|
||||
else {
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
/* pointer, segment address pair */
|
||||
write_virtual_dword(i->seg(), eaddr, MMXUD0(op));
|
||||
}
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
/* pointer, segment address pair */
|
||||
write_virtual_dword(i->seg(), eaddr, MMXUD0(op));
|
||||
|
||||
// do not cause FPU2MMX transition if memory write faults
|
||||
BX_CPU_THIS_PTR prepareFPU2MMX();
|
||||
@ -1251,45 +1268,41 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVD_EdPd(bxInstruction_c *i)
|
||||
#if BX_SUPPORT_X86_64
|
||||
|
||||
/* 0F 7E */
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVQ_EqPq(bxInstruction_c *i)
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVQ_EqPqR(bxInstruction_c *i)
|
||||
{
|
||||
BX_CPU_THIS_PTR prepareMMX();
|
||||
BX_CPU_THIS_PTR prepareFPU2MMX();
|
||||
|
||||
BxPackedMmxRegister op = BX_READ_MMX_REG(i->nnn());
|
||||
|
||||
/* destination is a register or memory reference */
|
||||
if (i->modC0()) {
|
||||
BX_WRITE_64BIT_REG(i->rm(), MMXUQ(op));
|
||||
}
|
||||
else {
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
/* pointer, segment address pair */
|
||||
write_virtual_qword_64(i->seg(), eaddr, MMXUQ(op));
|
||||
}
|
||||
|
||||
// do not cause FPU2MMX transition if memory write faults
|
||||
BX_CPU_THIS_PTR prepareFPU2MMX();
|
||||
BX_WRITE_64BIT_REG(i->rm(), MMXUQ(op));
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/* 0F 7F */
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVQ_QqPq(bxInstruction_c *i)
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVQ_QqPqR(bxInstruction_c *i)
|
||||
{
|
||||
#if BX_SUPPORT_MMX
|
||||
BX_CPU_THIS_PTR prepareMMX();
|
||||
BX_CPU_THIS_PTR prepareFPU2MMX();
|
||||
|
||||
BX_WRITE_MMX_REG(i->rm(), BX_READ_MMX_REG(i->nnn()));
|
||||
#else
|
||||
BX_INFO(("MOVQ_QqPq: required MMX, use --enable-mmx option"));
|
||||
exception(BX_UD_EXCEPTION, 0, 0);
|
||||
#endif
|
||||
}
|
||||
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVQ_QqPqM(bxInstruction_c *i)
|
||||
{
|
||||
#if BX_SUPPORT_MMX
|
||||
BX_CPU_THIS_PTR prepareMMX();
|
||||
|
||||
BxPackedMmxRegister op = BX_READ_MMX_REG(i->nnn());
|
||||
|
||||
/* op is a register or memory reference */
|
||||
if (i->modC0()) {
|
||||
BX_WRITE_MMX_REG(i->rm(), op);
|
||||
}
|
||||
else {
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
/* pointer, segment address pair */
|
||||
write_virtual_qword(i->seg(), eaddr, MMXUQ(op));
|
||||
}
|
||||
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
||||
/* pointer, segment address pair */
|
||||
write_virtual_qword(i->seg(), eaddr, MMXUQ(op));
|
||||
|
||||
// do not cause FPU2MMX transition if memory write faults
|
||||
BX_CPU_THIS_PTR prepareFPU2MMX();
|
||||
|
Loading…
Reference in New Issue
Block a user