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232 Commits

Author SHA1 Message Date
Stanislav Shwartsman
c6050a99d1 implemented AVX encoded VNNI instructions published in recent SDM - not tested yet 2020-10-03 09:23:28 +00:00
Stanislav Shwartsman
4023b640d6 Protection Keys: Implemented Supervisor-Mode Protection Keys (PKS) 2020-05-29 12:35:30 +00:00
Stanislav Shwartsman
b891789c3d implemented (experimental) TSC Adjust MSR 2020-05-21 19:58:16 +00:00
Stanislav Shwartsman
f90e5f4f44 Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071 
Only missing items (to be added soon):
  - Supervisor Shadow Stack EPT Control is not implemented yet
  - SMM placing for SSP
Currently have to be added manually to some CPUID model, for example to ICL-U
To enable configure with --enable-cet
 2019-12-20 07:42:07 +00:00
Stanislav Shwartsman
8c385f2a9a fix in cpu features print 2019-12-06 11:05:05 +00:00
Stanislav Shwartsman
7861ff5160 fixed typo in feature name 2019-12-06 10:39:42 +00:00
Stanislav Shwartsman
0c75e0beaf extract xcr0_support bits calculation to a function 2019-12-06 09:23:28 +00:00
Stanislav Shwartsman
893aa10359 cosmetic changes 2019-12-04 19:53:08 +00:00
Stanislav Shwartsman
d766cc8112 implemented SCA (Side-Channel-Attack) Prevention reporting and corresponding MSR registers, enabled for Icelake-U CPU definition 2019-10-26 20:09:30 +00:00
Stanislav Shwartsman
2eb47f866f added minor clarifications based on most recent AMD SDM published 2019-07-30 18:17:21 +00:00
Stanislav Shwartsman
4d10852c04 impemented recently published VP2INTERSECTD/Q instructions 2019-05-25 19:07:09 +00:00
Stanislav Shwartsman
0c28705b18 fixed compilation under MAC env 2019-05-18 04:50:07 +00:00
Stanislav Shwartsman
54bdb24e4b remove MOVDIRI opcode extension for now until fugured out how nicely do MOVDIR64B, they better to be both done with same CPUID feature name 2019-02-22 19:15:53 +00:00
Stanislav Shwartsman
9bc7faf493 dump all supported CPU fetures into Bochs log from CPUID object 2019-01-05 20:17:39 +00:00
Stanislav Shwartsman
a8413aa838 update comments base on latest AMD spec 2018-05-27 18:13:24 +00:00
Stanislav Shwartsman
31d29734d6 some comments about more CPUID leaf 80000008.EBX by Ryzen 2017-03-28 19:11:42 +00:00
Stanislav Shwartsman
e5c64b3b56 cleanup of warning messages from cpuid code 2017-03-26 20:12:14 +00:00
Stanislav Shwartsman
411ea954b4 implemented CLZERO instruction from AMD Ryzen CPU 2017-03-25 20:12:31 +00:00
Stanislav Shwartsman
ebbf8f9e0f adjustments in AMD Ryzen CPUID 2017-03-15 22:14:10 +00:00
Stanislav Shwartsman
3a033fa6db implemented xsaves/xrstors extensions (supported by Intel Skylake core and AMD Ryzen) 2017-03-15 21:44:15 +00:00
Stanislav Shwartsman
402e2cfad0 move cpuid warning messages to base cpuid class - reduce code cleanup 2017-03-13 19:59:48 +00:00
Stanislav Shwartsman
980eaa7937 move cpuid leaf 80000008 to base bx_cpuid_t class to remove code dupolication 2017-03-09 21:25:18 +00:00
Stanislav Shwartsman
bcb36e81fa experimental implementation of protection keys paging extension published in SDM rev054. to enable configure with --enable-protection-keys 2016-03-02 20:44:42 +00:00
Stanislav Shwartsman
be4b73c6d2 extracted tlb specific code to tlb.h; extracted xsave cpuid leaf function to base cpuid class 2015-09-21 13:16:17 +00:00
Stanislav Shwartsman
9315742f3d cleanups of vmcs mapping related stuff 2015-07-07 21:06:56 +00:00
Stanislav Shwartsman
5fe1423ab6 introducr new class for VMCS mapping so it can be customized per cpuid 2015-07-06 18:46:57 +00:00
Stanislav Shwartsman
080ceb8293 don't crash when running on 386 with no FPU model 2015-03-27 21:39:24 +00:00
Stanislav Shwartsman
b60d7d3154 Cleanup of CPUDB modules, moved common functionality into bx_cpuid_t base class 
Added Pentium (P54C) AKA Pentium with no MMX to CPUDB
 2015-02-11 21:31:17 +00:00
Stanislav Shwartsman
03dab0b0c9 remove debug prints from param tree dump in xml format, small code reorg 2014-11-30 21:26:33 +00:00
Stanislav Shwartsman
5f4e7f8b49 fixed compilation when APIC if snot enabled 2014-11-01 10:25:42 +00:00
Stanislav Shwartsman
caab07e580 move common code (extended topology leaf) into base cpuid class to save code duplication 2014-10-15 14:25:08 +00:00
Stanislav Shwartsman
f8267ec3a7 rework in CPUID code (fixed code duplication). Re-enable perfmon reporting in CPUID because Win8/Win10 installation doesn't want to start without perfmon reported. TODO: implement basic perfmon support (at least only fixed counters) because win7-64 doesn't install with perfmon reported but not implemented 2014-10-15 08:04:38 +00:00
Stanislav Shwartsman
78327d3e5e First step toward completely configurable CPU. 
Change CPUID to generic interface which could be chosen from .bochsrc.
Bochs CPU emulation will enable/disable features (like instruction sets) according to CPUID that is selected.
TODO: Add database of CPUID from real hardware CPUs
 2011-07-28 16:17:42 +00:00
Stanislav Shwartsman
002c86660a reword all the CPU code in preparation for future CPU speedup implementation. 
Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
 2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
8399dee24c implemented AVX float16 convert instructions 2011-06-11 13:12:32 +00:00
Stanislav Shwartsman
77e15511be AVX2 and BMI instructions were published on http://software.intel.com/en-us/avx 2011-06-10 08:46:10 +00:00
Stanislav Shwartsman
04e9254e2c AMD released new Vol4: 128 and 256 bit vector instructions, dropped SSE4A 2011-05-30 20:15:50 +00:00
Stanislav Shwartsman
1ba77b9f10 fixed defined but not used warnings 2011-05-29 20:42:47 +00:00
Stanislav Shwartsman
5748c6b9f5 first fix for SMEP 2011-05-29 18:08:37 +00:00
Stanislav Shwartsman
ee3f9e36cb Implemented Supervisor Mode Execution Protection (SMEP) 2011-05-29 16:28:26 +00:00
Stanislav Shwartsman
6ace540891 update for rev39 of Intel SDM 2011-05-28 20:20:25 +00:00
Stanislav Shwartsman
e0160b4f29 ability to turn on/off AVX if compiled in 2011-05-24 20:33:36 +00:00
Stanislav Shwartsman
de95fa8e13 more changes towards configurable cpuid 2011-05-24 18:23:28 +00:00
Stanislav Shwartsman
610df62e93 fixed segfault with x86-64 disabled 2011-04-22 17:56:27 +00:00
Stanislav Shwartsman
fb360ac334 bugfix 2011-04-22 07:39:38 +00:00
Stanislav Shwartsman
024a1ace38 move X2APIC to be .bochsrc option, rework of the cpuid code 2011-04-21 13:27:42 +00:00
Volker Ruppert
c78026a9a2 - deleted executable properties from source files 2011-04-03 10:29:19 +00:00
Stanislav Shwartsman
f0a3cce1e2 added XSAVEOPT instruction emulation (for now with no state tracking according to Intel docs, just alias it to XSAVE) 
update CHANGES
 2011-03-25 20:32:07 +00:00
Stanislav Shwartsman
7ced718040 implemented AVX instructions support 
many changes - some cleanup will follow
please report ay found bugs !
 2011-03-19 20:09:34 +00:00
Stanislav Shwartsman
1aaf596d79 small fixes 2011-03-19 17:19:41 +00:00
Stanislav Shwartsman
edd7c2d787 small reorg in cpuid code 2011-03-14 20:28:16 +00:00
Stanislav Shwartsman
acd320699d small cleanups 2011-03-14 06:25:54 +00:00
Stanislav Shwartsman
c15220bdeb assertion about misconfigured cpuid family 2011-02-25 17:54:50 +00:00
Stanislav Shwartsman
66682a0ba7 added ability to configure CPU family and model through .bochsrc 2011-02-25 15:05:48 +00:00
Stanislav Shwartsman
7d80a6ebe0 Adding Id and Rev property to all files 2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
9a2b9296f1 bugfix in leaf[0xD] report 2011-01-12 20:12:05 +00:00
Stanislav Shwartsman
9aa503cb9d fixed warnings for win64 compilation 2010-11-23 14:59:36 +00:00
Stanislav Shwartsman
d011594114 Added option to disable MWAIT using .bochsrc 2010-11-21 12:02:12 +00:00
Stanislav Shwartsman
6d089dd238 changed CPUID constants to defines 2010-10-07 16:39:31 +00:00
Stanislav Shwartsman
e0fcc80ec3 introduce bswap functions, big endian fix for CPUID 2010-09-20 20:43:16 +00:00
Stanislav Shwartsman
91ac0df65c implemented GS/FS BASE access instructions published in _319433-007.pdf document 2010-07-22 16:41:59 +00:00
Stanislav Shwartsman
7f7c249934 disasm and some cpuid code according to recently published AVX_319433-007.pdf document 2010-07-22 15:12:08 +00:00
Stanislav Shwartsman
cd6314b65c Added ability to configure CPUID stepping through .bochsrc. 
Next is CPUID model/extended model.
 2010-07-16 21:03:52 +00:00
Stanislav Shwartsman
59ad9d8de8 Fixes 2010-07-15 20:18:03 +00:00
Stanislav Shwartsman
23a28d2892 Fixed compilation with vs2008 2010-06-03 19:36:13 +00:00
Stanislav Shwartsman
f95ddc4029 Debug Extensions was introduced in Pentium 2010-05-12 18:48:51 +00:00
Stanislav Shwartsman
b0d5142e18 comp fixes 2010-05-06 21:46:39 +00:00
Stanislav Shwartsman
ca95477b7f Implement x86-64 PCID extension 2010-04-29 19:34:32 +00:00
Stanislav Shwartsman
1c2fa8cd0c move 1G_pages support to runtime option 2010-04-24 09:36:04 +00:00
Stanislav Shwartsman
ea95341e05 compile fix 2010-04-22 18:48:39 +00:00
Stanislav Shwartsman
6e1204cb84 Merged X2APIC + X2APIC virtualization 2010-04-08 15:50:39 +00:00
Stanislav Shwartsman
d39d485ece changes variable name to better one 2010-04-03 05:59:07 +00:00
Stanislav Shwartsman
6d01eb5c1f announce (not implement yet) PCID 2010-03-31 14:00:46 +00:00
Stanislav Shwartsman
4560eaab97 fxsave enable 2010-03-30 18:16:48 +00:00
Stanislav Shwartsman
2efb11f2bc fixes 2010-03-30 18:12:19 +00:00
Stanislav Shwartsman
f5ce2a7639 split crreg access functions to separate file 2010-03-25 21:33:07 +00:00
Stanislav Shwartsman
d9574caafe Return max standard not max extended leaf. 
- Sebastian
 2010-03-21 20:52:36 +00:00
Stanislav Shwartsman
855c19e396 Limit max CPUID for WinNt fix 2010-03-17 20:25:13 +00:00
Stanislav Shwartsman
ef4731ef49 bugfix 2010-03-06 07:00:05 +00:00
Stanislav Shwartsman
e5dc6c51a8 one more sanity check 2010-03-05 20:43:56 +00:00
Stanislav Shwartsman
13a602d069 fix undefined CPUID options when CPU_LEVEL is too small 2010-03-05 20:42:10 +00:00
Stanislav Shwartsman
895c6729eb cpuid debug info 2010-03-05 15:49:44 +00:00
Stanislav Shwartsman
51618b181c winxp doesn't want to boot with CPUID[0].EAX < 3 2010-03-05 15:19:15 +00:00
Stanislav Shwartsman
803e586a01 bugfix 2010-03-05 14:26:23 +00:00
Stanislav Shwartsman
14b578938d bugfixes and cleanups 2010-03-03 14:33:35 +00:00
Stanislav Shwartsman
01cfbdccbc Move MMX to be runtime option 2010-03-01 18:53:53 +00:00
Stanislav Shwartsman
160d4bbded Fixed typo 2010-03-01 17:35:49 +00:00
Stanislav Shwartsman
e3a13a7a55 Make XAPIC runtime option as well 2010-02-28 14:52:17 +00:00
Stanislav Shwartsman
5b6a14656d Make XSAVE as runtime option 2010-02-26 22:53:43 +00:00
Stanislav Shwartsman
5df864b1f1 Move param_names.h into bochs root folder 2010-02-26 14:18:19 +00:00
Stanislav Shwartsman
927c3594d6 enable compilation with CPU_LEVEL <= 6 
converted SEP to runtime option as well
 2010-02-26 11:44:50 +00:00
Stanislav Shwartsman
32e5f1ffc8 fixes 2010-02-25 22:44:46 +00:00
Stanislav Shwartsman
78a420faa1 first updates 2010-02-25 22:34:56 +00:00
Stanislav Shwartsman
033a20b3b2 allow to configure CPU features at runtime - implemened on example of SSE/AES/MOVBE/POPCNT 2010-02-25 22:04:31 +00:00
Stanislav Shwartsman
33107b54fc - Fixed CPUID function 0x80000005 for Intel CPUs (should be reserved) 2010-01-24 20:21:47 +00:00
Stanislav Shwartsman
c403090327 ! Implemented PCLMULQDQ AES instruction 2009-12-20 09:00:40 +00:00
Stanislav Shwartsman
7254ea36a1 copyright fixes + small optimization 2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
8a95120e12 deprecate --enable-vme option, now it will be supported iff CPU_LEVEL >= 5 (like in real life) 2009-08-10 15:44:50 +00:00
Stanislav Shwartsman
cd445195dd cleanup configure options. All paging related stuff is now automatically set/unset according to cpu-level option. 
Related configure options (--enable-pae, --enable-mtrr, --enable-global-pages, --enable-large-pages) are deprecated.
Less configure options - less configure problems :)
 2009-06-15 09:30:56 +00:00
Stanislav Shwartsman
cb8ef697d5 PSE-36 is also supported 2009-06-06 10:40:11 +00:00