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192 Commits

Author SHA1 Message Date
Stanislav Shwartsman
5d4e32b8da Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads 2007-12-20 20:58:38 +00:00
Stanislav Shwartsman
b516589e4e Changes in write_virtual_* and pop_* functions -> avoid moving parameteres by pointer 2007-12-20 18:29:42 +00:00
Stanislav Shwartsman
46366b5064 Speedup simulation by eliminating CPL==3 check from read/write_virtual* functions 2007-12-16 21:03:46 +00:00
Stanislav Shwartsman
d9a59c7a1f Added ability to merge traces cross JCC branch instructions 
Makes traces longer -> emulation faster in average
 2007-12-14 20:41:09 +00:00
Stanislav Shwartsman
db69a25c36 Trace cache instrumentation methods 
Next step will be tracing cross non-taken branches
 2007-12-14 11:27:44 +00:00
Stanislav Shwartsman
48d815427c According to AMD docs INVLD/WBINVLD instructions not required to flush TLBs 2007-12-14 10:15:12 +00:00
Stanislav Shwartsman
85d10e4f72 Added MWAIT callback 2007-12-13 21:41:32 +00:00
Stanislav Shwartsman
91e0db63c4 no need to invalidate prefetch queue for RDMSR/WRMSR 2007-12-03 21:43:14 +00:00
Stanislav Shwartsman
c58e95f611 Make hw breakpoint match check a function - normally it should be called from read/write_virtual as well 2007-12-03 20:49:24 +00:00
Stanislav Shwartsman
8cfd17202a some simple SSE code optimizations 2007-11-27 22:12:45 +00:00
Stanislav Shwartsman
48650a70b4 Optimized alignment check 2007-11-20 21:22:03 +00:00
Stanislav Shwartsman
e1496bb9e0 Small optimization 2007-11-18 18:40:38 +00:00
Stanislav Shwartsman
d9e58bd598 split11b on opcode tables level - split almost eevery splittable instruction 
will be continued
 2007-11-17 12:44:10 +00:00
Stanislav Shwartsman
24e1936fbb Fixed compilation warning when compiling with no x86-64 2007-11-09 12:06:34 +00:00
Stanislav Shwartsman
5a172541e2 Small cleanup 2007-11-01 20:43:53 +00:00
Stanislav Shwartsman
e137560b14 Complete MONITOR/MWAIT implemntation (including monitoring of memory range) 
Fixed PANIC in read/write Cr/Dr - should #UD with unkown register used
 2007-11-01 18:03:48 +00:00
Stanislav Shwartsman
4ec7f5df39 Optimize access to IP (16 bit) - made IP register similar to GPR 2007-10-18 22:44:39 +00:00
Stanislav Shwartsman
082eb05b6b First step to fully configurable CPUID 
- put CPUID functions data into array, in future we could load this array from configure file
 - cpuid initialize function is more flexible now but still reuire some work
 2007-10-12 19:30:51 +00:00
Stanislav Shwartsman
8adbbcf17c Started first implementation of MONITOR/MWAIT 2007-10-11 21:29:01 +00:00
Stanislav Shwartsman
f6ed95785f added cpu state param - for future use and for dbg info 
started to move debugger to info bx_param interface -> info sse and info mmx commands modified
 2007-10-11 18:12:00 +00:00
Stanislav Shwartsman
82b7eaabd5 CLFLUSH do not fault when checking execute only segment 2007-10-10 21:48:46 +00:00
Stanislav Shwartsman
071c5c1a26 A lot of changes but everything is really trivial. 
Make save/restore default feature, the configure option for save/restore removed from configure script and save/restore made available forever. All code now assume it is exists. Bochs save/restore tree previosly called "save_restore" renamed to "bochs" tree and it will be havily used everywhere, starting from save/restore and ending by various bochs debugger functions. I am going to rework debugger code to get rid of debug CPU access functions and use this "bochs" param tree instead
 2007-09-28 19:52:08 +00:00
Stanislav Shwartsman
e812f81e7b Fixes in zero upper ECX 2007-09-25 16:11:32 +00:00
Stanislav Shwartsman
91e6ca8d5c Implemented MTRR support 
Fixes in #PF exception priority
 2007-09-20 17:33:35 +00:00
Stanislav Shwartsman
70f513b07b Make efer control MSR separate register 2007-09-10 20:47:08 +00:00
Stanislav Shwartsman
895891b673 Implemented #AC check under configure option 
Fixes in misaligned SSE support
 2007-07-31 20:25:52 +00:00
Stanislav Shwartsman
38d1f39c77 Converted CR0 bits to one register similar to CR4 - a bit slower but helps with other features implemntation 2007-07-09 15:16:14 +00:00
Stanislav Shwartsman
7c6c2bb520 Removed PANIC message 2007-06-08 09:25:30 +00:00
Stanislav Shwartsman
65a99eb736 Change BX_ERROR to BX_DEBUG 2007-04-25 20:14:15 +00:00
Stanislav Shwartsman
6c139a9c8c Define LIN and PHY address size in config.h 2007-04-14 10:05:30 +00:00
Stanislav Shwartsman
d3252fbc1c Removed unneeded invalidate_prefetch_q from RDMSR instruction 2007-02-23 22:08:43 +00:00
Stanislav Shwartsman
c24627c00f Implemented CLFLUSH instruction 
Set of minor fixes for correctness
 2007-01-28 21:27:31 +00:00
Stanislav Shwartsman
6c63e84d23 Fixed CR3 masking in long mode 
Added PANIC assertion of 32-bit physical address in PAE mode
cleanup
 2006-10-04 19:08:40 +00:00
Stanislav Shwartsman
02c2fc9e89 Fixed priveledge level checks 2006-09-10 16:56:55 +00:00
Stanislav Shwartsman
fdac9efa9b Fixed ton of code duplication. 
Do not save/restore XMM8-XMM15 not in 64-bit mode
 2006-08-31 18:18:17 +00:00
Stanislav Shwartsman
65082e4a4f Handle granularity field for LDT 
Next step - fix code duplication with TSS
 2006-08-25 19:56:03 +00:00
Stanislav Shwartsman
3ce7764fce Fixes in 64-bit decoding 2006-08-11 17:23:36 +00:00
Stanislav Shwartsman
45353d5e6f Fixed DR registers handling in x86-64 mode 2006-06-26 21:07:44 +00:00
Stanislav Shwartsman
9269288319 Fix SR macros mis-use. Need to add assertion into bxlist_c and check that it has no 2 params with same name inside ! 2006-06-14 16:44:33 +00:00
Stanislav Shwartsman
49d7b4614f Fixed another bug generator - duplication between descriptor type field and four descriptor cache bits 2006-06-12 16:58:27 +00:00
Stanislav Shwartsman
308521e7ce Fixes in SYSCALL/SYSRET instructions 
Use parse_selector to avoid code duplication
 2006-06-11 21:37:22 +00:00
Stanislav Shwartsman
6c3420a18b Add debug prints before any #GP excepion which only possible to be generated 2006-06-09 22:29:07 +00:00
Stanislav Shwartsman
8b55085c76 Merge tss286 and tss386 segment descriptor cache fields to one structure 2006-05-21 20:41:48 +00:00
Stanislav Shwartsman
f4c7b4074e Support for x86-64 in x86 debugger (DR0-DR7) 2006-05-13 12:49:45 +00:00
Stanislav Shwartsman
9a32d0e98f Optimize debug registers handling 2006-05-13 12:29:12 +00:00
Stanislav Shwartsman
63dc4d4e10 Fixed CR4 GP(0) condition (patch by no_mayl in mailing list) 2006-04-23 16:11:16 +00:00
Stanislav Shwartsman
d972e4a4b7 Fixed CR3 restore in RSM instruction 
Added HALT state indication (actually make existant one working for single CPU)
 2006-04-10 19:05:21 +00:00
Stanislav Shwartsman
45f30f0a4c some code written to enter CPU to shutdown state. 
finally the shutdown handling should be done exactly as in VmWare - the GUI should ask user if the CPU should reset and go to HLT/IF=0 if user choosed to stay in shutdown mode.
CPU configure option reset-on-triple-failt should be extended to shutdown-reset=0|1
small code cleanups and fixes
 2006-04-07 20:47:32 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash: 
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
 2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
da3d26d7f4 Preliminary implemntation of SMM save statei 
Fixed fetchModeMask for load32bitOsStack
 2006-03-27 18:02:07 +00:00