Stanislav Shwartsman
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29a674e520
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split rd/wr CR opcodes for simplicity
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2010-12-19 22:36:19 +00:00 |
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Stanislav Shwartsman
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48d94d6dc3
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optimization
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2010-12-18 11:58:16 +00:00 |
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Stanislav Shwartsman
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91ac0df65c
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implemented GS/FS BASE access instructions published in _319433-007.pdf document
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2010-07-22 16:41:59 +00:00 |
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Stanislav Shwartsman
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3dfcfd0ccd
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Split shift opcodes | optimize SAR opcode
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2010-05-18 07:28:05 +00:00 |
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Stanislav Shwartsman
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7319d2eee1
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FENCE instructions are SSE2 only
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2010-04-18 09:21:24 +00:00 |
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Stanislav Shwartsman
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43bc0f1f2b
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optimize some of x87 tables
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2010-04-16 19:52:44 +00:00 |
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Stanislav Shwartsman
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689ecc57dd
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split 2 more SSE opcodes
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2010-04-08 17:35:32 +00:00 |
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Stanislav Shwartsman
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df7db31fb4
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EPT + VPID - VMXx2 support
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2010-04-07 17:12:17 +00:00 |
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Stanislav Shwartsman
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b4cd188f07
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Update (c)
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2010-04-04 19:56:55 +00:00 |
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Stanislav Shwartsman
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01de3e1926
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PEXTRB/W/D/EXTRACTPS fixed
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2010-04-02 19:03:47 +00:00 |
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Stanislav Shwartsman
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2efb11f2bc
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fixes
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2010-03-30 18:12:19 +00:00 |
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Stanislav Shwartsman
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e88e168081
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bswap undefined behavior
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2010-03-19 10:00:48 +00:00 |
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Stanislav Shwartsman
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32e5f1ffc8
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fixes
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2010-02-25 22:44:46 +00:00 |
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Stanislav Shwartsman
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033a20b3b2
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allow to configure CPU features at runtime - implemened on example of SSE/AES/MOVBE/POPCNT
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2010-02-25 22:04:31 +00:00 |
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Stanislav Shwartsman
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50eb55d0f2
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introduce --enable-xapic configure option
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2010-02-24 20:59:49 +00:00 |
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Stanislav Shwartsman
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70dc124b3a
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1st step of moving CPU options to runtime
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2010-02-24 19:27:51 +00:00 |
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Stanislav Shwartsman
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5f89b554aa
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split few more opcodes
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2010-02-10 17:21:15 +00:00 |
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Stanislav Shwartsman
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cccbac3bb7
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bugfix
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2009-12-23 07:26:14 +00:00 |
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Stanislav Shwartsman
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c403090327
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! Implemented PCLMULQDQ AES instruction
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2009-12-20 09:00:40 +00:00 |
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Stanislav Shwartsman
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edaf19f0a1
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Split MOVQ_PqQq opcode
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2009-12-14 11:55:42 +00:00 |
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Stanislav Shwartsman
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553ca8af01
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split more SSE ops
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2009-11-25 20:49:47 +00:00 |
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Stanislav Shwartsman
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6819ab4eb7
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split sse opcodes
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2009-11-23 18:21:23 +00:00 |
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Stanislav Shwartsman
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78e4b3d616
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split SSE move instructions
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2009-10-24 11:17:51 +00:00 |
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Stanislav Shwartsman
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7254ea36a1
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copyright fixes + small optimization
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2009-10-14 20:45:29 +00:00 |
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Stanislav Shwartsman
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8e3276cf14
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split opcodes by ModC0
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2009-08-22 11:47:42 +00:00 |
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Stanislav Shwartsman
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9d4c24b6a3
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Split instruction 32/64
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2009-04-06 18:44:28 +00:00 |
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Stanislav Shwartsman
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e5be60be64
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Fixed lazy flags bug I added in one of my prev merges
ICACHE code reorganization
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2009-03-22 21:12:35 +00:00 |
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Stanislav Shwartsman
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f8185a6bc6
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Added Intel VMX emulation to Bochs CPU
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2009-01-31 10:43:24 +00:00 |
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Stanislav Shwartsman
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0325c120b2
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Separate PAUSE instruction from regular NOP
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2009-01-27 20:29:05 +00:00 |
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Stanislav Shwartsman
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62005d4fd9
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Minimize diff with VMX support branch
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2009-01-23 09:26:24 +00:00 |
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Stanislav Shwartsman
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9929e6ed78
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- updated FSF address
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2009-01-16 18:18:59 +00:00 |
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Stanislav Shwartsman
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bc381e51da
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very small cleanups
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2008-09-19 19:18:57 +00:00 |
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Stanislav Shwartsman
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c1306f7d75
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small non-significant speedups
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2008-09-06 21:10:40 +00:00 |
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Stanislav Shwartsman
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b96f78dc0a
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Some kind of big change in fetchdecode tables invented in order to compress the tables for better host data cache utilization
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2008-08-29 19:23:03 +00:00 |
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Stanislav Shwartsman
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a5a01c4b42
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optimize LEAVE operation
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2008-08-27 21:57:40 +00:00 |
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Stanislav Shwartsman
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70c7c5ceca
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Use LOAD_Eb approach to remove duplicated GbEb methods
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2008-08-11 20:34:05 +00:00 |
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Stanislav Shwartsman
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a8adb36dc2
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Implemented MOVBE Intel Atom(R) instruction
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2008-08-11 18:53:24 +00:00 |
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Stanislav Shwartsman
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b61017e5b6
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Split more opcodes using new LOAD technique
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2008-08-10 21:16:12 +00:00 |
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Stanislav Shwartsman
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1da5943f1a
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More use of LOAD_Ex method
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2008-08-10 19:34:28 +00:00 |
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Stanislav Shwartsman
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0d90ab0478
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Completely new way to handle LD+OP cases - allows to significantly reduce number of BX_CPU_C methods
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2008-08-09 21:05:07 +00:00 |
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Stanislav Shwartsman
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3f5efb6475
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Remove more duplicated methods
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2008-07-13 10:06:07 +00:00 |
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Stanislav Shwartsman
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0127415ba6
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Clear some duplicated arithmetic opcodes - difference only in operands order
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2008-07-13 09:59:59 +00:00 |
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Stanislav Shwartsman
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678ac970aa
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Reorganize ctrl_xfer8.cc code, allows to inline branch32 method
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2008-06-22 03:45:55 +00:00 |
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Stanislav Shwartsman
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46e9d09cbc
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Typo again :)
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2008-06-04 16:31:03 +00:00 |
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Stanislav Shwartsman
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4c93fd4a21
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Fixed typos (patch from @SF)
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2008-06-04 16:27:42 +00:00 |
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Stanislav Shwartsman
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7494b8823b
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- Support of AES CPU extensions, to enable configure with
--enable-aes option
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2008-05-30 20:35:08 +00:00 |
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Stanislav Shwartsman
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ed4be45a8b
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Split shift/rotate opcodes in 32-bit mode and 64-bit mode
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2008-05-02 22:47:07 +00:00 |
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Stanislav Shwartsman
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06c6ac0060
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- Fixed effective address wrap in 64-bit mode with 32-bit address size
- Fixed SMSW instruction in 32-bit and 64-bit modes
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2008-04-28 18:18:08 +00:00 |
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Stanislav Shwartsman
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76a8812876
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correct some opcode aliases
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2008-04-12 10:08:43 +00:00 |
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Stanislav Shwartsman
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1bdddc1f78
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Split SHRD/SHLD instructions
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2008-04-05 19:08:01 +00:00 |
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