split 2 more SSE opcodes
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.667 2010-04-08 15:50:39 sshwarts Exp $
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// $Id: cpu.h,v 1.668 2010-04-08 17:35:32 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2010 The Bochs Project
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@ -1988,8 +1988,10 @@ public: // for now...
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BX_SMF void MOVSS_VssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVSS_VssWssM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVSS_WssVssM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVHLPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVLPS_VpsMq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVLPS_MqVps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVLHPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVHPS_VpsMq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVHPS_MqVps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVAPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode.cc,v 1.264 2010-04-07 16:02:52 sshwarts Exp $
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// $Id: fetchdecode.cc,v 1.265 2010-04-08 17:35:32 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2009 The Bochs Project
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@ -480,11 +480,11 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
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#endif
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/* 0F 10 /wr */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsR, BxOpcodeGroupSSE_0f10R },
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/* 0F 11 /wr */ { BxPrefixSSE, BX_IA_MOVUPS_WpsVpsR, BxOpcodeGroupSSE_0f11R },
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/* 0F 12 /wr */ { BxPrefixSSE, BX_IA_MOVLPS_VpsMq, BxOpcodeGroupSSE_0f12R },
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/* 0F 12 /wr */ { BxPrefixSSE, BX_IA_MOVHLPS_VpsWpsR, BxOpcodeGroupSSE_0f12R },
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/* 0F 13 /wr */ { 0, BX_IA_ERROR }, // MOVLPS/PD SSE group
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/* 0F 14 /wr */ { BxPrefixSSE, BX_IA_UNPCKLPS_VpsWdq, BxOpcodeGroupSSE_0f14 },
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/* 0F 15 /wr */ { BxPrefixSSE, BX_IA_UNPCKHPS_VpsWdq, BxOpcodeGroupSSE_0f15 },
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/* 0F 16 /wr */ { BxPrefixSSE, BX_IA_MOVHPS_VpsMq, BxOpcodeGroupSSE_0f16R },
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/* 0F 16 /wr */ { BxPrefixSSE, BX_IA_MOVLHPS_VpsWpsR, BxOpcodeGroupSSE_0f16R },
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/* 0F 17 /wr */ { 0, BX_IA_ERROR }, // MOHLPS/PD SSE group
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#if BX_CPU_LEVEL >= 6
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/* 0F 18 /wr */ { 0, BX_IA_NOP }, // PREFETCH HINT
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@ -1031,11 +1031,11 @@ static const BxOpcodeInfo_t BxOpcodeInfo32R[512*2] = {
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#endif
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/* 0F 10 /dr */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsR, BxOpcodeGroupSSE_0f10R },
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/* 0F 11 /dr */ { BxPrefixSSE, BX_IA_MOVUPS_WpsVpsR, BxOpcodeGroupSSE_0f11R },
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/* 0F 12 /dr */ { BxPrefixSSE, BX_IA_MOVLPS_VpsMq, BxOpcodeGroupSSE_0f12R },
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/* 0F 12 /dr */ { BxPrefixSSE, BX_IA_MOVHLPS_VpsWpsR, BxOpcodeGroupSSE_0f12R },
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/* 0F 13 /dr */ { 0, BX_IA_ERROR }, // MOVLPS/PD SSE group
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/* 0F 14 /dr */ { BxPrefixSSE, BX_IA_UNPCKLPS_VpsWdq, BxOpcodeGroupSSE_0f14 },
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/* 0F 15 /dr */ { BxPrefixSSE, BX_IA_UNPCKHPS_VpsWdq, BxOpcodeGroupSSE_0f15 },
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/* 0F 16 /dr */ { BxPrefixSSE, BX_IA_MOVHPS_VpsMq, BxOpcodeGroupSSE_0f16R },
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/* 0F 16 /dr */ { BxPrefixSSE, BX_IA_MOVLHPS_VpsWpsR, BxOpcodeGroupSSE_0f16R },
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/* 0F 17 /dr */ { 0, BX_IA_ERROR }, // MOHLPS/PD SSE group
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#if BX_CPU_LEVEL >= 6
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/* 0F 18 /dr */ { 0, BX_IA_NOP }, // PREFETCH HINT
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode64.cc,v 1.259 2010-03-31 14:03:06 sshwarts Exp $
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// $Id: fetchdecode64.cc,v 1.260 2010-04-08 17:35:32 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2009 The Bochs Project
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@ -435,11 +435,11 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
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#endif
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/* 0F 10 /wr */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsR, BxOpcodeGroupSSE_0f10R },
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/* 0F 11 /wr */ { BxPrefixSSE, BX_IA_MOVUPS_WpsVpsR, BxOpcodeGroupSSE_0f11R },
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/* 0F 12 /wr */ { BxPrefixSSE, BX_IA_MOVLPS_VpsMq, BxOpcodeGroupSSE_0f12R },
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/* 0F 12 /wr */ { BxPrefixSSE, BX_IA_MOVHLPS_VpsWpsR, BxOpcodeGroupSSE_0f12R },
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/* 0F 13 /wr */ { 0, BX_IA_ERROR }, // MOVLPS/PD SSE group
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/* 0F 14 /wr */ { BxPrefixSSE, BX_IA_UNPCKLPS_VpsWdq, BxOpcodeGroupSSE_0f14 },
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/* 0F 15 /wr */ { BxPrefixSSE, BX_IA_UNPCKHPS_VpsWdq, BxOpcodeGroupSSE_0f15 },
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/* 0F 16 /wr */ { BxPrefixSSE, BX_IA_MOVHPS_VpsMq, BxOpcodeGroupSSE_0f16R },
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/* 0F 16 /wr */ { BxPrefixSSE, BX_IA_MOVLHPS_VpsWpsR, BxOpcodeGroupSSE_0f16R },
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/* 0F 17 /wr */ { 0, BX_IA_ERROR }, // MOHLPS/PD SSE group
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/* 0F 18 /wr */ { 0, BX_IA_NOP }, // PREFETCH HINT
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/* 0F 19 /wr */ { 0, BX_IA_NOP }, // multi-byte NOP
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@ -954,11 +954,11 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
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#endif
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/* 0F 10 /dr */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsR, BxOpcodeGroupSSE_0f10R },
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/* 0F 11 /dr */ { BxPrefixSSE, BX_IA_MOVUPS_WpsVpsR, BxOpcodeGroupSSE_0f11R },
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/* 0F 12 /dr */ { BxPrefixSSE, BX_IA_MOVLPS_VpsMq, BxOpcodeGroupSSE_0f12R },
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/* 0F 12 /dr */ { BxPrefixSSE, BX_IA_MOVHLPS_VpsWpsR, BxOpcodeGroupSSE_0f12R },
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/* 0F 13 /dr */ { 0, BX_IA_ERROR }, // MOVLPS/PD SSE group
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/* 0F 14 /dr */ { BxPrefixSSE, BX_IA_UNPCKLPS_VpsWdq, BxOpcodeGroupSSE_0f14 },
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/* 0F 15 /dr */ { BxPrefixSSE, BX_IA_UNPCKHPS_VpsWdq, BxOpcodeGroupSSE_0f15 },
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/* 0F 16 /dr */ { BxPrefixSSE, BX_IA_MOVHPS_VpsMq, BxOpcodeGroupSSE_0f16R },
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/* 0F 16 /dr */ { BxPrefixSSE, BX_IA_MOVLHPS_VpsWpsR, BxOpcodeGroupSSE_0f16R },
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/* 0F 17 /dr */ { 0, BX_IA_ERROR }, // MOHLPS/PD SSE group
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/* 0F 18 /dr */ { 0, BX_IA_NOP }, // PREFETCH HINT
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/* 0F 19 /dr */ { 0, BX_IA_NOP }, // multi-byte NOP
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@ -1473,11 +1473,11 @@ static const BxOpcodeInfo_t BxOpcodeInfo64R[512*3] = {
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#endif
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/* 0F 10 /qr */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsR, BxOpcodeGroupSSE_0f10R },
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/* 0F 11 /qr */ { BxPrefixSSE, BX_IA_MOVUPS_WpsVpsR, BxOpcodeGroupSSE_0f11R },
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/* 0F 12 /qr */ { BxPrefixSSE, BX_IA_MOVLPS_VpsMq, BxOpcodeGroupSSE_0f12R },
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/* 0F 12 /qr */ { BxPrefixSSE, BX_IA_MOVHLPS_VpsWpsR, BxOpcodeGroupSSE_0f12R },
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/* 0F 13 /qr */ { 0, BX_IA_ERROR }, // MOVLPS/PD SSE group
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/* 0F 14 /qr */ { BxPrefixSSE, BX_IA_UNPCKLPS_VpsWdq, BxOpcodeGroupSSE_0f14 },
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/* 0F 15 /qr */ { BxPrefixSSE, BX_IA_UNPCKHPS_VpsWdq, BxOpcodeGroupSSE_0f15 },
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/* 0F 16 /qr */ { BxPrefixSSE, BX_IA_MOVHPS_VpsMq, BxOpcodeGroupSSE_0f16R },
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/* 0F 16 /qr */ { BxPrefixSSE, BX_IA_MOVLHPS_VpsWpsR, BxOpcodeGroupSSE_0f16R },
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/* 0F 17 /qr */ { 0, BX_IA_ERROR }, // MOHLPS/PD SSE group
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/* 0F 18 /qr */ { 0, BX_IA_NOP }, // PREFETCH HINT
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/* 0F 19 /qr */ { 0, BX_IA_NOP }, // multi-byte NOP
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: ia_opcodes.h,v 1.45 2010-04-07 17:12:17 sshwarts Exp $
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// $Id: ia_opcodes.h,v 1.46 2010-04-08 17:35:32 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2008-2010 Stanislav Shwartsman
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@ -954,8 +954,10 @@ bx_define_opcode(BX_IA_MOVUPS_WpsVpsM, &BX_CPU_C::MOVUPS_WpsVpsM, NULL, BX_CPU_S
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bx_define_opcode(BX_IA_MOVSS_VssWssR, &BX_CPU_C::MOVSS_VssWssR, NULL, BX_CPU_SSE)
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bx_define_opcode(BX_IA_MOVSS_VssWssM, &BX_CPU_C::MOVSS_VssWssM, NULL, BX_CPU_SSE)
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bx_define_opcode(BX_IA_MOVSS_WssVssM, &BX_CPU_C::MOVSS_WssVssM, NULL, BX_CPU_SSE)
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bx_define_opcode(BX_IA_MOVHLPS_VpsWpsR, &BX_CPU_C::MOVHLPS_VpsWpsR, NULL, BX_CPU_SSE)
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bx_define_opcode(BX_IA_MOVLPS_VpsMq, &BX_CPU_C::MOVLPS_VpsMq, NULL, BX_CPU_SSE)
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bx_define_opcode(BX_IA_MOVLPS_MqVps, &BX_CPU_C::MOVLPS_MqVps, NULL, BX_CPU_SSE)
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bx_define_opcode(BX_IA_MOVLHPS_VpsWpsR, &BX_CPU_C::MOVLHPS_VpsWpsR, NULL, BX_CPU_SSE)
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bx_define_opcode(BX_IA_MOVHPS_VpsMq, &BX_CPU_C::MOVHPS_VpsMq, NULL, BX_CPU_SSE)
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bx_define_opcode(BX_IA_MOVHPS_MqVps, &BX_CPU_C::MOVHPS_MqVps, NULL, BX_CPU_SSE)
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bx_define_opcode(BX_IA_MOVAPS_VpsWpsR, &BX_CPU_C::MOVAPS_VpsWpsR, NULL, BX_CPU_SSE)
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/////////////////////////////////////////////////////////////////////////
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// $Id: sse_move.cc,v 1.116 2010-04-03 05:59:07 sshwarts Exp $
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// $Id: sse_move.cc,v 1.117 2010-04-08 17:35:32 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2003-2009 Stanislav Shwartsman
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@ -516,23 +516,25 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSD_VsdWsdR(bxInstruction_c *i)
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#endif
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}
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/* MOVHLPS: 0F 12 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVHLPS_VpsWpsR(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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BX_CPU_THIS_PTR prepareSSE();
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BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), BX_READ_XMM_REG_HI_QWORD(i->rm()));
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#endif
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}
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/* MOVLPS: 0F 12 */
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/* MOVLPD: 66 0F 12 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVLPS_VpsMq(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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BX_CPU_THIS_PTR prepareSSE();
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Bit64u val64;
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if (i->modC0()) /* MOVHLPS xmm1, xmm2 opcode */
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{
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val64 = BX_READ_XMM_REG_HI_QWORD(i->rm());
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}
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else {
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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val64 = read_virtual_qword(i->seg(), eaddr);
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}
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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Bit64u val64 = read_virtual_qword(i->seg(), eaddr);
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/* now write result back to destination */
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BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), val64);
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@ -630,23 +632,25 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVLPS_MqVps(bxInstruction_c *i)
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#endif
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}
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/* MOVLHPS: 0F 16 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVLHPS_VpsWpsR(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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BX_CPU_THIS_PTR prepareSSE();
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BX_WRITE_XMM_REG_HI_QWORD(i->nnn(), BX_READ_XMM_REG_LO_QWORD(i->rm()));
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#endif
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}
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/* MOVHPS: 0F 16 */
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/* MOVHPD: 66 0F 16 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVHPS_VpsMq(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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BX_CPU_THIS_PTR prepareSSE();
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Bit64u val64;
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if (i->modC0()) /* MOVLHPS xmm1, xmm2 opcode */
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{
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val64 = BX_READ_XMM_REG_LO_QWORD(i->rm());
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}
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else {
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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val64 = read_virtual_qword(i->seg(), eaddr);
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}
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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Bit64u val64 = read_virtual_qword(i->seg(), eaddr);
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/* now write result back to destination */
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BX_WRITE_XMM_REG_HI_QWORD(i->nnn(), val64);
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