Connectivity Products:
ABP510/5150 - Bus-Master ISA (240 CDB) (Footnote 1)
ABP5140 - Bus-Master ISA (16 CDB) (Footnote 1) (Footnote 2)
ABP5142 - Bus-Master ISA with floppy (16 CDB) (Footnote 3)
Single Channel Products:
ABP542 - Bus-Master ISA with floppy (240 CDB)
Footnotes:
1. This board has been shipped by HP with the 4020i CD-R drive.
The board has no BIOS so it cannot control a boot device, but
it can control any secondary SCSI device.
2. This board has been sold by SIIG as the i540 SpeedMaster.
3. This board has been sold by SIIG as the i542 SpeedMaster.
the arguments are changed so the address is first and the ASI second so we
can have the address in %o0:%o1 and not worry about unused registers.
Also a bit of copyright cleanup.
non-cached. XXX clean this up by looking at the "non-cacheable" bit of
the full physical address.
avoid having 'nbuf' change between calls to `mdallocsys()' by setting it
in mdallocsys() like the MI allocsys() does. XXX fix this too!
fix some printf lossage.
update for probeget() changes -- though bus_space_probe() appears to be
unused on the sparc64.
looking up a kernel address, check to see if the address is on this
"interrupt-safe" list. If so, return failure immediately. This prevents
a locking screw if a page fault is taken on an interrupt-safe map in or
out of interrupt context.
device declaration, we don't want it). pull in psycho, pci,
ata and pciide code. clock, eeprom and power attach at sbus
*and* ebus now (clock as `eeprom' works). add `lpt at ebus',
wd major number, and other misc. commented devices.
looking up a kernel address, check to see if the address is on this
"interrupt-safe" list. If so, return failure immediately. This prevents
a locking screw if a page fault is taken on an interrupt-safe map in or
out of interrupt context.
before the elimination of typematic events.
This fixes the case where the "extended" prefix was not ignored and
affected the next keystroke. (seen with the AltGr key)
(`SUNW,sabre') for now, and it doesn't really quite work there yet anyway.
the bus space/dma code is cloned from the sbus driver. the IOMMU code also
is cloned from the sbus code, but separated out into iommu.c so that we can
share it with the sbus driver. hopefully, much of the bus space/dma code
can also be re-shared with the sbus driver and the ebus driver but for now
these copies will do.
support for the real UltraSPARC PCI (`SUNW,psycho') is unwritten, though
most of this code is shared with it.
we can probe PCI config space and try to configue devices, but interrupts
don't work yet...
the bus space/dma code is cloned from the PCI code to do the same thing
which itself was cloned from the sbus bus space/dma code. the bus dma
code is non-functional at this point.
component failures! Also: remember to configure the disk queues for
the spares -- failure to do that is Bad(tm).
Huge Thanks to Martin Laubach for helping track this down.
setting recursive has no effect! The kernel lock manager doesn't allow
an exclusive recursion into a shared lock. This situation must simply
be avoided. The only place where this might be a problem is the (ab)use
of uvm_map_pageable() in the Utah-derived pmaps for m68k (they should
either toss the iffy scheme they use completely, or use something like
uvm_fault_wire()).
In addition, once we have looped over uvm_fault_wire(), only upgrade to
an exclusive (write) lock if we need to modify the map again (i.e.
wiring a page failed).
don't unlock a kernel map (!!!) and then relock it later; a recursive lock,
as it used in the user map case, is fine. Also, don't change map entries
while only holding a read lock on the map. Instead, if we fail to wire
a page, clear recursive locking, and upgrade back to a write lock before
dropping the wiring count on the remaining map entries.
bytes/sector correctly.
Submitted by Detlev Würkner in PR 7653.
Non-trivial merge with the 1.30 change (handle old AmigaDOS fs partitions
with simulated sectorsperblock > 1) by myself, so don't blame Detlev if it
doesn't work (but I checked!).
XXX We still need changes to the file systems to handle this fully.
at levels 5 (sound) and 6 (via1) on the Q700.
Raise splhigh when reading and writing registers. It's ugly, but it's
possible that we could get an interrupt from a higher-level source,
causing a re-read of a memory location.
This is not good when, e.g., we are reading the interrupt register.
Ideally, we would just raise splhigh() in ncr53c9x_readregs(), but
that's m.i. code, and it may be expensive on other architectures.
will DTRT with vnodes marked VDIROP. In particular, the message
"flushing VDIROP" will no longer appear, and the filesystem will remain
stable in the event of a crash.
This was particularly a problem with NFS-exported LFSes, since fsync
was called on every file close.
I've fixed most (not all) m68k FPE bugs that give bogus
calculation results, esp. fsqrt instruction. Also, the internal FP
representation has been reduced from 115-bit mantissa to 67-bit
mantissa which reduced the required mantissa operation roughly by one
fourth. I've done an extensive (though not exhaustive - it's
impossible!) test on the internal routines by feeding them randomly
generated FP numbers, and found that the new code is more precise than
MC68040 FPU (it seems to have a rounding bug).
[ Only change was to keep fpu_calcea.c's name instead of renaming to
fpu_ea.c in Ken's patch. --akb ]
instead of ldstub, but since we aren't doing n-way locking it makes little
difference. N.B. Need to decide what to do with sparc64/sparc64/asm.h which
has name conflicts with sparc64/include/asm.h. So far most of
sparc64/sparc64/asm.h has been moved to ctlreg.h.
after various m_adj()s have been done. Kludge around this with a cheesy
macro that knows where the drivers put the mac header in the first mbuf.
XXX There should be a better way to do this.
is a muting control, not a level control, change the name to reflect that.
XXX The fact that the audio code depends on the string names of the
XXX mixer devices is bogus.
(1) Fix sense of a strcmp() test so that the monitor subdevice of the
mixer is properly identified.
(2) Use hw_if->set_port() instead of hw_if->get_port() when changinh
the monitor level in audiosetinfo().
Fixes PR kern/7661.
TLBUpdate() routine is used for dual purposes. In TLBmod case, just ok
to call 'tlbwi' (as designed). Result in saving of extraneous execution
path. MIPS1 only this moment.
locks (and thus, never shared locks). Move the "set/clear recursive"
functions to uvm_map.c, which is the only placed they're used (and
they should go away anyhow). Delete some unused cruft.
right access_type to pass to uvm_fault_wire(). This way, if the entry has
VM_PROT_WRITE, and the entry is marked COW, the copy will happen immediately
in uvm_fault(), as if the access were performed.
access_type to pmap_enter() to ensure that when these mappings are accessed,
possibly in interrupt context, that they won't cause mod/ref emulation
page faults.
has PAGEABLE and INTRSAFE flags. PAGEABLE now really means "pageable",
not "allocate vm_map_entry's from non-static pool", so update all map
creations to reflect that. INTRSAFE maps are maps that are used in
interrupt context (e.g. kmem_map, mb_map), and thus use the static
map entry pool (XXX as does kernel_map, for now). This will eventually
change now these maps are locked, as well.
ensure we don't take mod/ref emulation faults in an interrupt context
(e.g. during the i/o operation). This is safe because:
- For a pageout operation, the page is already known to be
modified, and the pagedaemon will pmap_clear_modify() after
the pageout has completed.
- For a pagein operation, pagers must already pmap_clear_modify()
after the pagein operation is complete, because the i/o may have
been done with e.g. programmed i/o.
XXX It would be nice to know the i/o direction so that we can call
XXX pmap_enter() with only the protection and access_type necessary.
vslocking here?! copyout() on its own seems to suffice just about everwhere
else, and it's not like the process is going to exit; it's in a system
call!
to uvm_fault_wire(), to guarantee that the kernel stacks will not
cause even a mod/ref emulation fault.
- uvm_vslock(): pass VM_PROT_NONE until this function is updated.
managed pages, into KVA space. Since the pages are managed, we should
use pmap_enter(), not pmap_kenter_pa().
Also, when entering the mappings, enter with an access_type of
VM_PROT_READ | VM_PROT_WRITE. We do this for a couple of reasons:
(1) On systems that have H/W mod/ref attributes, the hardware
may not be able to track mod/ref done by a bus master.
(2) On systems that have to do mod/ref emulation, this prevents
a mod/ref page fault from potentially happening while in an
interrupt context, which can be problematic.
This latter change is fairly important if we ever want to be able to
transfer DMA-safe memory pages to anonymous memory objects; we will need
to know that the pages are modified, or else data could be lost!
Note that while the pages are unowned (i.e. "just DMA-safe memory pages"),
they won't consume any swap resources, as the mappings are wired, and
the pages aren't on the active or inactive queues.
which can be used in an interrupt context. Use pmap_kenter*() and
pmap_kremove() only for mappings owned by these objects.
Fixes some locking protocol issues related to MP support, and eliminates
all of the pmap_enter vs. pmap_kremove inconsistencies.
routines now reside in locore.S. No functional difference is expected.
- Replace abused splx() abuse with _splset() to change MIPS processor
interrupt mask bit. 'mips/trap.c' side will be fixed soon.
are still owned by the object which is paging, and so the test for a kernel
object in uvm_unmap_remove() will cause pmap_remove() to be used instead
of pmap_kremove().
This was a MAJOR source of pmap_remove() vs pmap_kremove() inconsistency
(which caused the busted kernel pmap statistics, and a cause of much
locking hair on MP systems).
context, so we must block interrupts which may cause memory allocation
before asserting the kernel pmap's lock. Put this all in PMAP_LOCK()
and PMAP_UNLOCK() macros to make it easier.
level directly, instead of making the caller wrap the calls in
splimp()/splx().
- Add a comment documenting that interrupts that cause memory allocation
must be blocked while the free page queue is locked.
Since interrupts must be blocked while this lock is asserted, tying them
together like this helps to prevent mistakes.
- Make it compile again, with BPF.
- Don't subtract the Ethernet header length from the total packet length.
- Copy the alignment fix from sys/dev/ic/i82586.c (though the m68k shouldn't
really be affected).
(correct name, vax?) replacing mips1_TLBFlushAddr and mips1_TLBUpdate,
respectively. New codes always use current ASID holded in EntryHi
register. In most occations, the register already contains a necessary
value before (re-)written, ugh. 'sva | asid' ops for their arguments are
now verbose, to be removed when MIPS3 side changes are done.
end of the mappable kernel virtual address space. Previously, it would
get called more often than necessary, because the caller only new what
was requested.
Also, export uvm_maxkaddr so that uvm_pageboot_alloc() can grow the
kernel pmap if necessary, as well. Note that pmap_growkernel() must
now be able to handle being called before pmap_init().
end of the mappable kernel virtual address space. Previously, it would
get called more often than necessary, because the caller only new what
was requested.
Also, export uvm_maxkaddr so that uvm_pageboot_alloc() can grow the
kernel pmap if necessary, as well. Note that pmap_growkernel() must
now be able to handle being called before pmap_init().
'pm_asid' member of 'pmap' structure is assigned a new value after
uvmspace_alloc() provides afresh pmap.
- ASID generation number 0 is not a reserved value anymore.
processor is one of processors with no 'referenced bit' nor 'modified bit'
processor machinary. Those functions are implemented combining two
hardware bits, 'dirty bit' and 'valid bit', with TLBmod exception handler.
the kernel can get a 'protection fault trap' later. Enable the 32 bits I/O
test conditionally on a config flag, disabled by default (problem
reported by kurt.schreiner@uni-mainz.de).
per process user spaces, replacing mips1_TBLFlush(). This reserves
kernel space TLB entries when TLBPID generation number about to wrap.
- Correct comments a bit, nuke unused routines.
releasing any swap resources. if we don't do this, we can
end up with a clean, swap-backed page, which is illegal.
tracked down by Bill Sommerfeld, fixes PR 7578.
directly, call the function pointer (*if_input)(ifp, m). The input routine
expects the packet header to be at the head of the packet, and will adjust
as necessary. Privatize the layer 2 input and output routines, allowing
*_ifattach() to set them up as appropriate.
initialization code.
- Abandon mips_init_proc0() and do the 4 lines straightly in MD mach_init().
- Restore a block of code accidentally lost in prevous commit.
- Change the term 'tlbpid' to a MIPS3 nomenclature 'asid'.
- Hide PTE size exposures by symbolic names in locore.S
umap_unlock()) so as to not explicitly depend on nullfs being compiled
into the kernel.
umap_bypass won't be too slow as there are no credentials in these two ops
to need mapping.
serious race condition in sosend(). Upon closer inspection, the appropriate
flags are checked within splsoftnet() for soreceive(), so no change needed
there. Also a little KNFing in sosend().
headaches.
Now console keyboard and display are connected at autoconfiguration time,
when the last of them is found. Other keyboards / displays remain
unconnected until a new ioctl (WSDISPLAYIO_SETKEYBOARD) is called.
with IEEE, so use the "real" OUIs for definitions.
Now unfortunately vendors differ in how the MII ID register bits are
used wrt bit and byte ordering. There is a straightforward way - bits
numbered from LSB to MSB - used by AMD, Intel, NS and QS. This is used
by the current MII_OUI() conversion macro. ICS, Seeq, SiS and TI count
the bits as they appear on the wire, and some differ completely.
Account for these cases by "xx" prefixed OUI definitions which compensate
for this, so the MII_OUI() macro can still be used.
Add AMD (the "real" AMD this time) and the 79c973 PCnet internal PHY.
interface border, so that other serial interfaces can be attached to the
ms/kbd. zero functional changes and mostly involves moving code around
a bit. tested on the SS2.
this is necessary to attach the PCI ultrasparc keyboard/mouse drivers.
firmware sets the "stdin" property of /chosen to be a pseudo-hid (yes, they
even spell it incorrectly) that merges all keyboard input into one stream,
so we can't find the USB controller we're attached to. Instead, just give
it to the first USB keyboard found during autoconfiguration. So that we
have SOMETHING available early on, use OpenFirmware i/o to do keyboard
input to the console wsdisplay until the USB code attaches the keyboard.
From Jason Thorpe <thorpej@nas.nasa.gov>
the code to pick the first USB keyboard instance as the console, ignoring
which USB controller it's on. Should eventually allow detaching of the
console keyboard.
From Jason Thorpe <thorpej@nas.nasa.gov>
the child inherits the stack pointer from the parent (traditional
behavior). Like the signal stack, the stack area is secified as
a low address and a size; machine-dependent code accounts for stack
direction.
This is required for clone(2).
netbooting on machines that can't netboot a fullsize kernel.
This is only a stop-gap solution until the pmax gets a working two stage
netboot, and is not enabled by default.
parent, specified at fork time. Specify a new flag to wait4(2), WALTSIG,
to wait for processes which use an alternate exit signal.
This is required for clone(2).
which set the LDT and share VM space (e.g. new versions of WINE) expect
the LDT to be logically coupled to the address space. Use the new pmap_fork()
interface to copy non-shared user-set LDTs when the address space is forked.
uvmspace_fork().
pmap_fork() is used to "fork a pmap", that is copy data from one pmap
to the other that is NOT related to actual mappings in the pmap, but is
otherwise logically coupled to the address space.
(e.g., the 1240). Include the new 1080/1240 NVRAM layout reading code. Some
moderately significant mailbox changes were necessary also to accomodate a
second channel.
and "pass-filter" and "inbound" and "outbound" qualifiers in the filter
expression, use new "active-filter-in", "active-filter-out", "pass-filter-in",
and "pass-filter-out" without these qualifiers.
This is necessary due to the horrible, awful way "inbound" and "outbound"
were specified for the filter programs when a packet was passed through them.
Basically, the "address" byte in the serial PPP header was overwritten with
a value to indicate the direction. However, the "address" byte doesn't even
exist on PPP headers for all other PPP encaps! So, this old method worked
only for serial encaps, and corrupted packets for all others (PPPoE, ATM, etc.)
-a subregion start was ignored if all previous allocations were before
the subregion, reported by Lennart Augustsson in PR kern/7539
-an existing allocation which overlaps the beginning of the subregion
was ignored (ie overlapped) if is is not the last allocation
to serial encap, change its data link type to DLT_PPP_SERIAL.
* Work around some serious bogosity in the filtering code which utterly
breaks proper functioning of BPF. The PPP code and pppd(8) WILL be changed
to fix this.
macro was lost. For lack of the macro, the function was lost. For lack
of the function, the syscall was lost. For lack of the syscall, the
application was lost. For lack of the application, my time was lost.
dante