Well, looks like the MI allocsys() broke the dvmamap, so instead of using a
single map move it to the bus controller driver so each bus can handle its own IOMMU without conflicts.
This commit is contained in:
eeh
parent
bb0f8ef559
commit
60b89ebf96
@ -1,4 +1,4 @@
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/* $NetBSD: sbus.c,v 1.11 1999/03/26 23:41:36 mycroft Exp $ */
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/* $NetBSD: sbus.c,v 1.12 1999/05/22 20:33:56 eeh Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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@ -86,6 +86,7 @@
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/extent.h>
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#include <sys/malloc.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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@ -307,9 +308,19 @@ sbus_attach(parent, self, aux)
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*
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* The sun4u iommu is part of the SBUS controller so we will
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* deal with it here. We could try to fake a device node so
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* we can eventually share it with the PCI bus run by psyco,
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* we can eventually share it with the PCI bus run by psycho,
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* but I don't want to get into that sort of cruft.
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*
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* First we need to allocate a IOTSB. Problem is that the IOMMU
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* can only access the IOTSB by physical address, so all the
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* pages must be contiguous. Luckily, the smallest IOTSB size
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* is one 8K page.
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*/
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#if 1
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sc->sc_tsbsize = 0;
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sc->sc_tsb = malloc(NBPG, M_DMAMAP, M_WAITOK);
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sc->sc_ptsb = pmap_extract(pmap_kernel(), (vaddr_t)sc->sc_tsb);
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#else
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/*
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* All IOMMUs will share the same TSB which is allocated in pmap_bootstrap.
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@ -325,6 +336,7 @@ sbus_attach(parent, self, aux)
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sc->sc_tsb = iotsb;
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sc->sc_ptsb = iotsbp;
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}
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#endif
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#if 1
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/* Need to do 64-bit stores */
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bus_space_write_8(sc->sc_bustag, &sc->sc_sysio->sys_iommu.iommu_cr,
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@ -364,6 +376,22 @@ sbus_attach(parent, self, aux)
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stxa(&sc->sc_sysio->sys_strbuf.strbuf_ctl,ASI_NUCLEUS,STRBUF_EN);
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#endif
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/*
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* Now all the hardware's working we need to allocate a dvma map.
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*
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* The IOMMU address space always ends at 0xffffe000, but the starting
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* address depends on the size of the map. The map size is 1024 * 2 ^
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* sc->sc_tsbsize entries, where each entry is 8 bytes. The start of
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* the map can be calculated by (0xffffe000 << (8 + sc->sc_tsbsize)).
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*
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* Note: the stupid IOMMU ignores the high bits of an address, so a
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* NULL DMA pointer will be translated by the first page of the IOTSB.
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* To trap bugs we'll skip the first entry in the IOTSB.
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*/
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sc->sc_dvmamap = extent_create("SBus dvma", /* XXXX should have instance number */
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IOTSB_VSTART(sc->sc_tsbsize) + NBPG, IOTSB_VEND,
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M_DEVBUF, 0, 0, EX_NOWAIT);
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/*
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* Loop through ROM children, fixing any relative addresses
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* and then configuring each device.
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@ -579,7 +607,7 @@ sbusreset(sbus)
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}
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#if 1
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/* Reload iommu regs */
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bus_space_write_8(sc->ma_bustag, &sc->sc_sysio->sys_iommu.iommu_cr,
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bus_space_write_8(sc->sc_bustag, &sc->sc_sysio->sys_iommu.iommu_cr,
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0, (IOMMUCR_TSB1K|IOMMUCR_8KPG|IOMMUCR_EN));
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bus_space_write_8(sc->sc_bustag, &sc->sc_sysio->sys_iommu.iommu_tsb,
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0, sc->sc_ptsb);
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@ -621,6 +649,10 @@ sbus_enter(sc, va, pa, flags)
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stxa(&(sc->sc_sysio->sys_strbuf.strbuf_pgflush), ASI_NUCLEUS, va);
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#endif
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sbus_flush(sc);
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#ifdef DEBUG
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if (sbusdebug & SDB_DVMA)
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printf("Clearing TSB slot %d for va %p\n", (int)IOTSBSLOT(va,sc->sc_tsbsize), va);
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#endif
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sc->sc_tsb[IOTSBSLOT(va,sc->sc_tsbsize)] = tte;
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#if 1
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bus_space_write_8(sc->sc_bustag, &sc->sc_sysio->sys_iommu.iommu_flush,
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@ -950,7 +982,7 @@ sbus_alloc_bustag(sc)
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bzero(sbt, sizeof *sbt);
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sbt->cookie = sc;
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sbt->parent = sc->sc_bustag;
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sbt->type = ASI_PRIMARY;
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sbt->type = SBUS_BUS_SPACE;
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sbt->sparc_bus_map = _sbus_bus_map;
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sbt->sparc_bus_mmap = sbus_bus_mmap;
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sbt->sparc_intr_establish = sbus_intr_establish;
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@ -1000,10 +1032,11 @@ sbus_dmamap_load(t, map, buf, buflen, p, flags)
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struct proc *p;
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int flags;
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{
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int err;
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int err, s;
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bus_size_t sgsize;
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paddr_t curaddr;
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vaddr_t dvmaddr, vaddr = (vaddr_t)buf;
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u_long dvmaddr;
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vaddr_t vaddr = (vaddr_t)buf;
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pmap_t pmap;
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struct sbus_softc *sc = (struct sbus_softc *)t->_cookie;
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@ -1014,9 +1047,59 @@ sbus_dmamap_load(t, map, buf, buflen, p, flags)
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#endif
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bus_dmamap_unload(t, map);
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}
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if ((err = bus_dmamap_load(t->_parent, map, buf, buflen, p, flags)))
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#if 1
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/*
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* Make sure that on error condition we return "no valid mappings".
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*/
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map->dm_nsegs = 0;
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if (buflen > map->_dm_size)
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#ifdef DEBUG
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{
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printf("_bus_dmamap_load(): error %d > %d -- map size exceeded!\n", buflen, map->_dm_size);
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Debugger();
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return (EINVAL);
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}
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#else
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return (EINVAL);
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#endif
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sgsize = round_page(buflen + ((int)vaddr & PGOFSET));
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/*
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* XXX Need to implement "don't dma across this boundry".
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*/
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s = splhigh();
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err = extent_alloc(sc->sc_dvmamap, sgsize, NBPG,
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map->_dm_boundary, EX_NOWAIT, (u_long *)&dvmaddr);
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splx(s);
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if (err != 0)
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return (err);
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#ifdef DEBUG
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if (dvmaddr == (bus_addr_t)-1)
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{
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printf("_bus_dmamap_load(): dvmamap_alloc(%d, %x) failed!\n", sgsize, flags);
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Debugger();
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}
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#endif
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if (dvmaddr == (bus_addr_t)-1)
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return (ENOMEM);
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/*
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* We always use just one segment.
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*/
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map->dm_mapsize = buflen;
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map->dm_nsegs = 1;
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map->dm_segs[0].ds_addr = dvmaddr + (vaddr & PGOFSET);
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map->dm_segs[0].ds_len = sgsize;
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#else
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if ((err = bus_dmamap_load(t->_parent, map, buf, buflen, p, flags)))
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return (err);
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#endif
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if (p != NULL)
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pmap = p->p_vmspace->vm_map.pmap;
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else
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@ -1060,7 +1143,9 @@ sbus_dmamap_unload(t, map)
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bus_dmamap_t map;
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{
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vaddr_t addr;
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int len;
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int len, error, s;
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bus_addr_t dvmaddr;
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bus_size_t sgsize;
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struct sbus_softc *sc = (struct sbus_softc *)t->_cookie;
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if (map->dm_nsegs != 1)
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@ -1075,7 +1160,25 @@ sbus_dmamap_unload(t, map)
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map, (long)addr, (long)len);
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#endif
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sbus_remove(sc, addr, len);
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#if 1
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dvmaddr = (map->dm_segs[0].ds_addr & ~PGOFSET);
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sgsize = map->dm_segs[0].ds_len;
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/* Mark the mappings as invalid. */
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map->dm_mapsize = 0;
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map->dm_nsegs = 0;
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/* Unmapping is bus dependent */
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s = splhigh();
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error = extent_free(sc->sc_dvmamap, dvmaddr, sgsize, EX_NOWAIT);
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splx(s);
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if (error != 0)
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printf("warning: %ld of DVMA space lost\n", (long)sgsize);
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cache_flush((caddr_t)dvmaddr, (u_int) sgsize);
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#else
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bus_dmamap_unload(t->_parent, map);
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#endif
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}
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@ -1177,11 +1280,11 @@ sbus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
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int flags;
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{
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paddr_t curaddr;
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bus_addr_t dvmaddr;
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u_long dvmaddr;
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vm_page_t m;
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struct pglist *mlist;
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int error;
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int n;
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int n, s;
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struct sbus_softc *sc = (struct sbus_softc *)t->_cookie;
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if ((error = bus_dmamem_alloc(t->_parent, size, alignment,
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@ -1192,12 +1295,24 @@ sbus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
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* Allocate a DVMA mapping for our new memory.
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*/
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for (n=0; n<*rsegs; n++) {
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#if 1
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s = splhigh();
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if (extent_alloc(sc->sc_dvmamap, segs[0].ds_len, alignment,
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boundary, EX_NOWAIT, (u_long *)&dvmaddr)) {
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splx(s);
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/* Free what we got and exit */
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bus_dmamem_free(t->_parent, segs, nsegs);
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return (ENOMEM);
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}
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splx(s);
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#else
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dvmaddr = dvmamap_alloc(segs[0].ds_len, flags);
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if (dvmaddr == (bus_addr_t)-1) {
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/* Free what we got and exit */
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bus_dmamem_free(t->_parent, segs, nsegs);
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return (ENOMEM);
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}
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#endif
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segs[n].ds_addr = dvmaddr;
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size = segs[n].ds_len;
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mlist = segs[n]._ds_mlist;
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@ -1205,6 +1320,11 @@ sbus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
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/* Map memory into DVMA space */
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for (m = mlist->tqh_first; m != NULL; m = m->pageq.tqe_next) {
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curaddr = VM_PAGE_TO_PHYS(m);
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#ifdef DEBUG
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if (sbusdebug & SDB_DVMA)
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printf("sbus_dmamem_alloc: map %p loading va %lx at pa %lx\n",
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(long)m, (long)dvmaddr, (long)(curaddr & ~(NBPG-1)));
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#endif
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sbus_enter(sc, dvmaddr, curaddr, flags);
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dvmaddr += PAGE_SIZE;
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}
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@ -1220,7 +1340,7 @@ sbus_dmamem_free(t, segs, nsegs)
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{
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vaddr_t addr;
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int len;
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int n;
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int n, s, error;
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struct sbus_softc *sc = (struct sbus_softc *)t->_cookie;
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@ -1228,7 +1348,15 @@ sbus_dmamem_free(t, segs, nsegs)
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addr = segs[n].ds_addr;
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len = segs[n].ds_len;
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sbus_remove(sc, addr, len);
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#if 1
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s = splhigh();
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error = extent_free(sc->sc_dvmamap, addr, len, EX_NOWAIT);
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splx(s);
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if (error != 0)
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printf("warning: %ld of DVMA space lost\n", (long)len);
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#else
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dvmamap_free(addr, len);
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#endif
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}
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bus_dmamem_free(t->_parent, segs, nsegs);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: sbusreg.h,v 1.3 1998/09/05 23:57:25 eeh Exp $ */
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/* $NetBSD: sbusreg.h,v 1.4 1999/05/22 20:33:56 eeh Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -251,13 +251,16 @@ struct sysioreg {
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#define IOTTE_C 0x0000000000000010LL /* Accesses to cacheable space */
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#define IOTTE_W 0x0000000000000002LL /* Writeable */
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#define IOTSB_VEND 0xffffe000
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#define IOTSB_VSTART(sz) (u_int)(IOTSB_VEND << (PGSHIFT + (sz)))
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#define MAKEIOTTE(pa,w,c,s) (((pa)&IOTTE_PAMASK)|((w)?IOTTE_W:0)|((c)?IOTTE_C:0)|((s)?IOTTE_STREAM:0)|(IOTTE_V|IOTTE_8K))
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#if 0
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/* This version generates a pointer to a int64_t */
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#define IOTSBSLOT(va,sz) ((((((vaddr_t)(va))-(((vaddr_t)0xff800000)<<(sz))))>>(13-3))&(~7))
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#define IOTSBSLOT(va,sz) ((((((vaddr_t)(va))-((vaddr_t)IOTSB_VSTART(sz))))>>(PGSHIFT-3))&(~7))
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#else
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/* Here we just try to create an array index */
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#define IOTSBSLOT(va,sz) ((u_int)((((((vaddr_t)(va))-(((vaddr_t)0xff800000)<<(sz))))>>(13))))
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#define IOTSBSLOT(va,sz) ((u_int)((((((vaddr_t)(va))-((vaddr_t)IOTSB_VSTART(sz))))>>(PGSHIFT))))
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#endif
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/*
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@ -1,4 +1,4 @@
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/* $NetBSD: sbusvar.h,v 1.5 1998/09/05 23:57:25 eeh Exp $ */
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/* $NetBSD: sbusvar.h,v 1.6 1999/05/22 20:33:56 eeh Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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@ -113,7 +113,7 @@ struct sbus_softc {
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int sc_tsbsize;
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u_int sc_pagesize;
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u_int sc_dvmabase;
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int sc_hasiocache;
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struct extent *sc_dvmamap; /* DVMA map for this instance */
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int sc_ign; /* Interrupt group number for this sysio */
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paddr_t sc_flushpa; /* used to flush the SBUS */
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@ -1,4 +1,4 @@
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/* $NetBSD: autoconf.c,v 1.14 1999/04/25 16:18:46 eeh Exp $ */
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/* $NetBSD: autoconf.c,v 1.15 1999/05/22 20:33:55 eeh Exp $ */
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/*
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* Copyright (c) 1996
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@ -95,7 +95,9 @@ int printspl = 0;
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* the machine.
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*/
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int cold; /* if 1, still working on cold-start */
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int fbnode; /* node ID of ROM's console frame buffer */
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int fbnode; /* node ID of ROM's framebuffer XXXX deprecated */
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int stdinnode; /* node ID of ROM's console input device */
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int stdoutnode; /* node ID of ROM's console output device */
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int optionsnode; /* node ID of ROM's options */
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#ifdef KGDB
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Loading…
Reference in New Issue
Block a user