DL-11 driver bus'ified. UNTESTED.
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e805bfec25
commit
12b6c6d04f
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@ -1,4 +1,4 @@
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/* $NetBSD: dl.c,v 1.6 1999/01/19 21:04:48 ragge Exp $ */
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/* $NetBSD: dl.c,v 1.7 1999/05/26 02:01:49 ragge Exp $ */
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/*-
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* Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
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@ -94,22 +94,21 @@
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <machine/pte.h>
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#include <machine/trap.h>
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#include <machine/bus.h>
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#include <machine/scb.h>
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#include <vax/uba/ubareg.h>
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#include <vax/uba/ubavar.h>
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#include <dev/dec/uba/ubareg.h>
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#include <dev/dec/uba/ubavar.h>
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#include <vax/uba/dlreg.h>
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#include <dev/dec/uba/dlreg.h>
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#define DL_I2C(i) (i)
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#define DL_C2I(c) (c)
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#include "ioconf.h"
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struct dl_softc {
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struct device sc_dev;
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dlregs* sc_addr;
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struct tty* sc_tty;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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struct tty *sc_tty;
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};
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static int dl_match __P((struct device *, struct cfdata *, void *));
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@ -131,7 +130,12 @@ struct cfattach dl_ca = {
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sizeof(struct dl_softc), dl_match, dl_attach
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};
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extern struct cfdriver dl_cd;
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#define DL_READ_WORD(reg) \
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bus_space_read_2(sc->sc_iot, sc->sc_ioh, reg)
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#define DL_WRITE_WORD(reg, val) \
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, reg, val)
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#define DL_WRITE_BYTE(reg, val) \
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, reg, val)
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/* Autoconfig handles: setup the controller to interrupt, */
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/* then complete the housecleaning for full operation */
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@ -143,18 +147,18 @@ dl_match (parent, cf, aux)
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void *aux;
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{
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struct uba_attach_args *ua = aux;
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register dlregs *dladdr;
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dladdr = (dlregs*) ua->ua_addr;
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#ifdef DL_DEBUG
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printf("Probing for dl at %lo ... ", (long)dladdr);
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printf("Probing for dl at %lo ... ", (long)ua->ua_iaddr);
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#endif
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dladdr->dl_xcsr = DL_XCSR_TXIE;
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if (dladdr->dl_xcsr != (DL_XCSR_TXIE | DL_XCSR_TX_READY)) {
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bus_space_write_2(ua->ua_iot, ua->ua_ioh, DL_UBA_XCSR, DL_XCSR_TXIE);
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if (bus_space_read_2(ua->ua_iot, ua->ua_ioh, DL_UBA_XCSR) !=
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(DL_XCSR_TXIE | DL_XCSR_TX_READY)) {
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#ifdef DL_DEBUG
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printf("failed (step 1; XCSR = %.4b)\n", dladdr->dl_xcsr,
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DL_XCSR_BITS);
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printf("failed (step 1; XCSR = %.4b)\n",
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bus_space_read_2(ua->ua_iot, ua->ua_ioh, DL_UBA_XCSR),
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DL_XCSR_BITS);
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#endif
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return 0;
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}
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@ -167,7 +171,7 @@ dl_match (parent, cf, aux)
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* anything.
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*/
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dladdr->u_xbuf.bytes.byte_lo = '\0';
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bus_space_write_1(ua->ua_iot, ua->ua_ioh, DL_UBA_XBUFL, '\0');
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#if 0 /* This test seems to fail 2/3 of the time :-( */
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if (dladdr->dl_xcsr != (DL_XCSR_TXIE)) {
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#ifdef DL_DEBUG
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@ -178,10 +182,12 @@ dl_match (parent, cf, aux)
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}
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#endif
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DELAY(100000); /* delay 1/10 s for character to transmit */
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if (dladdr->dl_xcsr != (DL_XCSR_TXIE | DL_XCSR_TX_READY)) {
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if (bus_space_read_2(ua->ua_iot, ua->ua_ioh, DL_UBA_XCSR) !=
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(DL_XCSR_TXIE | DL_XCSR_TX_READY)) {
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#ifdef DL_DEBUG
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printf("failed (step 3; XCSR = %.4b)\n", dladdr->dl_xcsr,
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DL_XCSR_BITS);
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printf("failed (step 3; XCSR = %.4b)\n",
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bus_space_read_2(ua->ua_iot, ua->ua_ioh, DL_UBA_XCSR),
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DL_XCSR_BITS);
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#endif
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return 0;
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}
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@ -202,15 +208,14 @@ dl_attach (parent, self, aux)
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{
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struct dl_softc *sc = (void *)self;
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register struct uba_attach_args *ua = aux;
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register dlregs *dladdr;
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dladdr = (dlregs *) ua->ua_addr;
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sc->sc_addr = dladdr;
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sc->sc_iot = ua->ua_iot;
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sc->sc_ioh = ua->ua_ioh;
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/* Tidy up the device */
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dladdr->dl_rcsr = DL_RCSR_RXIE;
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dladdr->dl_xcsr = DL_XCSR_TXIE;
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DL_WRITE_WORD(DL_UBA_RCSR, DL_RCSR_RXIE);
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DL_WRITE_WORD(DL_UBA_XCSR, DL_XCSR_TXIE);
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/* Initialize our softc structure. Should be done in open? */
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@ -230,15 +235,12 @@ dlrint(cntlr)
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int cntlr;
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{
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struct dl_softc *sc = dl_cd.cd_devs[cntlr];
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volatile dlregs *dladdr;
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register struct tty *tp;
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register int cc;
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register unsigned c;
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dladdr = sc->sc_addr;
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if (dladdr->dl_rcsr & DL_RCSR_RX_DONE) {
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c = dladdr->dl_rbuf;
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if (DL_READ_WORD(DL_UBA_RCSR) & DL_RCSR_RX_DONE) {
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c = DL_READ_WORD(DL_UBA_RBUF);
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cc = c & 0xFF;
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tp = sc->sc_tty;
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@ -273,10 +275,8 @@ dlxint(cntlr)
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int cntlr;
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{
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struct dl_softc *sc = dl_cd.cd_devs[cntlr];
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volatile dlregs *dladdr;
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register struct tty *tp;
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dladdr = sc->sc_addr;
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tp = sc->sc_tty;
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tp->t_state &= ~(TS_BUSY | TS_FLUSH);
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if (tp->t_line)
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@ -297,7 +297,7 @@ dlopen(dev, flag, mode, p)
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register int unit;
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struct dl_softc *sc;
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unit = DL_I2C(minor(dev));
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unit = minor(dev);
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if (unit >= dl_cd.cd_ndevs || dl_cd.cd_devs[unit] == NULL)
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return ENXIO;
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@ -339,7 +339,7 @@ dlclose(dev, flag, mode, p)
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register struct tty *tp;
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register int unit;
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unit = DL_I2C(minor(dev));
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unit = minor(dev);
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sc = dl_cd.cd_devs[unit];
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tp = sc->sc_tty;
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@ -361,7 +361,7 @@ dlread(dev, uio, flag)
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struct dl_softc *sc;
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register int unit;
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unit = DL_I2C(minor(dev));
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unit = minor(dev);
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sc = dl_cd.cd_devs[unit];
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tp = sc->sc_tty;
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return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
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@ -377,7 +377,7 @@ dlwrite(dev, uio, flag)
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struct dl_softc *sc;
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register int unit;
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unit = DL_I2C(minor(dev));
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unit = minor(dev);
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sc = dl_cd.cd_devs[unit];
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tp = sc->sc_tty;
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return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
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@ -396,7 +396,7 @@ dlioctl(dev, cmd, data, flag, p)
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register int unit;
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int error;
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unit = DL_I2C(minor(dev));
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unit = minor(dev);
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sc = dl_cd.cd_devs[unit];
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tp = sc->sc_tty;
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{
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register struct dl_softc* sc;
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sc = dl_cd.cd_devs[DL_I2C(minor(dev))];
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sc = dl_cd.cd_devs[minor(dev)];
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return sc->sc_tty;
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}
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register struct dl_softc *sc;
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int unit, s;
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unit = DL_I2C(minor(tp->t_dev));
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unit = minor(tp->t_dev);
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sc = dl_cd.cd_devs[unit];
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s = spltty();
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register struct tty *tp;
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{
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register struct dl_softc *sc;
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register dlregs *dladdr;
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register int unit;
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int s;
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unit = DL_I2C(minor(tp->t_dev));
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unit = minor(tp->t_dev);
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sc = dl_cd.cd_devs[unit];
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s = spltty();
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if (tp->t_outq.c_cc == 0)
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goto out;
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dladdr = sc->sc_addr;
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if (dladdr->dl_xcsr & DL_XCSR_TX_READY) {
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if (DL_READ_WORD(DL_UBA_XCSR) & DL_XCSR_TX_READY) {
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tp->t_state |= TS_BUSY;
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dladdr->u_xbuf.bytes.byte_lo = getc(&tp->t_outq);
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DL_WRITE_BYTE(DL_UBA_XBUFL, getc(&tp->t_outq));
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}
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out:
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splx(s);
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register struct dl_softc *sc;
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int state;
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{
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register dlregs *dladdr;
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int s;
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dladdr = sc->sc_addr;
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s = spltty();
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if (state)
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dladdr->dl_xcsr |= DL_XCSR_TX_BREAK;
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else
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dladdr->dl_xcsr &= ~DL_XCSR_TX_BREAK;
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int s = spltty();
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if (state) {
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DL_WRITE_WORD(DL_UBA_XCSR, DL_READ_WORD(DL_UBA_XCSR) |
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DL_XCSR_TX_BREAK);
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} else {
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DL_WRITE_WORD(DL_UBA_XCSR, DL_READ_WORD(DL_UBA_XCSR) &
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~DL_XCSR_TX_BREAK);
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}
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splx(s);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: dlreg.h,v 1.1 1997/02/04 19:13:19 ragge Exp $ */
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/* $NetBSD: dlreg.h,v 1.2 1999/05/26 02:01:50 ragge Exp $ */
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/*
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* Copyright (c) 1997 Ben Harris. All rights reserved.
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*
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* Style in imitation of dzreg.h.
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*/
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#ifdef notdef
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union w_b
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{
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u_short word;
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};
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typedef struct DLregs dlregs;
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#endif
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#define DL_UBA_RCSR 0
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#define DL_UBA_RBUF 2
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#define DL_UBA_XCSR 4
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#define DL_UBA_XBUFL 6
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/* RCSR bits */
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