- Make tlb dump DDB command have 'D' indication for TLB 'dirty bit'. MIPS
processor is one of processors with no 'referenced bit' nor 'modified bit' processor machinary. Those functions are implemented combining two hardware bits, 'dirty bit' and 'valid bit', with TLBmod exception handler.
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93c1a6ec55
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@ -1,4 +1,4 @@
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/* $NetBSD: db_interface.c,v 1.15 1999/04/24 08:10:39 simonb Exp $ */
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/* $NetBSD: db_interface.c,v 1.16 1999/05/20 03:34:06 nisimura Exp $ */
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/*
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* Mach Operating System
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@ -291,7 +291,7 @@ db_tlbdump_cmd(addr, have_addr, count, modif)
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i, tlb.tlb_hi,
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tlb.tlb_lo & MIPS1_PG_FRAME);
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db_printf(" %c%c%c\n",
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(tlb.tlb_lo & MIPS1_PG_M) ? 'M' : ' ',
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(tlb.tlb_lo & MIPS1_PG_M) ? 'D' : ' ',
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(tlb.tlb_lo & MIPS1_PG_G) ? 'G' : ' ',
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(tlb.tlb_lo & MIPS1_PG_N) ? 'N' : ' ');
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}
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@ -309,12 +309,12 @@ db_tlbdump_cmd(addr, have_addr, count, modif)
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i, tlb.tlb_hi);
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db_printf("Lo0=0x%08x %c%c attr %x",
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(unsigned)pfn_to_vad(tlb.tlb_lo0),
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(tlb.tlb_lo0 & MIPS3_PG_M) ? 'M' : ' ',
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(tlb.tlb_lo0 & MIPS3_PG_M) ? 'D' : ' ',
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(tlb.tlb_lo0 & MIPS3_PG_G) ? 'G' : ' ',
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(tlb.tlb_lo0 >> 3) & 7);
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db_printf("Lo1=0x%08x %c%c atr %x sz=%x\n",
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(unsigned)pfn_to_vad(tlb.tlb_lo1),
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(tlb.tlb_lo1 & MIPS3_PG_M) ? 'M' : ' ',
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(tlb.tlb_lo1 & MIPS3_PG_M) ? 'D' : ' ',
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(tlb.tlb_lo1 & MIPS3_PG_G) ? 'G' : ' ',
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(tlb.tlb_lo1 >> 3) & 7,
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tlb.tlb_mask);
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