Moved from dec_kn02_subr.c
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sys/arch/pmax/pmax/memc_3min.c
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sys/arch/pmax/pmax/memc_3min.c
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/* $NetBSD: memc_3min.c,v 1.4 1999/05/20 14:15:57 nisimura Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department and Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah Hdr: trap.c 1.32 91/04/06
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*
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* @(#)trap.c 8.5 (Berkeley) 1/11/94
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: memc_3min.c,v 1.4 1999/05/20 14:15:57 nisimura Exp $");
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/*
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* Motherboard memory error contoller used in both
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* 3min (kn02ba) and maxine (kn02ca).
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*/
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#include <sys/types.h>
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#include <sys/systm.h>
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#include <mips/cpuregs.h>
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#include <pmax/pmax/kmin.h>
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#include <pmax/pmax/dec_kn02_subr.h>
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/* forward declarations */
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static unsigned kn02ba_recover_erradr __P((u_int phys, u_int mer));
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static unsigned
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kn02ba_recover_erradr(phys, mer)
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unsigned phys, mer;
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{
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/* phys holds bits 28:2, mer knows which byte */
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switch (mer & KMIN_MER_LASTBYTE) {
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case KMIN_LASTB31:
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mer = 3; break;
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case KMIN_LASTB23:
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mer = 2; break;
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case KMIN_LASTB15:
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mer = 1; break;
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case KMIN_LASTB07:
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mer = 0; break;
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}
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return ((phys & KMIN_AER_ADDR_MASK) | mer);
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}
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/*
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* Handle error
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* All we can do with parity is panic.
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* XXX check for clean user pages, replace frame, and reload ?
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*/
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void
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kn02ba_errintr()
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{
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int mer, adr, siz;
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static int errintr_cnt = 0;
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siz = *(volatile int *)MIPS_PHYS_TO_KSEG1(KMIN_REG_MSR);
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mer = *(volatile int *)MIPS_PHYS_TO_KSEG1(KMIN_REG_MER);
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adr = *(volatile int *)MIPS_PHYS_TO_KSEG1(KMIN_REG_AER);
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/* clear interrupt bit */
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*(unsigned int *)MIPS_PHYS_TO_KSEG1(KMIN_REG_TIMEOUT) = 0;
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errintr_cnt++;
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printf("(%d)%s%x [%x %x %x]\n", errintr_cnt,
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"Bad memory chip at phys ",
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kn02ba_recover_erradr(adr, mer),
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mer, siz, adr);
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}
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