- Move MachSetPID(1) call to pmap_bootstrap() adajacent to kernel pmap
initialization code. - Abandon mips_init_proc0() and do the 4 lines straightly in MD mach_init(). - Restore a block of code accidentally lost in prevous commit. - Change the term 'tlbpid' to a MIPS3 nomenclature 'asid'. - Hide PTE size exposures by symbolic names in locore.S
This commit is contained in:
nisimura
parent
dbdf646ecf
commit
c99765853f
@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.29 1999/03/23 22:04:01 simonb Exp $ */
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/* $NetBSD: cpu.h,v 1.30 1999/05/18 01:36:51 nisimura Exp $ */
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/*-
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* Copyright (c) 1992, 1993
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@ -184,7 +184,6 @@ caddr_t allocsys __P((caddr_t));
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void dumpsys __P((void));
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int savectx __P((struct user *));
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void mips_init_msgbuf __P((void));
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void mips_init_proc0 __P((caddr_t));
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/* locore.S */
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void savefpregs __P((struct proc *));
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.h,v 1.26 1999/04/24 08:10:36 simonb Exp $ */
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/* $NetBSD: pmap.h,v 1.27 1999/05/18 01:36:51 nisimura Exp $ */
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/*
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* Copyright (c) 1987 Carnegie-Mellon University
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@ -85,8 +85,8 @@ typedef struct pmap {
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int pm_count; /* pmap reference count */
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simple_lock_data_t pm_lock; /* lock on pmap */
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struct pmap_statistics pm_stats; /* pmap statistics */
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int pm_tlbpid; /* address space tag */
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u_int pm_tlbgen; /* TLB PID generation number */
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unsigned pm_asid; /* TLB address space tag */
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unsigned pm_asidgen; /* its generation number */
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struct segtab *pm_segtab; /* pointers to pages of PTEs */
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} *pmap_t;
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@ -98,7 +98,7 @@ typedef struct pmap {
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typedef struct pv_entry {
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struct pv_entry *pv_next; /* next pv_entry */
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struct pmap *pv_pmap; /* pmap where mapping lies */
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vaddr_t pv_va; /* virtual address for mapping */
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vaddr_t pv_va; /* virtual address for mapping */
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int pv_flags; /* some flags for the mapping */
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} *pv_entry_t;
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@ -109,11 +109,11 @@ typedef struct pv_entry {
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#ifdef _KERNEL
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char *pmap_attributes; /* reference and modify bits */
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struct pmap kernel_pmap_store;
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extern char *pmap_attributes; /* reference and modify bits */
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extern struct pmap kernel_pmap_store;
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#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
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#define pmap_kernel() (&kernel_pmap_store)
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#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
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#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
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/*
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@ -1,4 +1,4 @@
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# $NetBSD: genassym.cf,v 1.11 1999/03/26 03:40:41 tsubai Exp $
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# $NetBSD: genassym.cf,v 1.12 1999/05/18 01:36:52 nisimura Exp $
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#
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# Copyright (c) 1997
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# Jonathan Stone. All rights reserved.
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@ -61,7 +61,8 @@ define P_PRIORITY offsetof(struct proc, p_priority)
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define P_ADDR offsetof(struct proc, p_addr)
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define P_MD_REGS offsetof(struct proc, p_md.md_regs)
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define P_MD_UPTE offsetof(struct proc, p_md.md_upte)
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define P_MD_UPTE_0 offsetof(struct proc, p_md.md_upte[0])
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define P_MD_UPTE_1 offsetof(struct proc, p_md.md_upte[1])
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define U_PCB_FPREGS offsetof(struct user, u_pcb.pcb_fpregs)
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define U_PCB_CONTEXT offsetof(struct user, u_pcb.pcb_context)
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.S,v 1.71 1999/05/07 01:30:26 nisimura Exp $ */
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/* $NetBSD: locore.S,v 1.72 1999/05/18 01:36:52 nisimura Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -322,16 +322,16 @@ sw1:
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* Switch to new context.
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*/
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sw zero, _C_LABEL(want_resched)
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jal _C_LABEL(pmap_alloc_tlbpid) # v0 = TLB PID
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jal _C_LABEL(pmap_alloc_asid) # v0 = new proc's ASID
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move s0, a0 # BDSLOT: save p
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lw a0, P_ADDR(s0) # a0 = p_addr
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lw a1, P_MD_UPTE+0(s0) # a1 = first u. pte
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lw a2, P_MD_UPTE+4(s0) # a2 = 2nd u. pte
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lw a1, P_MD_UPTE_0(s0) # a1 = first u. pte
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lw a2, P_MD_UPTE_1(s0) # a2 = 2nd u. pte
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lw s1, _C_LABEL(mips_locore_jumpvec) + MIPSX_CPU_SWITCH_RESUME
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sw s0, _C_LABEL(curproc) # set curproc
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sw a0, _C_LABEL(curpcb) # set curpcb
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jal ra, s1 # CPU-specific: resume process
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move a3, v0 # BDSLOT: a3 = TLB PID
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move a3, v0 # BDSLOT: a3 = ASID
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REG_PROLOGUE
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REG_L v0, U_PCB_CONTEXT+SF_REG_ST(a0)
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@ -1,4 +1,4 @@
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/* $NetBSD: mips_machdep.c,v 1.51 1999/04/25 02:56:28 simonb Exp $ */
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/* $NetBSD: mips_machdep.c,v 1.52 1999/05/18 01:36:52 nisimura Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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@ -52,7 +52,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.51 1999/04/25 02:56:28 simonb Exp $");
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__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.52 1999/05/18 01:36:52 nisimura Exp $");
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#include "opt_bufcache.h"
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#include "opt_compat_netbsd.h"
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@ -1216,24 +1216,3 @@ mips_init_msgbuf()
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"in last cluster (%d used)\n",
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round_page(MSGBUFSIZE), sz);
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}
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/*
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* Initialize the U-area for proc0. Since these need to be set up
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* before we can probe for memory, we have to use stolen pages before
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* they're loaded into the VM system.
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*
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* "space" is USPACE in size, must be page aligned, and in KSEG0.
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*/
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void
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mips_init_proc0(space)
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caddr_t space;
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{
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/* XXX Flush cache?? */
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memset(space, 0, USPACE);
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proc0.p_addr = proc0paddr = (struct user *)space;
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curpcb = &proc0.p_addr->u_pcb;
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MachSetPID(1); /* Also establishes context using curpcb */
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proc0.p_md.md_regs = (void *)((struct frame *)((int)curpcb+USPACE) - 1);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.c,v 1.59 1999/05/17 11:12:44 nisimura Exp $ */
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/* $NetBSD: pmap.c,v 1.60 1999/05/18 01:36:51 nisimura Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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@ -78,7 +78,7 @@
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.59 1999/05/17 11:12:44 nisimura Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.60 1999/05/18 01:36:51 nisimura Exp $");
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/*
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* Manages physical address maps.
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@ -185,10 +185,10 @@ struct pv_entry *pv_table;
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int pv_table_npages;
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struct segtab *free_segtab; /* free list kept locally */
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u_int tlbpid_gen = 1; /* TLB PID generation count */
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int tlbpid_cnt = 2; /* next available TLB PID */
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pt_entry_t *Sysmap; /* kernel pte table */
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u_int Sysmapsize; /* number of pte's in Sysmap */
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unsigned Sysmapsize; /* number of pte's in Sysmap */
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unsigned pmap_next_asid = 2; /* next available ASID */
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unsigned pmap_asid_generation = 1; /* ASID generation count */
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boolean_t pmap_initialized = FALSE;
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@ -213,7 +213,7 @@ boolean_t pmap_initialized = FALSE;
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/* Forward function declarations */
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int pmap_remove_pv __P((pmap_t pmap, vaddr_t va, paddr_t pa));
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int pmap_alloc_tlbpid __P((struct proc *p));
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int pmap_alloc_asid __P((struct proc *p));
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void pmap_zero_page __P((paddr_t phys));
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void pmap_enter_pv __P((pmap_t, vaddr_t, paddr_t, u_int *));
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pt_entry_t *pmap_pte __P((pmap_t, vaddr_t));
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@ -250,9 +250,41 @@ mips_flushcache_allpvh(paddr_t pa)
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*/
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void
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pmap_bootstrap()
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{
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extern int physmem;
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/*
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* Initialize `FYI' variables. Note we're relying on
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* Figure out how many PTE's are necessary to map the kernel.
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* The '2048' comes from PAGER_MAP_SIZE in vm_pager_init().
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* This should be kept in sync.
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* We also reserve space for kmem_alloc_pageable() for vm_fork().
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*/
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Sysmapsize = (VM_KMEM_SIZE + VM_PHYS_SIZE +
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nbuf * MAXBSIZE + 16 * NCARGS) / NBPG + 2048 +
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(maxproc * UPAGES);
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#ifdef SYSVSHM
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Sysmapsize += shminfo.shmall;
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#endif
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Sysmap = (pt_entry_t *)
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pmap_steal_memory(sizeof(pt_entry_t) * Sysmapsize, NULL, NULL);
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/*
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* Allocate memory for the pv_heads. (A few more of the latter
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* are allocated than are needed.)
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*
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* We could do this in pmap_init when we know the actual
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* managed page pool size, but its better to use kseg0
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* addresses rather than kernel virtual addresses mapped
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* through the TLB.
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*/
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pv_table_npages = physmem;
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pv_table = (struct pv_entry *)
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pmap_steal_memory(sizeof(struct pv_entry) * pv_table_npages,
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NULL, NULL);
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/*
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* Initialize `FYI' variables. Note we're relying on
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* the fact that BSEARCH sorts the vm_physmem[] array
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* for us.
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*/
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@ -269,8 +301,10 @@ pmap_bootstrap()
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*/
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simple_lock_init(&pmap_kernel()->pm_lock);
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pmap_kernel()->pm_count = 1;
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pmap_kernel()->pm_tlbpid = 1;
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pmap_kernel()->pm_tlbgen = tlbpid_gen;
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pmap_kernel()->pm_asid = 1;
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pmap_kernel()->pm_asidgen = pmap_asid_generation;
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MachSetPID(1);
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#if 0 /* no need, no good, no use */
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proc0paddr->u_pcb.pcb_segtab = pmap_kernel()->pm_segtab = NULL;
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@ -504,8 +538,8 @@ pmap_pinit(pmap)
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if (pmap->pm_segtab->seg_tab[i] != 0)
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panic("pmap_pinit: pm_segtab != 0");
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#endif
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pmap->pm_tlbpid = 0;
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pmap->pm_tlbgen = 0;
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pmap->pm_asid = 0;
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pmap->pm_asidgen = 0;
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}
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/*
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@ -625,8 +659,8 @@ pmap_activate(p)
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p->p_addr->u_pcb.pcb_segtab = pmap->pm_segtab;
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if (p == curproc) {
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int tlbpid = pmap_alloc_tlbpid(p);
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MachSetPID(tlbpid);
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int asid = pmap_alloc_asid(p);
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MachSetPID(asid);
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#ifdef MIPS3
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if (CPUISMIPS3) {
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mips3_write_xcontext_upper((u_int32_t)pmap->pm_segtab);
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@ -747,8 +781,8 @@ pmap_remove(pmap, sva, eva)
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/*
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* Flush the TLB for the given address.
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*/
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if (pmap->pm_tlbgen == tlbpid_gen) {
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MachTLBFlushAddr(sva | (pmap->pm_tlbpid <<
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if (pmap->pm_asidgen == pmap_asid_generation) {
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MachTLBFlushAddr(sva | (pmap->pm_asid <<
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MIPS_TLB_PID_SHIFT));
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#ifdef DEBUG
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remove_stats.flushes++;
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@ -910,8 +944,8 @@ pmap_protect(pmap, sva, eva, prot)
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/*
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* Update the TLB if the given address is in the cache.
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*/
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if (pmap->pm_tlbgen == tlbpid_gen)
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MachTLBUpdate(sva | (pmap->pm_tlbpid <<
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if (pmap->pm_asidgen == pmap_asid_generation)
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MachTLBUpdate(sva | (pmap->pm_asid <<
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MIPS_TLB_PID_SHIFT), entry);
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}
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}
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@ -1020,10 +1054,10 @@ pmap_page_cache(pa, mode)
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entry = (entry & ~MIPS3_PG_CACHEMODE)
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| newmode;
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pte->pt_entry = entry;
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if (pv->pv_pmap->pm_tlbgen ==
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tlbpid_gen)
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if (pv->pv_pmap->pm_asidgen ==
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pmap_asid_generation)
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MachTLBUpdate(pv->pv_va |
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(pv->pv_pmap->pm_tlbpid <<
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(pv->pv_pmap->pm_asid <<
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MIPS3_TLB_PID_SHIFT),
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entry);
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}
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@ -1233,8 +1267,8 @@ pmap_enter(pmap, va, pa, prot, wired, access_type)
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#ifdef DEBUG
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if (pmapdebug & PDB_ENTER) {
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printf("pmap_enter: new pte %x", npte);
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if (pmap->pm_tlbgen == tlbpid_gen)
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printf(" tlbpid %d", pmap->pm_tlbpid);
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if (pmap->pm_asidgen == pmap_asid_generation)
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printf(" asid %d", pmap->pm_asid);
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printf("\n");
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}
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#endif
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@ -1249,8 +1283,8 @@ pmap_enter(pmap, va, pa, prot, wired, access_type)
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if (!mips_pg_v(pte->pt_entry))
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pmap->pm_stats.resident_count++;
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pte->pt_entry = npte;
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if (pmap->pm_tlbgen == tlbpid_gen)
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MachTLBUpdate(va | (pmap->pm_tlbpid <<
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if (pmap->pm_asidgen == pmap_asid_generation)
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MachTLBUpdate(va | (pmap->pm_asid <<
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MIPS_TLB_PID_SHIFT), npte);
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va += NBPG;
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npte += vad_to_pfn(NBPG);
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@ -1737,46 +1771,46 @@ pmap_phys_address(ppn)
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*/
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/*
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* Allocate a hardware PID and return it.
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* Allocate TLB address space tag (called ASID or TLBPID) and return it.
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* It takes almost as much or more time to search the TLB for a
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* specific PID and flush those entries as it does to flush the entire TLB.
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* Therefore, when we allocate a new PID, we just take the next number. When
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* specific ASID and flush those entries as it does to flush the entire TLB.
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* Therefore, when we allocate a new ASID, we just take the next number. When
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* we run out of numbers, we flush the TLB, increment the generation count
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* and start over. PID zero is reserved for kernel use.
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* and start over. ASID zero is reserved for kernel use.
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*/
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int
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pmap_alloc_tlbpid(p)
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pmap_alloc_asid(p)
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struct proc *p;
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{
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pmap_t pmap;
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pmap = p->p_vmspace->vm_map.pmap;
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if (pmap->pm_tlbgen == tlbpid_gen)
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if (pmap->pm_asidgen == pmap_asid_generation)
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;
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else {
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if (tlbpid_cnt == MIPS_TLB_NUM_PIDS) {
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if (pmap_next_asid == MIPS_TLB_NUM_PIDS) {
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MachTLBFlush();
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/* reserve tlbpid_gen == 0 to alway mean invalid */
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if (++tlbpid_gen == 0)
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tlbpid_gen = 1;
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tlbpid_cnt = 1;
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/* reserve == 0 to always mean invalid */
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if (++pmap_asid_generation == 0)
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pmap_asid_generation = 1;
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pmap_next_asid = 1;
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}
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pmap->pm_tlbpid = tlbpid_cnt++;
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pmap->pm_tlbgen = tlbpid_gen;
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pmap->pm_asid = pmap_next_asid++;
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pmap->pm_asidgen = pmap_asid_generation;
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}
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#ifdef DEBUG
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if (pmapdebug & (PDB_FOLLOW|PDB_TLBPID)) {
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if (curproc)
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printf("pmap_alloc_tlbpid: curproc %d '%s' ",
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printf("pmap_alloc_asid: curproc %d '%s' ",
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curproc->p_pid, curproc->p_comm);
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else
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printf("pmap_alloc_tlbpid: curproc <none> ");
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printf("segtab %p tlbpid %d pid %d '%s'\n",
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pmap->pm_segtab, pmap->pm_tlbpid, p->p_pid, p->p_comm);
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printf("pmap_alloc_asid: curproc <none> ");
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printf("segtab %p asid %d pid %d '%s'\n",
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pmap->pm_segtab, pmap->pm_asid, p->p_pid, p->p_comm);
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}
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#endif
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return (pmap->pm_tlbpid);
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return (pmap->pm_asid);
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}
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/*
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.25 1999/04/11 04:04:08 chs Exp $ */
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/* $NetBSD: machdep.c,v 1.26 1999/05/18 01:36:52 nisimura Exp $ */
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/*
|
||||
* Copyright (c) 1988 University of Utah.
|
||||
@ -43,7 +43,7 @@
|
||||
|
||||
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
|
||||
|
||||
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.25 1999/04/11 04:04:08 chs Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.26 1999/05/18 01:36:52 nisimura Exp $");
|
||||
|
||||
/* from: Utah Hdr: machdep.c 1.63 91/04/24 */
|
||||
|
||||
@ -174,6 +174,8 @@ struct idrom idrom;
|
||||
/* locore callback-vector setup */
|
||||
extern void mips_vector_init __P((void));
|
||||
|
||||
extern struct user *proc0paddr;
|
||||
|
||||
/*
|
||||
* Do all the stuff that locore normally does before calling main().
|
||||
* Process arguments passed to us by the prom monitor.
|
||||
@ -252,9 +254,13 @@ mach_init(x_boothowto, x_bootdev, x_bootname, x_maxmem)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Init mapping for u page(s) for proc0, pm_tlbpid 1.
|
||||
* Alloc u pages for proc0 stealing KSEG0 memory.
|
||||
*/
|
||||
mips_init_proc0(kernend);
|
||||
proc0.p_addr = proc0paddr = (struct user *)kernend;
|
||||
proc0.p_md.md_regs =
|
||||
(struct frame *)((caddr_t)kernend + UPAGES * PAGE_SIZE) - 1;
|
||||
curpcb = &proc0.p_addr->u_pcb;
|
||||
memset(kernend, 0, UPAGES * PAGE_SIZE);
|
||||
|
||||
kernend += UPAGES * PAGE_SIZE;
|
||||
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: machdep.c,v 1.141 1999/05/11 05:06:35 nisimura Exp $ */
|
||||
/* $NetBSD: machdep.c,v 1.142 1999/05/18 01:36:51 nisimura Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1988 University of Utah.
|
||||
@ -43,7 +43,7 @@
|
||||
|
||||
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
|
||||
|
||||
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.141 1999/05/11 05:06:35 nisimura Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.142 1999/05/18 01:36:51 nisimura Exp $");
|
||||
|
||||
/* from: Utah Hdr: machdep.c 1.63 91/04/24 */
|
||||
|
||||
@ -189,6 +189,7 @@ struct platform platform = {
|
||||
};
|
||||
|
||||
extern caddr_t esym;
|
||||
extern struct user *proc0paddr;
|
||||
extern struct consdev promcd;
|
||||
|
||||
/*
|
||||
@ -351,11 +352,14 @@ mach_init(argc, argv, code, cv, bim, bip)
|
||||
if (boothowto & RB_KDB)
|
||||
Debugger();
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Init mapping for u page(s) for proc0, pm_tlbpid 1.
|
||||
* Alloc u pages for proc0 stealing KSEG0 memory.
|
||||
*/
|
||||
mips_init_proc0(kernend);
|
||||
proc0.p_addr = proc0paddr = (struct user *)kernend;
|
||||
proc0.p_md.md_regs =
|
||||
(struct frame *)((caddr_t)kernend + UPAGES * PAGE_SIZE) - 1;
|
||||
curpcb = &proc0.p_addr->u_pcb;
|
||||
memset(kernend, 0, UPAGES * PAGE_SIZE);
|
||||
|
||||
kernend += UPAGES * PAGE_SIZE;
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user