for mips_read_statusreg (which was apparently never implemented).
Provide prototypes and implementations for mips_cp0_cause_write,
mips_cp0_status_read, and mips_cp0_status_write. (Writing can, of
course, be quite dangerous.)
for mips3 (and later) 'ld' and 'sd' instructions. These currently
only are properly implemented for the _MIPS_BSD_API_LP32 and
_MIPS_BSD_API_LP32_64CLEAN 'API's. They're pretty messy, but when you
need them, you really need them.
that the page being zero'd was not completed and that page zeroing
should be aborted. This may be used by machine-dependent code doing
slow page access to reduce the latency of running a process that has
become runnable while in the middle of doing a slow page zero.
and data cache sizes). R4000 uses 2^(12+IC) and 2^(12+DC). IDT32364
uses 2^(9+IC) and 2^(9+DC).
abstract around the problem by making the base a parameter to the
MIPS3_CONFIG_CACHE_SIZE macro. we pass the base down from mips_vector_init
to mips3_vector_init and to mips3_ConfigCache (where it is used).
XXX: someone with an MIPS3_4100 should switch to this and get rid
of the ugly ifdefs in cpuregs.h
process's segtab, retiring 'pcb_segtab' field from 'struct pcb'.
This would be another MULTIPROCESSOR unfriendly and the necessity
might be eliminated when the way to hold PTE is redesigned.
- MB_LEN_MAX is increased to 32.
- To ensure binary compatibility for old executables
under multibyte locale, versioned setlocale is added.
- __mb_len_cur definision is added in setlocale.c
and enable it in stdlib.h .
It is also important for multibyte locale stuffs,
but I just forgot.
By default this is off, and only slightly changes the code to load SR when
a temp register is available. This can be used by the platform code to
handle slow to clear interrupts (our case) or to mask off any interrupt
any interrupt at run-time. This can be very useful for embedded platforms
that have less than desirable interrupt properties.
This keeps the SR management more contained in locore, and should
be roughly the same performance as the .text size is less. Talked
to simonb and he was ok with this change.
jhawk. This callback is used by platform code to manage things like
watchdogs that should be disabled while in ddb. Done as a callback
for processors such as mips that support lots of different systems.
Add ddb support for QED opcodes, fill in enough routines so "next" usually
works, kdbpoke support for any size. Add callback that ports can hook when
entering and leaving ddb. This can be used for things like turning
off watchdogs while in ddb.
This lets mips ports have additional machdep sysctl. Define CPUISMIPS3
for MIPS1+MIPS2 as cpu_arch >= 3 to support mips4. Add cpu_intr()
prototype so this is defined in one place.
Merge Kernel MCOUNT and user MCOUNT.
The earlier code which was inserted to call _mcount in profiling
assembler routines is busted badly. This gets it working with PIC
code and should work with any arbitrary assembler routine.
and rename it to MIPS3_TLB_WIRED_UPAGES.
The value of wired register becomes variable on arc port,
and arc is the only mips3 port which uses the wired TLB entries 2..7.
