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Introduce new MIPS1 direct mapped cache capacity detection logics.

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This commit is contained in:
nisimura 2000-09-16 07:20:16 +00:00
parent 36c4252a17
commit 70a97ab16c
2 changed files with 9 additions and 5 deletions
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6
sys/arch/mips/include/locore.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.h,v 1.42 2000/09/16 00:04:57 chuck Exp $ */
/* $NetBSD: locore.h,v 1.43 2000/09/16 07:20:17 nisimura Exp $ */
/*
* Copyright 1996 The Board of Trustees of The Leland Stanford
@ -48,7 +48,9 @@ struct tlb;
u_int32_t mips_read_causereg(void);
u_int32_t mips_read_statusreg(void);
void mips1_ConfigCache(void);
int mips1_icsize(void);
int mips1_dcsize(void);
void mips1_ConfigCache(void); /* XXX TX3900 XXX */
void mips1_FlushCache(void);
void mips1_FlushDCache(vaddr_t addr, vsize_t len);
void mips1_FlushICache(vaddr_t addr, vsize_t len);

8
sys/arch/mips/mips/mips_machdep.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: mips_machdep.c,v 1.101 2000/09/16 00:04:57 chuck Exp $ */
/* $NetBSD: mips_machdep.c,v 1.102 2000/09/16 07:20:16 nisimura Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@ -52,7 +52,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.101 2000/09/16 00:04:57 chuck Exp $");
__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.102 2000/09/16 07:20:16 nisimura Exp $");
#include "opt_compat_netbsd.h"
#include "opt_compat_ultrix.h"
@ -168,7 +168,6 @@ mips1_vector_init()
/*
* Clear out the I and D caches.
*/
mips1_ConfigCache();
mips1_FlushCache();
}
#endif /* MIPS1 */
@ -354,6 +353,8 @@ mips_vector_init()
case MIPS_R3000:
cpu_arch = 1;
mips_num_tlb_entries = MIPS1_TLB_NUM_TLB_ENTRIES;
mips_L1ICacheSize = mips1_icsize();
mips_L1DCacheSize = mips1_dcsize();
break;
#ifdef ENABLE_MIPS_TX3900
case MIPS_TX3900:
@ -374,6 +375,7 @@ mips_vector_init()
mips_L1DCacheLSize = 16;
break;
}
mips1_ConfigCache();
break;
#endif /* ENABLE_MIPS_TX3900 */
#endif /* MIPS1 */