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provide mips3_ld() and mips3_sd(), functions which provide safe wrappers 

for mips3 (and later) 'ld' and 'sd' instructions.  These currently
only are properly implemented for the _MIPS_BSD_API_LP32 and
_MIPS_BSD_API_LP32_64CLEAN 'API's.  They're pretty messy, but when you
need them, you really need them.
This commit is contained in:
cgd 2000-10-02 22:13:38 +00:00
parent c58e6bf54d
commit 8dbc5c0c51
2 changed files with 72 additions and 2 deletions
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5
sys/arch/mips/include/locore.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.h,v 1.43 2000/09/16 07:20:17 nisimura Exp $ */
/* $NetBSD: locore.h,v 1.44 2000/10/02 22:13:38 cgd Exp $ */
/*
* Copyright 1996 The Board of Trustees of The Leland Stanford
@ -94,6 +94,9 @@ void mips3_write_config(u_int32_t);
void mips3_write_compare(u_int32_t);
void mips3_clearBEV(void);
u_int64_t mips3_ld(u_int64_t *);
void mips3_sd(u_int64_t *, u_int64_t);
/*
* A vector with an entry for each mips-ISA-level dependent
* locore function, and macros which jump through it.

69
sys/arch/mips/mips/locore_mips3.S
View File

@ -1,4 +1,4 @@
/* $NetBSD: locore_mips3.S,v 1.54 2000/09/26 18:22:13 jeffs Exp $ */
/* $NetBSD: locore_mips3.S,v 1.55 2000/10/02 22:13:38 cgd Exp $ */
/*
* Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
@ -2518,6 +2518,73 @@ LEAF(mips3_FetchDcache)
END(mips3_FetchDcache)
#if defined(_MIPS_BSD_API) && \
(_MIPS_BSD_API == _MIPS_BSD_API_N32 || _MIPS_BSD_API == _MIPS_BSD_API_LP64)
#error mips3_ld and mips3_sd should be adjusted for N32 or LP64
#endif
LEAF(mips3_ld)
#if !defined(_MIPS_BSD_API) || _MIPS_BSD_API == _MIPS_BSD_API_LP32
mfc0 t0, MIPS_COP_0_STATUS # turn of interrupts
and t1, t0, ~(MIPS_SR_INT_IE)
mtc0 t1, MIPS_COP_0_STATUS
nop
nop
nop
#endif
ld v0, 0(a0)
#if _BYTE_ORDER == _BIG_ENDIAN
addu v1, v0, 0 # low word in v1
dsra v0, v0, 32 # high word in v0
#else
dsra v1, v0, 32 # high word in v1
addu v0, v0, 0 # low word in v0
#endif
#if !defined(_MIPS_BSD_API) || _MIPS_BSD_API == _MIPS_BSD_API_LP32
mtc0 t0, MIPS_COP_0_STATUS # restore intr status.
nop
#endif
jr ra
nop
END(mips3_ld)
LEAF(mips3_sd)
#if !defined(_MIPS_BSD_API) || _MIPS_BSD_API == _MIPS_BSD_API_LP32
mfc0 t0, MIPS_COP_0_STATUS # turn of interrupts
and t1, t0, ~(MIPS_SR_INT_IE)
mtc0 t1, MIPS_COP_0_STATUS
nop
nop
nop
#endif
# NOTE: a1 is padding!
#if _BYTE_ORDER == _BIG_ENDIAN
dsll a2, a2, 32 # high word in a2
dsll a3, a3, 32 # low word in a3
dsrl a3, a3, 32
#else
dsll a2, a2, 32 # low word in a2
dsrl a2, a2, 32
dsll a3, a3, 32 # high word in a3
#endif
or a1, a2, a3
sd a1, 0(a0)
#if !defined(_MIPS_BSD_API) || _MIPS_BSD_API == _MIPS_BSD_API_LP32
mtc0 t0, MIPS_COP_0_STATUS # restore intr status.
nop
#endif
jr ra
nop
END(mips3_sd)
/*
* The variables below are used to communicate the cache handling
* to higher-level software.