Commit Graph

65 Commits

Author SHA1 Message Date
Stanislav Shwartsman
efc413d2b4 VMX fixes 2009-05-21 10:39:40 +00:00
Stanislav Shwartsman
9929e6ed78 - updated FSF address 2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
a95c24b019 Some functions could be called only from 32 bit 2008-09-06 21:18:08 +00:00
Stanislav Shwartsman
0d90ab0478 Completely new way to handle LD+OP cases - allows to significantly reduce number of BX_CPU_C methods 2008-08-09 21:05:07 +00:00
Stanislav Shwartsman
5dd02b26e3 Make even more efficient RmAddr calculation - good optimizing compiler could make more efficient code than it was before 2008-08-08 09:22:49 +00:00
Stanislav Shwartsman
709d74728d Call #UD exception directly instead of UndefinedOpcode function - for future use 2008-07-13 15:35:10 +00:00
Stanislav Shwartsman
3f5efb6475 Remove more duplicated methods 2008-07-13 10:06:07 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
eebd96e2d7 another whitespace cleanup by Sebastien 2008-02-05 22:33:35 +00:00
Stanislav Shwartsman
37fbb82baa Cleanups. Move bxInstruction_c definition to separate file instr.h 2008-01-29 17:13:10 +00:00
Stanislav Shwartsman
7b80c5f481 I merged and succeded to remove some similar execution functions - less code, less chance for branch misprediction 2008-01-25 19:34:30 +00:00
Stanislav Shwartsman
192f398b46 removed --enable-magic-breakpoint configure option - it is enabled by default if Bochs internal debugger compiled in. Also it always possible to switch magic break off by .bochsrc option 2008-01-21 21:36:58 +00:00
Stanislav Shwartsman
d9984bb3a1 Eliminate BxResolve call from the heart of cpu loop and move into instructions that really require this calculation. Yes, it blows the code of EVERY CPU method but it has >15% speedup ! 2008-01-10 19:37:56 +00:00
Stanislav Shwartsman
e9a148f9c4 lmost last instruction split -> CMOV in 16/32 bit modes 2007-12-21 18:24:19 +00:00
Stanislav Shwartsman
d830c301cf Fixed 64-bit versions of LOOP instructions, some cleanups 2007-12-21 17:30:49 +00:00
Stanislav Shwartsman
5d4e32b8da Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads 2007-12-20 20:58:38 +00:00
Stanislav Shwartsman
b516589e4e Changes in write_virtual_* and pop_* functions -> avoid moving parameteres by pointer 2007-12-20 18:29:42 +00:00
Stanislav Shwartsman
7ca78b88e9 configure/compile changes + small optimizations 2007-12-01 16:45:17 +00:00
Stanislav Shwartsman
0a1063ad77 Split GvEv opcode groups 2007-11-21 22:36:02 +00:00
Stanislav Shwartsman
cdc9a09090 Split more opcodes 2007-11-18 18:24:46 +00:00
Stanislav Shwartsman
613bad34ee split MOVZX/MOVSX opcodes 2007-11-17 18:29:00 +00:00
Stanislav Shwartsman
5ec15df46d Split more opcodes EbIb opcodes 2007-11-17 18:08:46 +00:00
Stanislav Shwartsman
d9e58bd598 split11b on opcode tables level - split almost eevery splittable instruction
will be continued
2007-11-17 12:44:10 +00:00
Stanislav Shwartsman
351244d1ea Rename splitmod11b methods 2007-11-16 08:30:22 +00:00
Stanislav Shwartsman
0dc4badfbb Added SSE4A and SSE4_2 to disassembler
Implemented POPCNT instruction
2007-09-19 19:38:10 +00:00
Stanislav Shwartsman
9db896d100 minor x86_64 fixes and cleanups 2007-01-12 22:47:21 +00:00
Stanislav Shwartsman
fe644dfcbf - Code cleanup, remove x86-64 code from functions which cannot be called from x86-64
- Fix PANIC multiple SSE prefix decoding (fetchdecode and disasm)
- More Bit32u -> bx_phy_address convert
- Lazy flags optimization
2006-05-12 17:04:19 +00:00
Stanislav Shwartsman
5c3fba4399 Support access to SMRAM in memory object
Cleanup in CPU code
2006-03-26 18:58:01 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
fc0894bbe1 Enable A20 after system reset 2006-03-04 16:58:10 +00:00
Stanislav Shwartsman
d1c722211e Fix duplicate opcodes, fix opcode names and disasm bugs 2005-09-23 16:45:41 +00:00
Stanislav Shwartsman
ce8f1ade07 Some not really significant speedups 2005-06-21 17:01:21 +00:00
Stanislav Shwartsman
c026a90779 Unify coding style in CPU methods
NO AFFECT ON EMULATION RESULTS
2005-05-20 20:06:50 +00:00
Stanislav Shwartsman
5213e903bd mov duplicate opcode groups from fectchdecode*.cc to .h
use common register accessor macroses instead of direct register file structure access
2004-11-26 20:21:28 +00:00
Stanislav Shwartsman
a1f830d429 Implemented FAST lazy flags version for logic instructions.
Small code cleanup/simplification for others.
2004-08-13 20:00:03 +00:00
Stanislav Shwartsman
5c5b556f24 Merge softfloat-fpu-implementation_ver4_branch branch 2004-06-18 14:11:11 +00:00
Stanislav Shwartsman
3274e0dd12 Commit patch
[ 950905 ] Do not PANIC on rare, bad input from user-mode
by h.johansson
with little changes and fixes
2004-05-10 21:05:51 +00:00
Stanislav Shwartsman
3f7c794b26 commit patch
899972 data xfer performance patch V 2.0.4   2004-02-18 15:38 nobody psychosmur
2004-02-26 19:17:40 +00:00
Michael Brown
d1922bc835 Changed #ifdef MAGIC_BREAKPOINT to #if BX_MAGIC_BREAKPOINT and added a
configure script option --enable-magic-breakpoints (enabled by default).

Documented the instruction required to trigger the magic breakpoint
(xchgw %bx,%bx).
2004-01-29 17:49:03 +00:00
Stanislav Shwartsman
cdb68ff8c8 Reverting back the changes in data_xfer16.cc
Add/Fix bx_info messages in proc_ctrl.cc
2003-11-13 21:57:13 +00:00
Stanislav Shwartsman
d51aece0c1 Change BX_PANIC messages to BX_INFO when behaviour is accepted with Intel/AMD docs.
Instructions MOV_CxRx and MOV_RxCx are not supported in v8086 mode according to Intel manuals.
Also these instructions are treated as register-to-register regardless to MODRM byte fields (according to AMD manuals)
Also commit fix for MOV_EwSw by Kevin
2003-11-13 21:17:31 +00:00
Stanislav Shwartsman
3084a41abf Changes BX_PANIC to BX_INFO if Bochs behavour is exactly matches Intel docs 2003-10-04 20:48:13 +00:00
Christophe Bothamy
091052e199 - reverting to previous revision (xfer8 1.15, xfer16 1.21, xfer32 1.21)
as it breaks AMD64 support.
2003-05-08 17:56:48 +00:00
Christophe Bothamy
b3d16a48ef - apply another speedup patch from Conn Clark.
Notes from the author:
Here is another one of my speed up patches. Unlike my previous speedups
this one will help more platforms than just X86. It cleans up the Data
Xfer instructions. Since the Data Xfer instructions are the most often
executed instructions it gives a noticable boost in speed. The basic
optimization technique was to eliminate intermediate variables and pass
a pointer to the final destination or original source to the
read_virtual_whatever and the write_virtual_whatever functions.
2003-05-03 16:19:07 +00:00
Stanislav Shwartsman
1224c2d307 #UD exception should be generated when using MOV_SwEw opcode for
loading CS register
2003-03-21 13:34:24 +00:00
Stanislav Shwartsman
b84f0bd0f2 This was not a cleanup. Those macros were intentionally
there to offer a way to substitute more efficient code
to do the RMW cases.  At the moment, they just map to
the normal functions.

Sorry, restored the previous version ...
2002-10-25 18:26:29 +00:00
Stanislav Shwartsman
a0c1fd60e6 Just little cleanup of macro duplicating an existing code 2002-10-25 17:23:34 +00:00
Bryce Denney
cec9135e9f - Apply patch.replace-Boolean rev 1.3. Every "Boolean" is now changed to a
"bx_bool" which is always defined as Bit32u on all platforms.  In Carbon
  specific code, Boolean is still used because the Carbon header files
  define it to unsigned char.
- this fixes bug [ 623152 ] MacOSX: Triple Exception Booting win95.
  The bug was that some code in Bochs depends on Boolean to be a
  32 bit value.  (This should be fixed, but I don't know all the places
  where it needs to be fixed yet.)  Because Carbon defined Boolean as
  an unsigned char, Bochs just followed along and used the unsigned char
  definition to avoid compile problems.  This exposed the dependency
  on 32 bit Boolean on MacOS X only and led to major simulation problems,
  that could only be reproduced and debugged on that platform.
- On the mailing list we debated whether to make all Booleans into "bool" or
  our own type.  I chose bx_bool for several reasons.
  1. Unlike C++'s bool, we can guarantee that bx_bool is the same size on all
     platforms, which makes it much less likely to have more platform-specific
     simulation differences in the future.  (I spent hours on a borrowed
     MacOSX machine chasing bug 618388 before discovering that different sized
     Booleans were the problem, and I don't want to repeat that.)
  2. We still have at least one dependency on 32 bit Booleans which must be
     fixed some time, but I don't want to risk introducing new bugs into the
     simulation just before the 2.0 release.

Modified Files:
    bochs.h config.h.in gdbstub.cc logio.cc main.cc pc_system.cc
    pc_system.h plugin.cc plugin.h bios/rombios.c cpu/apic.cc
    cpu/arith16.cc cpu/arith32.cc cpu/arith64.cc cpu/arith8.cc
    cpu/cpu.cc cpu/cpu.h cpu/ctrl_xfer16.cc cpu/ctrl_xfer32.cc
    cpu/ctrl_xfer64.cc cpu/data_xfer16.cc cpu/data_xfer32.cc
    cpu/data_xfer64.cc cpu/debugstuff.cc cpu/exception.cc
    cpu/fetchdecode.cc cpu/flag_ctrl_pro.cc cpu/init.cc
    cpu/io_pro.cc cpu/lazy_flags.cc cpu/lazy_flags.h cpu/mult16.cc
    cpu/mult32.cc cpu/mult64.cc cpu/mult8.cc cpu/paging.cc
    cpu/proc_ctrl.cc cpu/segment_ctrl_pro.cc cpu/stack_pro.cc
    cpu/tasking.cc debug/dbg_main.cc debug/debug.h debug/sim2.cc
    disasm/dis_decode.cc disasm/disasm.h doc/docbook/Makefile
    docs-html/cosimulation.html fpu/wmFPUemu_glue.cc
    gui/amigaos.cc gui/beos.cc gui/carbon.cc gui/gui.cc gui/gui.h
    gui/keymap.cc gui/keymap.h gui/macintosh.cc gui/nogui.cc
    gui/rfb.cc gui/sdl.cc gui/siminterface.cc gui/siminterface.h
    gui/term.cc gui/win32.cc gui/wx.cc gui/wxmain.cc gui/wxmain.h
    gui/x.cc instrument/example0/instrument.cc
    instrument/example0/instrument.h
    instrument/example1/instrument.cc
    instrument/example1/instrument.h
    instrument/stubs/instrument.cc instrument/stubs/instrument.h
    iodev/cdrom.cc iodev/cdrom.h iodev/cdrom_osx.cc iodev/cmos.cc
    iodev/devices.cc iodev/dma.cc iodev/dma.h iodev/eth_arpback.cc
    iodev/eth_packetmaker.cc iodev/eth_packetmaker.h
    iodev/floppy.cc iodev/floppy.h iodev/guest2host.h
    iodev/harddrv.cc iodev/harddrv.h iodev/ioapic.cc
    iodev/ioapic.h iodev/iodebug.cc iodev/iodev.h
    iodev/keyboard.cc iodev/keyboard.h iodev/ne2k.h
    iodev/parallel.h iodev/pci.cc iodev/pci.h iodev/pic.h
    iodev/pit.cc iodev/pit.h iodev/pit_wrap.cc iodev/pit_wrap.h
    iodev/sb16.cc iodev/sb16.h iodev/serial.cc iodev/serial.h
    iodev/vga.cc iodev/vga.h memory/memory.h memory/misc_mem.cc
2002-10-25 11:44:41 +00:00
Kevin Lawton
a5537449cd Split out reg-reg and reg-memory cases for a few other high-profile
instructions, mainly variants of MOV.  Had to update fetchdecode64
  to keep it inline with the 32-bit mods.
2002-09-29 19:21:38 +00:00
Kevin Lawton
08a89fe7b6 Performance mod: I implemented a suggestion from Peter Tattam
and Jas Sandys-Lumsdaine to split out common instructions into
  variants which deal with the mod=11b case (Reg-Reg) and the
  other cases (which do memory ops).  Actually, I only split
  MOV_GwEw and MOV_GdEd for now.  According to some instrumentation
  of a Win95 boot, they were the most frequently used opcode by far.
2002-09-28 05:38:11 +00:00