- apply another speedup patch from Conn Clark.

Notes from the author:
Here is another one of my speed up patches. Unlike my previous speedups
this one will help more platforms than just X86. It cleans up the Data
Xfer instructions. Since the Data Xfer instructions are the most often
executed instructions it gives a noticable boost in speed. The basic
optimization technique was to eliminate intermediate variables and pass
a pointer to the final destination or original source to the
read_virtual_whatever and the write_virtual_whatever functions.
This commit is contained in:
Christophe Bothamy 2003-05-03 16:19:07 +00:00
parent b937905a97
commit b3d16a48ef
3 changed files with 47 additions and 123 deletions

View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: data_xfer16.cc,v 1.21 2003-03-21 13:34:24 sshwarts Exp $
// $Id: data_xfer16.cc,v 1.22 2003-05-03 16:19:07 cbothamy Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -54,21 +54,13 @@ BX_CPU_C::XCHG_RXAX(bxInstruction_c *i)
void
BX_CPU_C::MOV_EEwGw(bxInstruction_c *i)
{
Bit16u op2_16;
op2_16 = BX_READ_16BIT_REG(i->nnn());
write_virtual_word(i->seg(), RMAddr(i), &op2_16);
write_virtual_word(i->seg(), RMAddr(i), &BX_READ_16BIT_REG(i->nnn()));
}
void
BX_CPU_C::MOV_EGwGw(bxInstruction_c *i)
{
Bit16u op2_16;
op2_16 = BX_READ_16BIT_REG(i->nnn());
BX_WRITE_16BIT_REG(i->rm(), op2_16);
BX_WRITE_16BIT_REG(i->rm(), BX_READ_16BIT_REG(i->nnn()));
}
@ -76,20 +68,14 @@ BX_CPU_C::MOV_EGwGw(bxInstruction_c *i)
BX_CPU_C::MOV_GwEGw(bxInstruction_c *i)
{
// 2nd modRM operand Ex, is known to be a general register Gw.
Bit16u op2_16;
op2_16 = BX_READ_16BIT_REG(i->rm());
BX_WRITE_16BIT_REG(i->nnn(), op2_16);
BX_READ_16BIT_REG(i->nnn()) = BX_READ_16BIT_REG(i->rm());
}
void
BX_CPU_C::MOV_GwEEw(bxInstruction_c *i)
{
// 2nd modRM operand Ex, is known to be a memory operand, Ew.
Bit16u op2_16;
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
BX_WRITE_16BIT_REG(i->nnn(), op2_16);
read_virtual_word(i->seg(), RMAddr(i), &BX_READ_16BIT_REG(i->nnn()));
}
void
@ -167,43 +153,34 @@ BX_CPU_C::LEA_GwM(bxInstruction_c *i)
void
BX_CPU_C::MOV_AXOw(bxInstruction_c *i)
{
Bit16u temp_16;
bx_address addr;
addr = i->Id();
/* read from memory address */
if (!BX_NULL_SEG_REG(i->seg())) {
read_virtual_word(i->seg(), addr, &temp_16);
read_virtual_word(i->seg(), i->Id(), &AX);
}
else {
read_virtual_word(BX_SEG_REG_DS, addr, &temp_16);
read_virtual_word(BX_SEG_REG_DS, i->Id(), &AX);
}
/* write to register */
AX = temp_16;
}
void
BX_CPU_C::MOV_OwAX(bxInstruction_c *i)
{
Bit16u temp_16;
bx_address addr;
addr = i->Id();
/* write AX to memory address */
/* read from register */
temp_16 = AX;
/* write to memory address */
if (!BX_NULL_SEG_REG(i->seg())) {
write_virtual_word(i->seg(), addr, &temp_16);
write_virtual_word(i->seg(), i->Id(), &AX);
}
else {
write_virtual_word(BX_SEG_REG_DS, addr, &temp_16);
write_virtual_word(BX_SEG_REG_DS, i->Id(), &AX);
}
}

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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: data_xfer32.cc,v 1.21 2002-10-25 18:26:27 sshwarts Exp $
// $Id: data_xfer32.cc,v 1.22 2003-05-03 16:19:07 cbothamy Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -63,21 +63,13 @@ BX_CPU_C::MOV_ERXId(bxInstruction_c *i)
void
BX_CPU_C::MOV_EEdGd(bxInstruction_c *i)
{
Bit32u op2_32;
op2_32 = BX_READ_32BIT_REG(i->nnn());
write_virtual_dword(i->seg(), RMAddr(i), &op2_32);
write_virtual_dword(i->seg(), RMAddr(i), &BX_READ_32BIT_REG(i->nnn()));
}
void
BX_CPU_C::MOV_EGdGd(bxInstruction_c *i)
{
Bit32u op2_32;
op2_32 = BX_READ_32BIT_REG(i->nnn());
BX_WRITE_32BIT_REGZ(i->rm(), op2_32);
BX_WRITE_32BIT_REGZ(i->rm(), BX_READ_32BIT_REG(i->nnn()));
}
@ -85,20 +77,14 @@ BX_CPU_C::MOV_EGdGd(bxInstruction_c *i)
BX_CPU_C::MOV_GdEGd(bxInstruction_c *i)
{
// 2nd modRM operand Ex, is known to be a general register Gd.
Bit32u op2_32;
op2_32 = BX_READ_32BIT_REG(i->rm());
BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
BX_READ_32BIT_REG(i->nnn()) = BX_READ_32BIT_REG(i->rm());
}
void
BX_CPU_C::MOV_GdEEd(bxInstruction_c *i)
{
// 2nd modRM operand Ex, is known to be a memory operand, Ed.
Bit32u op2_32;
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
read_virtual_dword(i->seg(), RMAddr(i), &BX_READ_32BIT_REG(i->nnn()));
}
void
@ -118,46 +104,36 @@ BX_CPU_C::LEA_GdM(bxInstruction_c *i)
void
BX_CPU_C::MOV_EAXOd(bxInstruction_c *i)
{
#if BX_SUPPORT_X86_64
Bit32u temp_32;
bx_address addr;
addr = i->Id();
/* read from memory address */
if (!BX_NULL_SEG_REG(i->seg())) {
read_virtual_dword(i->seg(), addr, &temp_32);
read_virtual_dword(i->seg(), i->Id(), &temp_32);
}
else {
read_virtual_dword(BX_SEG_REG_DS, addr, &temp_32);
read_virtual_dword(BX_SEG_REG_DS, i->Id(), &temp_32);
}
/* write to register */
#if BX_SUPPORT_X86_64
RAX = temp_32;
#else
EAX = temp_32;
if (!BX_NULL_SEG_REG(i->seg())) {
read_virtual_dword(i->seg(), i->Id(), &EAX);
}
else {
read_virtual_dword(BX_SEG_REG_DS, i->Id(), &EAX);
}
#endif
}
void
BX_CPU_C::MOV_OdEAX(bxInstruction_c *i)
{
Bit32u temp_32;
bx_address addr;
addr = i->Id();
/* read from register */
temp_32 = EAX;
/* write to memory address */
if (!BX_NULL_SEG_REG(i->seg())) {
write_virtual_dword(i->seg(), addr, &temp_32);
write_virtual_dword(i->seg(), i->Id() , &EAX);
}
else {
write_virtual_dword(BX_SEG_REG_DS, addr, &temp_32);
write_virtual_dword(BX_SEG_REG_DS, i->Id(), &EAX);
}
}
@ -323,17 +299,16 @@ BX_CPU_C::CMOV_GdEd(bxInstruction_c *i)
BX_PANIC(("CMOV_GdEd: default case"));
}
if (i->modC0()) {
op2_32 = BX_READ_32BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
}
if (condition) {
BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
}
if (i->modC0()) {
op2_32 = BX_READ_32BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
}
BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
}
#else
BX_INFO(("cmov_gded called"));
UndefinedOpcode(i);

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@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: data_xfer8.cc,v 1.15 2003-04-26 10:02:02 cbothamy Exp $
// $Id: data_xfer8.cc,v 1.16 2003-05-03 16:19:07 cbothamy Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -50,11 +50,8 @@ BX_CPU_C::MOV_RHIb(bxInstruction_c *i)
void
BX_CPU_C::MOV_EEbGb(bxInstruction_c *i)
{
Bit8u op2;
op2 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
write_virtual_byte(i->seg(), RMAddr(i), &op2);
write_virtual_byte(i->seg(), RMAddr(i), &BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL()));
}
void
@ -71,11 +68,7 @@ BX_CPU_C::MOV_EGbGb(bxInstruction_c *i)
void
BX_CPU_C::MOV_GbEEb(bxInstruction_c *i)
{
Bit8u op2;
read_virtual_byte(i->seg(), RMAddr(i), &op2);
BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), op2);
read_virtual_byte(i->seg(), RMAddr(i), &BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL()));
}
void
@ -93,42 +86,23 @@ BX_CPU_C::MOV_GbEGb(bxInstruction_c *i)
void
BX_CPU_C::MOV_ALOb(bxInstruction_c *i)
{
Bit8u temp_8;
bx_address addr;
addr = i->Id();
/* read from memory address */
if (!BX_NULL_SEG_REG(i->seg())) {
read_virtual_byte(i->seg(), addr, &temp_8);
read_virtual_byte(i->seg(), i->Id(), &AL);
}
else {
read_virtual_byte(BX_SEG_REG_DS, addr, &temp_8);
read_virtual_byte(BX_SEG_REG_DS, i->Id(), &AL);
}
/* write to register */
AL = temp_8;
}
void
BX_CPU_C::MOV_ObAL(bxInstruction_c *i)
{
Bit8u temp_8;
bx_address addr;
addr = i->Id();
/* read from register */
temp_8 = AL;
/* write to memory address */
if (!BX_NULL_SEG_REG(i->seg())) {
write_virtual_byte(i->seg(), addr, &temp_8);
write_virtual_byte(i->seg(), i->Id(), &AL);
}
else {
write_virtual_byte(BX_SEG_REG_DS, addr, &temp_8);
write_virtual_byte(BX_SEG_REG_DS, i->Id(), &AL);
}
}
@ -155,7 +129,6 @@ BX_CPU_C::MOV_EbIb(bxInstruction_c *i)
BX_CPU_C::XLAT(bxInstruction_c *i)
{
Bit32u offset_32;
Bit8u al;
#if BX_CPU_LEVEL >= 3
@ -169,12 +142,11 @@ BX_CPU_C::XLAT(bxInstruction_c *i)
}
if (!BX_NULL_SEG_REG(i->seg())) {
read_virtual_byte(i->seg(), offset_32, &al);
read_virtual_byte(i->seg(), offset_32, &AL);
}
else {
read_virtual_byte(BX_SEG_REG_DS, offset_32, &al);
read_virtual_byte(BX_SEG_REG_DS, offset_32, &AL);
}
AL = al;
}
void