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5880d7f49c
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79 Commits

Author SHA1 Message Date
Stanislav Shwartsman
5880d7f49c bugfix with phy addr long 2009-08-11 15:56:09 +00:00
Stanislav Shwartsman
f29b5a97d6 fixes with long phy addr 2009-08-10 08:08:25 +00:00
Stanislav Shwartsman
74c62a59ab Fixes for > 32-bit physical addr range 2009-08-03 15:01:07 +00:00
Stanislav Shwartsman
4470c6a1c8 make ICACHE always enabled option and deprecate it in the configure script 
Trace cache still can be turned off
 2009-03-13 18:48:08 +00:00
Stanislav Shwartsman
3a1852ea23 take local APIC read/write access into CPU class from BX_MEM (needed for APIC virtualization later) 2009-02-17 19:20:47 +00:00
Volker Ruppert
e5eac65b59 - removed wrong character from FSF address (converted invisible and useless 
2-byte character)
- updated FSF address in some files
- added license to some files
 2009-02-08 09:05:52 +00:00
Stanislav Shwartsman
9929e6ed78 - updated FSF address 2009-01-16 18:18:59 +00:00
Volker Ruppert
815dff019e - converted iodebug device to a plugin 2008-12-30 18:11:13 +00:00
Stanislav Shwartsman
ce425f02d9 Small fix towards 40-bit physical address emulated 2008-10-18 18:10:14 +00:00
Stanislav Shwartsman
f303d61cc1 Fixed 'dirty page' support in debugger 2008-07-26 14:44:26 +00:00
Stanislav Shwartsman
8d17e7b539 Fixed watchpoints handling 2008-05-31 20:59:38 +00:00
Stanislav Shwartsman
6ebae41ad7 print physcial address with special format - preparations for 64-bit physical address emu 2008-05-09 22:33:37 +00:00
Stanislav Shwartsman
11b564b2f0 Speed up memory access by devices 2008-05-02 23:18:51 +00:00
Stanislav Shwartsman
6225aa64f5 Move monitor check earlier - it should handle SMM as well 2008-05-01 20:46:00 +00:00
Stanislav Shwartsman
fda4d38959 32-bit systems have a problem to allocate large amount of physical memory for Bochs simulation which makes simulation with 4G address space virtually impossible. But in most of the cases when 4G physical address space defined - it is not touched by default on every run so it is possible to allocate only really accessed blocks. This commit made all necessary preparations for it. 2008-04-17 14:39:33 +00:00
Stanislav Shwartsman
fea49bb270 Fixed linear address wrap in legacy (not long64) mode 2008-04-07 18:39:17 +00:00
Stanislav Shwartsman
25a9b9fef1 whitespace cleanup again 2008-02-03 20:27:06 +00:00
Stanislav Shwartsman
e137560b14 Complete MONITOR/MWAIT implemntation (including monitoring of memory range) 
Fixed PANIC in read/write Cr/Dr - should #UD with unkown register used
 2007-11-01 18:03:48 +00:00
Stanislav Shwartsman
624a543c34 Fix compilation warning 2007-10-09 20:23:01 +00:00
Stanislav Shwartsman
476baaf1d8 ThiS patch makes watchpoints work even if they are triggered on CPUs other than CPU 0 during SMp. 
Patch from developers mailing list
 2007-09-27 16:10:45 +00:00
Stanislav Shwartsman
97c0bc40a2 Bochs website tracker patch 
shows where write outside of memory occurred
 2006-12-29 08:02:35 +00:00
Volker Ruppert
a3908d6e86 - moved BX_USE_MEM_SMF to all the other SMF definitions in config.h.in (should 
be set to 1, since there is only one address space present)
- fixed memory object member to support the static case (SMF)
 2006-09-02 12:08:28 +00:00
Stanislav Shwartsman
d17eb99f76 fixed allocated physical memory limit check in memory.cc 
Force eflags before saving them - register eflags using param handlers
 2006-06-01 20:05:15 +00:00
Stanislav Shwartsman
b0cbaf70e0 Avoid double check for a20addr <= BX_MEM_THIS len 2006-05-31 20:23:58 +00:00
Stanislav Shwartsman
6a0d15ee31 Veto direct write to the 0x000C0000 to 0x000EFFFF area 2006-04-29 16:55:22 +00:00
Stanislav Shwartsman
b271bcd9c6 Fixed compilaion problem on Linux gcc 3.3.4 2006-03-28 21:09:04 +00:00
Stanislav Shwartsman
4fd9bd53c3 Change Bit32u -> bx_phy_address in memory 2006-03-28 16:53:02 +00:00
Stanislav Shwartsman
c7d142200f Implement SMRAM conrol register in i440fx chipset and all its functionality in memory class 2006-03-26 22:15:07 +00:00
Stanislav Shwartsman
5c3fba4399 Support access to SMRAM in memory object 
Cleanup in CPU code
 2006-03-26 18:58:01 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU 
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
 2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
c0aeb1b073 Substitute NULL to BX_CPU_C parameter instead of BX_CPU(0) for memory ops originated by devices 2006-03-06 19:23:13 +00:00
Stanislav Shwartsman
7ed117f0e0 Add 8-byte memory access support, all 8-byte memory accesses executed byte-byte before. 2006-03-03 12:55:37 +00:00
Stanislav Shwartsman
e297df457a Roll back the try to move Local APIC memory access to CPU. 
It was fast and fine but had serious correctness problems with RMW apic access
 2006-03-02 23:16:13 +00:00
Stanislav Shwartsman
5fad793989 move local apic handling to the access_linear function for the memory class. 
speedup the whole simulation by 2% !
 2006-03-01 22:32:24 +00:00
Stanislav Shwartsman
dfeaf141f0 Register I/O APIC as memory handler, optimize memory handlers array 2006-02-27 19:04:01 +00:00
Volker Ruppert
6311fface8 - pci options rewritten to a parameter tree 
- proposed parameter tree updated
- pci presence flag stored in the memory code
 2006-02-19 21:35:50 +00:00
Stanislav Shwartsman
469358aaf9 Move SHOW_IPS action to bx_gui object, may be some GUI will be able to print IPS online in the simulation window status bar ... 
Small code cleanup
 2005-10-13 16:22:21 +00:00
Volker Ruppert
0e2f0a4392 - support for large BIOS images with up to 512k size added (initial patch by magicfox) 2005-10-12 17:11:44 +00:00
Volker Ruppert
9a89ad7b07 - make debugger watchpoints in device memory work again (SF patch #1309763 by 
Nickolai Zeldovich)
 2005-10-01 09:52:35 +00:00
Stanislav Shwartsman
1755589376 Separate pageWriteStamp from ICACHE. The pageWriteStamp has totally independant structure and could be used in future with icache structure. Also it could be significantly speeded up using BX_SMF analog constructions. 2005-04-10 19:42:48 +00:00
Stanislav Shwartsman
f3e4681ab7 Commit change from Christian Neubert 
Allow to APIC address space to be in any page inside or outside of physical address space
 2005-01-15 13:10:15 +00:00
Volker Ruppert
b9ba811da4 - fixed memory limit check 2004-12-04 13:48:53 +00:00
Volker Ruppert
229ff0195a - 128k BIOS ROM space now aliased on memory top 2004-11-14 14:06:43 +00:00
Volker Ruppert
d3d33d3e7a - unaligned shadow RAM array replaced by an aligned ROM array. Shadow RAM is now 
normal RAM and the ROMs are stored in the ROM array. TODO: alias BIOS on
  memory top.
 2004-11-11 20:55:29 +00:00
Stanislav Shwartsman
5e23909c7c prepations for NX bit implementation 2004-10-21 18:20:40 +00:00
Volker Ruppert
1b2769e73a - added some sanity checks in function load_ROM() 
- removed unused and obsolete stuff from the memory code
 2004-08-26 07:58:33 +00:00
Volker Ruppert
d06c80cee3 - changed all iodev config macros to BX_SUPPORT_xxx 
- removed incorrect SDL/ prefix from include paths (patch from Robin KAY)
 2004-08-06 15:49:55 +00:00
Stanislav Shwartsman
f9bd2b74be 1. Fixed bug in FSUB instruction 
2. Fixed bug

[ 989478 ] I-Cache and undefined Instruktions

The L4 microkernel uses an undefined instruction to
trap for a special requests into the kernel (LOCK NOP).
The handler fixes this up and gives the user a special
code page with syscall stubs. If you're not using the
I-Cache optimization everthing works find on bochs. But
if you enable the I-Cache (--enable-icache), then the
undefined opcode exception is thrown only once for ever
virtual address it occurs. See the demodisk of the
L4KA::pistachio
(http://www.l4ka.org/projects/pistachio/download.php).
In this case the pingpong benchmark of this demo is of
interest. Everything runs fine until the program tries
to spawn a new task for its measurements. This new task
shares the code of the creating program. But the new
task stops executing at the undefined instruction
explained above and no exception is thrown.
 2004-07-29 20:15:19 +00:00
Volker Ruppert
f24f8a4c77 - VGA memory now registered using DEV_register_memory_handlers (static VGA 
memory handling in memory.cc removed)
- CRTC write protection implemented
- 16-bit read access to some VGA registers added
- memory handler code now conciders the status of the A20 line
 2004-07-18 19:40:51 +00:00
Stanislav Shwartsman
5873b26a82 Speed up compilation process. 
bochs.h already not include iodev.h which reduces compilation dependences for almost all cpu and fpu files, now cpu files will not be recompiled if iodev includes was changed
 2004-06-19 15:20:15 +00:00