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Substitute NULL to BX_CPU_C parameter instead of BX_CPU(0) for memory ops originated by devices

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This commit is contained in:
Stanislav Shwartsman 2006-03-06 19:23:13 +00:00
parent 0c573d15cf
commit c0aeb1b073
8 changed files with 151 additions and 179 deletions
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8
bochs/bochs.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: bochs.h,v 1.187 2006-03-05 10:24:27 vruppert Exp $
// $Id: bochs.h,v 1.188 2006-03-06 19:23:13 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2002 MandrakeSoft S.A.
@ -136,10 +136,6 @@ void print_tree(bx_param_c *node, int level = 0);
#define BX_CPU_C bx_cpu_c
#define BX_MEM_C bx_mem_c
#define BX_HRQ (bx_pc_system.HRQ)
#define BX_MEM_READ_PHYSICAL(phy_addr, len, ptr) \
BX_MEM(0)->readPhysicalPage(BX_CPU(0), phy_addr, len, ptr)
#define BX_MEM_WRITE_PHYSICAL(phy_addr, len, ptr) \
BX_MEM(0)->writePhysicalPage(BX_CPU(0), phy_addr, len, ptr)
#if BX_SUPPORT_SMP
#define BX_CPU(x) (bx_cpu_array[x])
@ -316,8 +312,6 @@ protected:
#define MAX_LOGFNS 128
logfunc_t *logfn_list[MAX_LOGFNS];
char *logfn;
};
typedef class BOCHSAPI iofunctions iofunc_t;

124
bochs/iodev/dma.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: dma.cc,v 1.34 2005-04-06 21:09:16 vruppert Exp $
// $Id: dma.cc,v 1.35 2006-03-06 19:23:13 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2002 MandrakeSoft S.A.
@ -64,58 +64,51 @@ bx_dma_c::bx_dma_c(void)
bx_dma_c::~bx_dma_c(void)
{
BX_DEBUG(("Exit."));
BX_DEBUG(("Exit"));
}
unsigned
bx_dma_c::registerDMA8Channel(
unsigned channel,
unsigned bx_dma_c::registerDMA8Channel(unsigned channel,
void (* dmaRead)(Bit8u *data_byte),
void (* dmaWrite)(Bit8u *data_byte),
const char *name
)
const char *name)
{
if (channel > 3) {
BX_PANIC(("registerDMA8Channel: invalid channel number(%u).", channel));
return 0; // Fail.
}
return 0; // Fail
}
if (BX_DMA_THIS s[0].chan[channel].used) {
BX_PANIC(("registerDMA8Channel: channel(%u) already in use.", channel));
return 0; // Fail.
}
return 0; // Fail
}
BX_INFO(("channel %u used by %s", channel, name));
BX_DMA_THIS h[channel].dmaRead8 = dmaRead;
BX_DMA_THIS h[channel].dmaWrite8 = dmaWrite;
BX_DMA_THIS s[0].chan[channel].used = 1;
return 1; // OK.
return 1; // OK
}
unsigned
bx_dma_c::registerDMA16Channel(
unsigned channel,
unsigned bx_dma_c::registerDMA16Channel(unsigned channel,
void (* dmaRead)(Bit16u *data_word),
void (* dmaWrite)(Bit16u *data_word),
const char *name
)
const char *name)
{
if ((channel < 4) || (channel > 7)) {
BX_PANIC(("registerDMA16Channel: invalid channel number(%u).", channel));
return 0; // Fail.
}
return 0; // Fail
}
if (BX_DMA_THIS s[1].chan[channel & 0x03].used) {
BX_PANIC(("registerDMA16Channel: channel(%u) already in use.", channel));
return 0; // Fail.
}
return 0; // Fail
}
BX_INFO(("channel %u used by %s", channel, name));
channel &= 0x03;
BX_DMA_THIS h[channel].dmaRead16 = dmaRead;
BX_DMA_THIS h[channel].dmaWrite16 = dmaWrite;
BX_DMA_THIS s[1].chan[channel].used = 1;
return 1; // OK.
return 1; // OK
}
unsigned
bx_dma_c::unregisterDMAChannel(unsigned channel)
unsigned bx_dma_c::unregisterDMAChannel(unsigned channel)
{
bx_bool ma_sl = (channel > 3);
BX_DMA_THIS s[ma_sl].chan[channel & 0x03].used = 0;
@ -123,18 +116,15 @@ bx_dma_c::unregisterDMAChannel(unsigned channel)
return 1;
}
unsigned
bx_dma_c::get_TC(void)
unsigned bx_dma_c::get_TC(void)
{
return BX_DMA_THIS TC;
}
void
bx_dma_c::init(void)
void bx_dma_c::init(void)
{
unsigned c, i, j;
BX_DEBUG(("Init $Id: dma.cc,v 1.34 2005-04-06 21:09:16 vruppert Exp $"));
BX_DEBUG(("Init $Id: dma.cc,v 1.35 2006-03-06 19:23:13 sshwarts Exp $"));
/* 8237 DMA controller */
@ -184,15 +174,13 @@ bx_dma_c::init(void)
BX_INFO(("channel 4 used by cascade"));
}
void
bx_dma_c::reset(unsigned type)
void bx_dma_c::reset(unsigned type)
{
reset_controller(0);
reset_controller(1);
}
void
bx_dma_c::reset_controller(unsigned num)
void bx_dma_c::reset_controller(unsigned num)
{
BX_DMA_THIS s[num].mask[0] = 1;
BX_DMA_THIS s[num].mask[1] = 1;
@ -204,25 +192,23 @@ bx_dma_c::reset_controller(unsigned num)
BX_DMA_THIS s[num].flip_flop = 0;
}
// index to find channel from register number (only [0],[1],[2],[6] used)
Bit8u channelindex[7] = {2, 3, 1, 0, 0, 0, 0};
// index to find channel from register number (only [0],[1],[2],[6] used)
Bit8u channelindex[7] = {2, 3, 1, 0, 0, 0, 0};
// static IO port read callback handler
// redirects to non-static class handler to avoid virtual functions
// static IO port read callback handler
// redirects to non-static class handler to avoid virtual functions
Bit32u
bx_dma_c::read_handler(void *this_ptr, Bit32u address, unsigned io_len)
Bit32u bx_dma_c::read_handler(void *this_ptr, Bit32u address, unsigned io_len)
{
#if !BX_USE_DMA_SMF
bx_dma_c *class_ptr = (bx_dma_c *) this_ptr;
return( class_ptr->read(address, io_len) );
return class_ptr->read(address, io_len);
}
/* 8237 DMA controller */
Bit32u BX_CPP_AttrRegparmN(2)
bx_dma_c::read( Bit32u address, unsigned io_len)
bx_dma_c::read(Bit32u address, unsigned io_len)
{
#else
UNUSED(this_ptr);
@ -337,11 +323,10 @@ bx_dma_c::read( Bit32u address, unsigned io_len)
}
// static IO port write callback handler
// redirects to non-static class handler to avoid virtual functions
// static IO port write callback handler
// redirects to non-static class handler to avoid virtual functions
void
bx_dma_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
void bx_dma_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
{
#if !BX_USE_DMA_SMF
bx_dma_c *class_ptr = (bx_dma_c *) this_ptr;
@ -370,12 +355,12 @@ bx_dma_c::write(Bit32u address, Bit32u value, unsigned io_len)
BX_DMA_THIS write(address+1, value >> 8, 1);
#endif
return;
}
}
BX_ERROR(("io write to address %08x, len=%u",
(unsigned) address, (unsigned) io_len));
return;
}
}
BX_DEBUG(("write: address=%04x value=%02x",
(unsigned) address, (unsigned) value));
@ -557,8 +542,7 @@ bx_dma_c::write(Bit32u address, Bit32u value, unsigned io_len)
}
}
void
bx_dma_c::set_DRQ(unsigned channel, bx_bool val)
void bx_dma_c::set_DRQ(unsigned channel, bx_bool val)
{
Bit32u dma_base, dma_roof;
bx_bool ma_sl;
@ -623,8 +607,7 @@ bx_dma_c::set_DRQ(unsigned channel, bx_bool val)
control_HRQ(ma_sl);
}
void
bx_dma_c::control_HRQ(bx_bool ma_sl)
void bx_dma_c::control_HRQ(bx_bool ma_sl)
{
unsigned channel;
@ -657,8 +640,7 @@ bx_dma_c::control_HRQ(bx_bool ma_sl)
}
}
void
bx_dma_c::raise_HLDA(void)
void bx_dma_c::raise_HLDA(void)
{
unsigned channel;
Bit32u phy_addr;
@ -672,8 +654,8 @@ bx_dma_c::raise_HLDA(void)
(BX_DMA_THIS s[1].mask[channel]==0) ) {
ma_sl = 1;
break;
}
}
}
if (channel == 0) { // master cascade channel
BX_DMA_THIS s[1].DACK[0] = 1;
for (channel=0; channel<4; channel++) {
@ -681,13 +663,13 @@ bx_dma_c::raise_HLDA(void)
(BX_DMA_THIS s[0].mask[channel]==0) ) {
ma_sl = 0;
break;
}
}
}
}
if (channel >= 4) {
// wait till they're unmasked
return;
}
}
//BX_DEBUG(("hlda: OK in response to DRQ(%u)", (unsigned) channel));
phy_addr = (BX_DMA_THIS s[ma_sl].chan[channel].page_reg << 16) |
@ -710,7 +692,7 @@ bx_dma_c::raise_HLDA(void)
if (BX_DMA_THIS s[ma_sl].chan[channel].mode.autoinit_enable == 0) {
// set mask bit if not in autoinit mode
BX_DMA_THIS s[ma_sl].mask[channel] = 1;
}
}
else {
// count expired, but in autoinit mode
// reload count and base address
@ -718,8 +700,8 @@ bx_dma_c::raise_HLDA(void)
BX_DMA_THIS s[ma_sl].chan[channel].base_address;
BX_DMA_THIS s[ma_sl].chan[channel].current_count =
BX_DMA_THIS s[ma_sl].chan[channel].base_count;
}
}
}
Bit8u data_byte;
Bit16u data_word;
@ -733,41 +715,41 @@ bx_dma_c::raise_HLDA(void)
else
BX_PANIC(("no dmaWrite handler for channel %u.", channel));
BX_MEM_WRITE_PHYSICAL(phy_addr, 1, &data_byte);
DEV_MEM_WRITE_PHYSICAL(phy_addr, 1, &data_byte);
BX_DBG_DMA_REPORT(phy_addr, 1, BX_WRITE, data_byte);
}
}
else {
if (BX_DMA_THIS h[channel].dmaWrite16)
BX_DMA_THIS h[channel].dmaWrite16(&data_word);
else
BX_PANIC(("no dmaWrite handler for channel %u.", channel));
BX_MEM_WRITE_PHYSICAL(phy_addr, 2, &data_word);
DEV_MEM_WRITE_PHYSICAL(phy_addr, 2, &data_word);
BX_DBG_DMA_REPORT(phy_addr, 2, BX_WRITE, data_word);
}
}
}
else if (BX_DMA_THIS s[ma_sl].chan[channel].mode.transfer_type == 2) { // read
// DMA controlled xfer of byte from Memory to I/O
if (!ma_sl) {
BX_MEM_READ_PHYSICAL(phy_addr, 1, &data_byte);
DEV_MEM_READ_PHYSICAL(phy_addr, 1, &data_byte);
if (BX_DMA_THIS h[channel].dmaRead8)
BX_DMA_THIS h[channel].dmaRead8(&data_byte);
BX_DBG_DMA_REPORT(phy_addr, 1, BX_READ, data_byte);
}
}
else {
BX_MEM_READ_PHYSICAL(phy_addr, 2, &data_word);
DEV_MEM_READ_PHYSICAL(phy_addr, 2, &data_word);
if (BX_DMA_THIS h[channel].dmaRead16)
BX_DMA_THIS h[channel].dmaRead16(&data_word);
BX_DBG_DMA_REPORT(phy_addr, 2, BX_READ, data_word);
}
}
}
else if (BX_DMA_THIS s[ma_sl].chan[channel].mode.transfer_type == 0) {
// verify
@ -782,11 +764,11 @@ bx_dma_c::raise_HLDA(void)
BX_DMA_THIS h[channel].dmaWrite16(&data_word);
else
BX_PANIC(("no dmaWrite handler for channel %u.", channel));
}
}
}
else {
BX_PANIC(("hlda: transfer_type 3 is undefined"));
}
}
if (count_expired) {
BX_DMA_THIS TC = 0; // clear TC, adapter card already notified
@ -796,6 +778,6 @@ bx_dma_c::raise_HLDA(void)
if (!ma_sl) {
BX_DMA_THIS set_DRQ(4, 0); // clear DRQ to cascade
BX_DMA_THIS s[1].DACK[0] = 0; // clear DACK to cascade
}
}
}
}

9
bochs/iodev/iodev.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: iodev.h,v 1.69 2006-01-17 20:16:59 vruppert Exp $
// $Id: iodev.h,v 1.70 2006-03-06 19:23:13 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2002 MandrakeSoft S.A.
@ -502,7 +502,12 @@ private:
bx_bool is_serial_enabled ();
bx_bool is_usb_enabled ();
bx_bool is_parallel_enabled ();
};
};
#define DEV_MEM_READ_PHYSICAL(phy_addr, len, ptr) \
BX_MEM(0)->readPhysicalPage(NULL, phy_addr, len, ptr)
#define DEV_MEM_WRITE_PHYSICAL(phy_addr, len, ptr) \
BX_MEM(0)->writePhysicalPage(NULL, phy_addr, len, ptr)
#ifndef NO_DEVICE_INCLUDES

81
bochs/iodev/pci_ide.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: pci_ide.cc,v 1.20 2006-02-26 19:11:20 vruppert Exp $
// $Id: pci_ide.cc,v 1.21 2006-03-06 19:23:13 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2002 MandrakeSoft S.A.
@ -51,12 +51,11 @@ libpci_ide_LTX_plugin_init(plugin_t *plugin, plugintype_t type, int argc, char *
return(0); // Success
}
void
libpci_ide_LTX_plugin_fini(void)
void libpci_ide_LTX_plugin_fini(void)
{
}
bx_pci_ide_c::bx_pci_ide_c(void)
bx_pci_ide_c::bx_pci_ide_c()
{
put("PIDE");
settype(PCIIDELOG);
@ -66,7 +65,7 @@ bx_pci_ide_c::bx_pci_ide_c(void)
s.bmdma[1].buffer = NULL;
}
bx_pci_ide_c::~bx_pci_ide_c(void)
bx_pci_ide_c::~bx_pci_ide_c()
{
if (s.bmdma[0].buffer != NULL) {
delete [] s.bmdma[0].buffer;
@ -77,9 +76,7 @@ bx_pci_ide_c::~bx_pci_ide_c(void)
BX_DEBUG(("Exit."));
}
void
bx_pci_ide_c::init(void)
void bx_pci_ide_c::init(void)
{
unsigned i;
@ -145,24 +142,20 @@ bx_pci_ide_c::bmdma_present(void)
return (BX_PIDE_THIS s.bmdma_addr > 0);
}
void
bx_pci_ide_c::bmdma_set_irq(Bit8u channel)
void bx_pci_ide_c::bmdma_set_irq(Bit8u channel)
{
if (channel < 2) {
BX_PIDE_THIS s.bmdma[channel].status |= 0x04;
}
}
void
bx_pci_ide_c::timer_handler(void *this_ptr)
void bx_pci_ide_c::timer_handler(void *this_ptr)
{
bx_pci_ide_c *class_ptr = (bx_pci_ide_c *) this_ptr;
class_ptr->timer();
}
void
bx_pci_ide_c::timer()
void bx_pci_ide_c::timer()
{
int timer_id, count;
Bit8u channel;
@ -182,7 +175,7 @@ bx_pci_ide_c::timer()
(BX_PIDE_THIS s.bmdma[channel].prd_current == 0)) {
return;
}
BX_MEM_READ_PHYSICAL(BX_PIDE_THIS s.bmdma[channel].prd_current, 8, (Bit8u *)&prd);
DEV_MEM_READ_PHYSICAL(BX_PIDE_THIS s.bmdma[channel].prd_current, 8, (Bit8u *)&prd);
size = prd.size & 0xfffe;
if (size == 0) {
size = 0x10000;
@ -203,12 +196,12 @@ bx_pci_ide_c::timer()
BX_PIDE_THIS s.bmdma[channel].status |= 0x06;
return;
} else {
BX_MEM_WRITE_PHYSICAL(prd.addr, size, BX_PIDE_THIS s.bmdma[channel].buffer_idx);
DEV_MEM_WRITE_PHYSICAL(prd.addr, size, BX_PIDE_THIS s.bmdma[channel].buffer_idx);
BX_PIDE_THIS s.bmdma[channel].buffer_idx += size;
}
} else {
BX_DEBUG(("WRITE DMA from addr=0x%08x, size=0x%08x", prd.addr, size));
BX_MEM_READ_PHYSICAL(prd.addr, size, BX_PIDE_THIS s.bmdma[channel].buffer_top);
DEV_MEM_READ_PHYSICAL(prd.addr, size, BX_PIDE_THIS s.bmdma[channel].buffer_top);
BX_PIDE_THIS s.bmdma[channel].buffer_top += size;
count = BX_PIDE_THIS s.bmdma[channel].buffer_top - BX_PIDE_THIS s.bmdma[channel].buffer_idx;
while (count > 511) {
@ -232,7 +225,7 @@ bx_pci_ide_c::timer()
DEV_hd_bmdma_complete(channel);
} else {
BX_PIDE_THIS s.bmdma[channel].prd_current += 8;
BX_MEM_READ_PHYSICAL(BX_PIDE_THIS s.bmdma[channel].prd_current, 8, (Bit8u *)&prd);
DEV_MEM_READ_PHYSICAL(BX_PIDE_THIS s.bmdma[channel].prd_current, 8, (Bit8u *)&prd);
size = prd.size & 0xfffe;
if (size == 0) {
size = 0x10000;
@ -242,21 +235,17 @@ bx_pci_ide_c::timer()
}
// static IO port read callback handler
// redirects to non-static class handler to avoid virtual functions
// static IO port read callback handler
// redirects to non-static class handler to avoid virtual functions
Bit32u
bx_pci_ide_c::read_handler(void *this_ptr, Bit32u address, unsigned io_len)
Bit32u bx_pci_ide_c::read_handler(void *this_ptr, Bit32u address, unsigned io_len)
{
#if !BX_USE_PIDE_SMF
bx_pci_ide_c *class_ptr = (bx_pci_ide_c *) this_ptr;
return( class_ptr->read(address, io_len) );
return class_ptr->read(address, io_len);
}
Bit32u
bx_pci_ide_c::read(Bit32u address, unsigned io_len)
Bit32u bx_pci_ide_c::read(Bit32u address, unsigned io_len)
{
#else
UNUSED(this_ptr);
@ -287,11 +276,10 @@ bx_pci_ide_c::read(Bit32u address, unsigned io_len)
}
// static IO port write callback handler
// redirects to non-static class handler to avoid virtual functions
// static IO port write callback handler
// redirects to non-static class handler to avoid virtual functions
void
bx_pci_ide_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
void bx_pci_ide_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
{
#if !BX_USE_PIDE_SMF
bx_pci_ide_c *class_ptr = (bx_pci_ide_c *) this_ptr;
@ -299,8 +287,7 @@ bx_pci_ide_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsign
class_ptr->write(address, value, io_len);
}
void
bx_pci_ide_c::write(Bit32u address, Bit32u value, unsigned io_len)
void bx_pci_ide_c::write(Bit32u address, Bit32u value, unsigned io_len)
{
#else
UNUSED(this_ptr);
@ -340,21 +327,17 @@ bx_pci_ide_c::write(Bit32u address, Bit32u value, unsigned io_len)
}
// static pci configuration space read callback handler
// redirects to non-static class handler to avoid virtual functions
// static pci configuration space read callback handler
// redirects to non-static class handler to avoid virtual functions
Bit32u
bx_pci_ide_c::pci_read_handler(void *this_ptr, Bit8u address, unsigned io_len)
Bit32u bx_pci_ide_c::pci_read_handler(void *this_ptr, Bit8u address, unsigned io_len)
{
#if !BX_USE_PIDE_SMF
bx_pci_ide_c *class_ptr = (bx_pci_ide_c *) this_ptr;
return( class_ptr->pci_read(address, io_len) );
return class_ptr->pci_read(address, io_len);
}
Bit32u
bx_pci_ide_c::pci_read(Bit8u address, unsigned io_len)
Bit32u bx_pci_ide_c::pci_read(Bit8u address, unsigned io_len)
{
#else
UNUSED(this_ptr);
@ -373,21 +356,17 @@ bx_pci_ide_c::pci_read(Bit8u address, unsigned io_len)
}
}
// static pci configuration space write callback handler
// redirects to non-static class handler to avoid virtual functions
// static pci configuration space write callback handler
// redirects to non-static class handler to avoid virtual functions
void
bx_pci_ide_c::pci_write_handler(void *this_ptr, Bit8u address, Bit32u value, unsigned io_len)
void bx_pci_ide_c::pci_write_handler(void *this_ptr, Bit8u address, Bit32u value, unsigned io_len)
{
#if !BX_USE_PIDE_SMF
bx_pci_ide_c *class_ptr = (bx_pci_ide_c *) this_ptr;
class_ptr->pci_write(address, value, io_len);
}
void
bx_pci_ide_c::pci_write(Bit8u address, Bit32u value, unsigned io_len)
void bx_pci_ide_c::pci_write(Bit8u address, Bit32u value, unsigned io_len)
{
#else
UNUSED(this_ptr);

6
bochs/iodev/pci_ide.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: pci_ide.h,v 1.7 2005-10-29 12:35:01 vruppert Exp $
// $Id: pci_ide.h,v 1.8 2006-03-06 19:23:13 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2004 MandrakeSoft S.A.
@ -39,8 +39,8 @@
class bx_pci_ide_c : public bx_pci_ide_stub_c {
public:
bx_pci_ide_c(void);
~bx_pci_ide_c(void);
bx_pci_ide_c();
~bx_pci_ide_c();
virtual void init(void);
virtual void reset(unsigned type);
virtual bx_bool bmdma_present(void);

24
bochs/iodev/pciusb.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: pciusb.cc,v 1.33 2006-03-01 17:14:36 vruppert Exp $
// $Id: pciusb.cc,v 1.34 2006-03-06 19:23:13 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2004 MandrakeSoft S.A.
@ -635,7 +635,7 @@ void bx_pciusb_c::usb_timer(void)
Bit32u item, address, lastvertaddr = 0, queue_num = 0;
Bit32u frame, frm_addr = BX_USB_THIS hub[0].usb_frame_base.frame_base +
(BX_USB_THIS hub[0].usb_frame_num.frame_num << 2);
BX_MEM_READ_PHYSICAL(frm_addr, 4, &frame);
DEV_MEM_READ_PHYSICAL(frm_addr, 4, &frame);
if ((frame & 1) == 0) {
stack[stk].next = (frame & ~0xF);
stack[stk].d = 0;
@ -655,14 +655,14 @@ void bx_pciusb_c::usb_timer(void)
lastvertaddr = address + 4;
// get HORZ slot
stk++;
BX_MEM_READ_PHYSICAL(address, 4, &item);
DEV_MEM_READ_PHYSICAL(address, 4, &item);
stack[stk].next = item & ~0xF;
stack[stk].d = HC_HORZ;
stack[stk].q = (item & 0x0002) ? 1 : 0;
stack[stk].t = (item & 0x0001) ? 1 : 0;
// get VERT slot
stk++;
BX_MEM_READ_PHYSICAL(lastvertaddr, 4, &item);
DEV_MEM_READ_PHYSICAL(lastvertaddr, 4, &item);
stack[stk].next = item & ~0xF;
stack[stk].d = HC_VERT;
stack[stk].q = (item & 0x0002) ? 1 : 0;
@ -673,7 +673,7 @@ void bx_pciusb_c::usb_timer(void)
queue_num++;
} else { // else is a TD
address = stack[stk].next;
BX_MEM_READ_PHYSICAL(address, 32, &td);
DEV_MEM_READ_PHYSICAL(address, 32, &td);
bx_bool spd = (td.dword1 & (1<<29)) ? 1 : 0;
stack[stk].next = td.dword0 & ~0xF;
bx_bool depthbreadth = (td.dword0 & 0x0004) ? 1 : 0; // 1 = depth first, 0 = breadth first
@ -693,10 +693,10 @@ void bx_pciusb_c::usb_timer(void)
}
if (td.dword1 & (1<<22)) stalled = 1;
BX_MEM_WRITE_PHYSICAL(address+4, 4, &td.dword1); // write back the status
DEV_MEM_WRITE_PHYSICAL(address+4, 4, &td.dword1); // write back the status
// copy pointer for next queue item, in to vert queue head
if ((stk > 0) && !shortpacket && (stack[stk].d == HC_VERT))
BX_MEM_WRITE_PHYSICAL(lastvertaddr, 4, &td.dword0);
DEV_MEM_WRITE_PHYSICAL(lastvertaddr, 4, &td.dword0);
}
}
@ -777,7 +777,7 @@ bx_bool bx_pciusb_c::DoTransfer(Bit32u address, Bit32u queue_num, struct TD *td)
// if packet, read in the packet data
if (pid == TOKEN_SETUP) {
if (td->dword3) BX_MEM_READ_PHYSICAL(td->dword3, 8, data);
if (td->dword3) DEV_MEM_READ_PHYSICAL(td->dword3, 8, data);
// the '8' above may need to be maxlen (unless maxlen == 0)
}
@ -855,7 +855,7 @@ bx_bool bx_pciusb_c::DoTransfer(Bit32u address, Bit32u queue_num, struct TD *td)
memcpy(device_buffer, BX_USB_THIS key_pad_packet, 8);
BX_MEM_WRITE_PHYSICAL(td->dword3, cnt, device_buffer);
DEV_MEM_WRITE_PHYSICAL(td->dword3, cnt, device_buffer);
BX_USB_THIS set_status(td, 0, 0, 0, 0, 0, 0, cnt-1);
break;
@ -872,7 +872,7 @@ bx_bool bx_pciusb_c::DoTransfer(Bit32u address, Bit32u queue_num, struct TD *td)
BX_USB_THIS mouse_x = 0;
BX_USB_THIS mouse_y = 0;
BX_USB_THIS mouse_z = 0;
BX_MEM_WRITE_PHYSICAL(td->dword3, cnt, device_buffer);
DEV_MEM_WRITE_PHYSICAL(td->dword3, cnt, device_buffer);
BX_USB_THIS set_status(td, 0, 0, 0, 0, 0, 0, cnt-1);
break;
@ -917,7 +917,7 @@ bx_bool bx_pciusb_c::DoTransfer(Bit32u address, Bit32u queue_num, struct TD *td)
if (dev->function.in_cnt > 0) {
bx_gui->statusbar_setitem(BX_USB_THIS hub[0].statusbar_id[0], 1);
cnt = (dev->function.in_cnt < maxlen) ? dev->function.in_cnt : maxlen;
BX_MEM_WRITE_PHYSICAL(td->dword3, cnt, dev->function.in);
DEV_MEM_WRITE_PHYSICAL(td->dword3, cnt, dev->function.in);
dump_packet(dev->function.in, cnt);
dev->function.in += cnt;
dev->function.in_cnt -= cnt;
@ -943,7 +943,7 @@ bx_bool bx_pciusb_c::DoTransfer(Bit32u address, Bit32u queue_num, struct TD *td)
if (fnd) {
// Read in the packet
Bit8u bulk_int_packet[1024];
BX_MEM_READ_PHYSICAL(td->dword3, maxlen, bulk_int_packet);
DEV_MEM_READ_PHYSICAL(td->dword3, maxlen, bulk_int_packet);
// now do the task
switch (protocol) {

74
bochs/memory/memory.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: memory.cc,v 1.48 2006-03-03 12:55:37 sshwarts Exp $
// $Id: memory.cc,v 1.49 2006-03-06 19:23:13 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -36,32 +36,36 @@ BX_MEM_C::writePhysicalPage(BX_CPU_C *cpu, Bit32u addr, unsigned len, void *data
Bit8u *data_ptr;
Bit32u a20addr = A20ADDR(addr);
// Note: accesses should always be contained within a single page now.
// Note: accesses should always be contained within a single page now
if (cpu != NULL) {
#if BX_SUPPORT_IODEBUG
bx_iodebug_c::mem_write(cpu, a20addr, len, data);
bx_iodebug_c::mem_write(cpu, a20addr, len, data);
#endif
BX_INSTR_PHY_WRITE(cpu->which_cpu(), a20addr, len);
BX_INSTR_PHY_WRITE(cpu->which_cpu(), a20addr, len);
#if BX_DEBUGGER
// (mch) Check for physical write break points, TODO
// (bbd) Each breakpoint should have an associated CPU#, TODO
for (int i = 0; i < num_write_watchpoints; i++)
if (write_watchpoint[i] == a20addr) {
BX_CPU(0)->watchpoint = a20addr;
BX_CPU(0)->break_point = BREAK_POINT_WRITE;
break;
}
// (mch) Check for physical write break points, TODO
// (bbd) Each breakpoint should have an associated CPU#, TODO
for (int i = 0; i < num_write_watchpoints; i++) {
if (write_watchpoint[i] == a20addr) {
BX_CPU(0)->watchpoint = a20addr;
BX_CPU(0)->break_point = BREAK_POINT_WRITE;
break;
}
}
#endif
#if BX_SUPPORT_APIC
bx_generic_apic_c *local_apic = &cpu->local_apic;
if (local_apic->is_selected (a20addr, len)) {
local_apic->write(a20addr, (Bit32u *)data, len);
return;
}
bx_generic_apic_c *local_apic = &cpu->local_apic;
if (local_apic->is_selected (a20addr, len)) {
local_apic->write(a20addr, (Bit32u *)data, len);
return;
}
#endif
}
struct memory_handler_struct *memory_handler = memory_handlers[a20addr >> 20];
while (memory_handler) {
@ -195,30 +199,36 @@ BX_MEM_C::readPhysicalPage(BX_CPU_C *cpu, Bit32u addr, unsigned len, void *data)
Bit8u *data_ptr;
Bit32u a20addr = A20ADDR(addr);
// Note: accesses should always be contained within a single page now
if (cpu != NULL) {
#if BX_SUPPORT_IODEBUG
bx_iodebug_c::mem_read(cpu, a20addr, len, data);
bx_iodebug_c::mem_read(cpu, a20addr, len, data);
#endif
BX_INSTR_PHY_READ(cpu->which_cpu(), a20addr, len);
BX_INSTR_PHY_READ(cpu->which_cpu(), a20addr, len);
#if BX_DEBUGGER
// (mch) Check for physical read break points, TODO
// (bbd) Each breakpoint should have an associated CPU#, TODO
for (int i = 0; i < num_read_watchpoints; i++)
if (read_watchpoint[i] == a20addr) {
BX_CPU(0)->watchpoint = a20addr;
BX_CPU(0)->break_point = BREAK_POINT_READ;
break;
}
// (mch) Check for physical read break points, TODO
// (bbd) Each breakpoint should have an associated CPU#, TODO
for (int i = 0; i < num_read_watchpoints; i++) {
if (read_watchpoint[i] == a20addr) {
BX_CPU(0)->watchpoint = a20addr;
BX_CPU(0)->break_point = BREAK_POINT_READ;
break;
}
}
#endif
#if BX_SUPPORT_APIC
bx_generic_apic_c *local_apic = &cpu->local_apic;
if (local_apic->is_selected (a20addr, len)) {
local_apic->read(a20addr, data, len);
return;
}
bx_generic_apic_c *local_apic = &cpu->local_apic;
if (local_apic->is_selected (a20addr, len)) {
local_apic->read(a20addr, data, len);
return;
}
#endif
}
struct memory_handler_struct *memory_handler = memory_handlers[a20addr >> 20];
while (memory_handler) {

4
bochs/memory/memory.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: memory.h,v 1.31 2006-02-27 19:04:01 sshwarts Exp $
// $Id: memory.h,v 1.32 2006-03-06 19:23:13 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -40,6 +40,8 @@
# define BX_MEM_THIS this->
#endif
class BX_CPU_C;
// alignment of memory vector, must be a power of 2
#define BX_MEM_VECTOR_ALIGN 4096
#define BIOSROMSZ (1 << 19) // 512KB BIOS ROM @0xfff80000, must be a power of 2