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2899 Commits

Author SHA1 Message Date
Stanislav Shwartsman
eb9778220d fixed decoding of 0f3a opcode map 2013-11-20 20:46:03 +00:00
Stanislav Shwartsman
b553591bb4 fixed compilation error under AVX 2013-11-20 17:33:57 +00:00
Stanislav Shwartsman
7f8429c643 fix code duplication in fetchdecode modules 2013-11-20 16:00:24 +00:00
Stanislav Shwartsman
9b22ba7edf softfloat: added float to uint64 conversion operations (based on QEMU patch by Tom Musta) 2013-11-10 19:08:12 +00:00
Stanislav Shwartsman
3be7e5884b added lock prefix used info into bx_Instriction_c and use it in disasm 2013-11-08 21:43:21 +00:00
Stanislav Shwartsman
4b03247287 fixed compilation error with vs2008 2013-10-25 05:36:10 +00:00
Stanislav Shwartsman
d9fc472ba7 Added VMEXIT instrumentation callback 
Fixed possible RSP corruption in SMP mode - the speculative_rsp variable might be not reset properly
 2013-10-23 21:18:19 +00:00
Stanislav Shwartsman
d52adaa0ee improve debug print to the log file which is printed in case of triple fault - tell VMX host/guest info 2013-10-20 16:41:34 +00:00
Stanislav Shwartsman
39f2f172b5 fixed PAUSE/NOP decoding bug in prev commit 2013-10-16 05:46:57 +00:00
Stanislav Shwartsman
8bcc8cf073 split PREFETCH opcode to Group16 for better disasm of bxInstruction_c 2013-10-15 21:21:28 +00:00
Stanislav Shwartsman
940c2a1c8e fixes for disasm 2013-10-15 17:19:18 +00:00
Stanislav Shwartsman
e1012f1165 add vmcs revision id interface to CPUID class 2013-10-14 18:35:56 +00:00
Stanislav Shwartsman
9fb7384e6b finish sse tables cleanup in disasm and fetchdecode 2013-10-11 20:09:51 +00:00
Stanislav Shwartsman
05d2bb2b9a fixed typo bug caused spurios #UD on SSE shift 2013-10-11 06:20:42 +00:00
Stanislav Shwartsman
5fc491e9b6 resolve aliases after actually decoding base instr 2013-10-11 05:58:30 +00:00
Stanislav Shwartsman
34025e469f resolve aliases after actually decoding base instr 2013-10-11 05:54:18 +00:00
Stanislav Shwartsman
582bf84bae apply same optimization to disasm as well 2013-10-10 21:00:26 +00:00
Stanislav Shwartsman
46e36b463b size-optimization for SSE opcode tables 2013-10-10 20:21:15 +00:00
Stanislav Shwartsman
2ec138f96e Apply patch from developers mailing list: 
bx_debug: allow expressions instead of numerals, where relevant
by Samium Gromoff

fix code duplication in fma handlers
 2013-10-09 20:04:05 +00:00
Stanislav Shwartsman
0b2e533a55 more avx512 instructions done 2013-10-09 19:45:36 +00:00
Stanislav Shwartsman
d6d1c707df implemented set of integer avx512 instructions 2013-10-08 19:44:52 +00:00
Stanislav Shwartsman
70230049fa opmask_ok support in fetchdecode32.cc 2013-10-08 18:40:10 +00:00
Stanislav Shwartsman
09254eb474 avx512 implementation fixes and next steps 2013-10-08 18:31:18 +00:00
Stanislav Shwartsman
8446685ba2 fixed FPU and MMX disasm 2013-10-07 20:55:43 +00:00
Stanislav Shwartsman
5724013e7d updates to AVX512 decoding and CPUID 2013-10-07 20:39:34 +00:00
Stanislav Shwartsman
cb0eee9456 disasm fixes 2013-10-07 19:02:53 +00:00
Stanislav Shwartsman
059769e2a6 disasm bug fixes 2013-10-06 20:42:13 +00:00
Stanislav Shwartsman
f0b917ca15 disasm fixes 2013-10-06 19:27:40 +00:00
Stanislav Shwartsman
e55611df21 disasm fixes 2013-10-06 19:04:52 +00:00
Stanislav Shwartsman
add8eea761 disasm bug fixes 2013-10-06 18:37:56 +00:00
Stanislav Shwartsman
f1f35a236c disasm: Id form in 32-bit should be sign-extended to 64-bit 2013-10-06 18:10:58 +00:00
Stanislav Shwartsman
a392612b03 fixed compilation err in cpu-level=3 config 2013-10-06 18:01:25 +00:00
Stanislav Shwartsman
e1512ccaf8 fixed warning under new MSDEV compiler 2013-10-05 19:35:00 +00:00
Stanislav Shwartsman
fd370a4d41 fixes in disasm, added example of using bxInstruction_c disasm into dbg_main.cc (commented out for now) 2013-10-05 19:32:09 +00:00
Stanislav Shwartsman
b1d703e47c fixed compilation with x86-64 off 2013-10-05 18:51:28 +00:00
Stanislav Shwartsman
67bce7af97 fixed memref disasm 2013-10-05 11:00:31 +00:00
Stanislav Shwartsman
d4bfbffdbb disasm fixes 2013-10-05 08:34:09 +00:00
Stanislav Shwartsman
c9a1f259cb fixed compilation error in new disasm module under SMP config 2013-10-04 18:14:54 +00:00
Stanislav Shwartsman
ba1249ed15 disasm fixes 2013-10-04 17:26:56 +00:00
Stanislav Shwartsman
85b0402668 fixes for disasm 2013-10-02 19:23:34 +00:00
Stanislav Shwartsman
8c60799e72 fix for new disasm interface 2013-10-01 20:17:21 +00:00
Stanislav Shwartsman
e592f81209 updates to internal disasm 2013-10-01 18:47:55 +00:00
Stanislav Shwartsman
147d788022 few fixes in new disasm module 2013-09-30 20:16:52 +00:00
Stanislav Shwartsman
fd383435f0 - Initial code for bx_Instruction_c disassembler which (together with Bochs decoder) will replace Bochs disasm module someday (very soon). 
The code already knows to disasm most of the opcodes with their operands.

- Split according to OSIZE opcodes RDFSBASE/WRFSBASE / RDGSBASE/WRGSBASE both for disasm and performance

- Minimize amount of opcode forms in ia_opcodes.h again.
  For example Udq means the same as Wdq but with no memory form.
 2013-09-30 19:01:42 +00:00
Stanislav Shwartsman
fa06b26c88 Make possible to deliver instruction name for disasm directly from bx_ia_opcode_name (some opcodes were renamed). 
Fixed bug in stack optimization in 64-bit mode (should result in some speedup)
ia_opcode.h - eliminate some OP_M cases when they actually meant "value of specific type in the memory"
example: "MOVBE Md, Gd" actually means "MOVBE Ed, Gd"which just not have reg/reg form.
 2013-09-26 18:54:32 +00:00
Stanislav Shwartsman
839b841c38 added register type to register source information in decoder 2013-09-24 09:50:25 +00:00
Stanislav Shwartsman
ff79cbd596 Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm) 
The end goal will be also merging of disasm and cpu decoder to one module and remove the disasm.

Two bug fixes on the way:
TBM: fixed 64-bit TBM instructions with memory access (did 32-bit load instead of 64-bit)
BMI2: fixed operands order for PEXT/PDEP instructions
AVX2: fixed gather instruction decoding bug from decoder alias commit
 2013-09-24 05:21:00 +00:00
Stanislav Shwartsman
f791802286 infrastructure change for several AVX handlers to support any VL and only 128/256 2013-09-21 20:40:57 +00:00
Stanislav Shwartsman
404b8b1475 move end of trace indication to separate 'flags' field of bx_ia_opcode. this saves a lot of code duplication and simplifies the decode tables. also on the way found missing SVM opcodes that missed 'end of trace' mark 2013-09-21 18:58:01 +00:00
Stanislav Shwartsman
047b17d415 fixed typo in makefile 2013-09-21 10:52:18 +00:00