2008-09-16 23:20:03 +04:00
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/////////////////////////////////////////////////////////////////////////
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2011-02-25 00:54:04 +03:00
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// $Id$
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2008-09-16 23:20:03 +04:00
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/////////////////////////////////////////////////////////////////////////
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//
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2019-12-19 23:08:49 +03:00
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// Copyright (c) 2008-2019 Stanislav Shwartsman
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2008-09-16 23:20:03 +04:00
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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2009-01-16 21:18:59 +03:00
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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2008-09-16 23:20:03 +04:00
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Eb(bxInstruction_c *i)
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2008-09-16 23:20:03 +04:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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2008-09-16 23:20:03 +04:00
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TMP8L = read_virtual_byte(i->seg(), eaddr);
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2013-10-05 23:35:00 +04:00
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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2008-09-16 23:20:03 +04:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Ew(bxInstruction_c *i)
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2008-09-16 23:20:03 +04:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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2008-09-16 23:20:03 +04:00
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TMP16 = read_virtual_word(i->seg(), eaddr);
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2013-10-05 23:35:00 +04:00
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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2008-09-16 23:20:03 +04:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Ed(bxInstruction_c *i)
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2008-09-16 23:20:03 +04:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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2008-09-16 23:20:03 +04:00
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TMP32 = read_virtual_dword(i->seg(), eaddr);
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2013-10-05 23:35:00 +04:00
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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2008-09-16 23:20:03 +04:00
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}
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#if BX_SUPPORT_X86_64
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Eq(bxInstruction_c *i)
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2008-09-16 23:20:03 +04:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR_64(i);
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2014-10-21 01:08:29 +04:00
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TMP64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
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2013-10-05 23:35:00 +04:00
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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2008-09-16 23:20:03 +04:00
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}
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#endif
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2010-12-23 00:16:02 +03:00
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Wb(bxInstruction_c *i)
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2011-08-27 17:47:16 +04:00
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{
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#if BX_CPU_LEVEL >= 6
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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2011-12-10 22:58:25 +04:00
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Bit8u val_8 = read_virtual_byte(i->seg(), eaddr);
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2013-08-24 16:12:10 +04:00
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BX_WRITE_XMM_REG_LO_BYTE(BX_VECTOR_TMP_REGISTER, val_8);
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2011-08-27 17:47:16 +04:00
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2013-10-05 23:35:00 +04:00
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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2011-08-27 17:47:16 +04:00
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#endif
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Ww(bxInstruction_c *i)
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2010-12-25 22:34:43 +03:00
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{
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#if BX_CPU_LEVEL >= 6
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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2010-12-25 22:34:43 +03:00
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Bit16u val_16 = read_virtual_word(i->seg(), eaddr);
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2013-08-24 16:12:10 +04:00
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BX_WRITE_XMM_REG_LO_WORD(BX_VECTOR_TMP_REGISTER, val_16);
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2010-12-25 22:34:43 +03:00
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2013-10-05 23:35:00 +04:00
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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2010-12-25 22:34:43 +03:00
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#endif
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Wss(bxInstruction_c *i)
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2010-12-23 00:16:02 +03:00
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{
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2010-12-25 18:00:20 +03:00
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#if BX_CPU_LEVEL >= 6
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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2010-12-23 00:16:02 +03:00
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Bit32u val_32 = read_virtual_dword(i->seg(), eaddr);
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2013-08-24 16:12:10 +04:00
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BX_WRITE_XMM_REG_LO_DWORD(BX_VECTOR_TMP_REGISTER, val_32);
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2010-12-23 00:16:02 +03:00
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2013-10-05 23:35:00 +04:00
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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2010-12-25 18:00:20 +03:00
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#endif
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2010-12-23 00:16:02 +03:00
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}
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2019-12-20 00:12:23 +03:00
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#if BX_SUPPORT_EVEX
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_MASK_Wss(bxInstruction_c *i)
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{
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Bit32u val_32 = 0;
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if (BX_SCALAR_ELEMENT_MASK(i->opmask())) {
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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val_32 = read_virtual_dword(i->seg(), eaddr);
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}
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BX_WRITE_XMM_REG_LO_DWORD(BX_VECTOR_TMP_REGISTER, val_32);
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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}
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#endif
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Wsd(bxInstruction_c *i)
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2010-12-23 00:16:02 +03:00
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{
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2010-12-25 18:00:20 +03:00
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#if BX_CPU_LEVEL >= 6
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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2010-12-23 00:16:02 +03:00
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Bit64u val_64 = read_virtual_qword(i->seg(), eaddr);
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2013-08-24 16:12:10 +04:00
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BX_WRITE_XMM_REG_LO_QWORD(BX_VECTOR_TMP_REGISTER, val_64);
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2010-12-23 00:16:02 +03:00
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2013-10-05 23:35:00 +04:00
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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2010-12-25 18:00:20 +03:00
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#endif
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2010-12-23 00:16:02 +03:00
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}
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2019-12-20 00:12:23 +03:00
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#if BX_SUPPORT_EVEX
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_MASK_Wsd(bxInstruction_c *i)
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{
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Bit64u val_64 = 0;
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if (BX_SCALAR_ELEMENT_MASK(i->opmask())) {
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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val_64 = read_virtual_qword(i->seg(), eaddr);
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}
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2019-12-21 23:30:15 +03:00
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BX_WRITE_XMM_REG_LO_QWORD(BX_VECTOR_TMP_REGISTER, val_64);
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2019-12-20 00:12:23 +03:00
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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}
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#endif
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Wdq(bxInstruction_c *i)
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2010-12-23 00:16:02 +03:00
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{
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2010-12-25 18:00:20 +03:00
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#if BX_CPU_LEVEL >= 6
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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2010-12-23 00:24:19 +03:00
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2011-01-12 23:16:25 +03:00
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if (BX_CPU_THIS_PTR mxcsr.get_MM())
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2020-10-03 12:37:06 +03:00
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read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
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2011-01-12 23:16:25 +03:00
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else
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2013-08-24 16:12:10 +04:00
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read_virtual_xmmword_aligned(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
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2010-12-23 00:16:02 +03:00
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2013-10-05 23:35:00 +04:00
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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2010-12-25 18:00:20 +03:00
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#endif
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2010-12-23 00:16:02 +03:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOADU_Wdq(bxInstruction_c *i)
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2010-12-23 00:16:02 +03:00
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{
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2010-12-25 18:00:20 +03:00
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#if BX_CPU_LEVEL >= 6
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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2013-08-24 16:12:10 +04:00
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read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
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2011-03-19 23:09:34 +03:00
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2013-10-05 23:35:00 +04:00
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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2011-03-19 23:09:34 +03:00
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#endif
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}
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#if BX_SUPPORT_AVX
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Vector(bxInstruction_c *i)
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2011-03-19 23:09:34 +03:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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2014-02-11 20:10:31 +04:00
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unsigned len = i->getVL();
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2010-12-23 00:16:02 +03:00
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2013-12-10 00:36:24 +04:00
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#if BX_SUPPORT_EVEX
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2022-07-30 14:31:16 +03:00
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if (len == BX_VL512) {
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read_virtual_zmmword(i->seg(), eaddr, &BX_READ_AVX_REG(BX_VECTOR_TMP_REGISTER));
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}
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else
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#endif
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{
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if (len == BX_VL256)
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read_virtual_ymmword(i->seg(), eaddr, &BX_READ_YMM_REG(BX_VECTOR_TMP_REGISTER));
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else
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read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
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}
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2011-03-19 23:09:34 +03:00
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2013-10-05 23:35:00 +04:00
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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2011-03-19 23:09:34 +03:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Half_Vector(bxInstruction_c *i)
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2013-09-05 22:29:50 +04:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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2014-02-11 20:10:31 +04:00
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unsigned len = i->getVL();
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2013-09-05 22:29:50 +04:00
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2013-12-10 00:36:24 +04:00
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#if BX_SUPPORT_EVEX
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2022-07-30 14:31:16 +03:00
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if (len == BX_VL512) {
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read_virtual_ymmword(i->seg(), eaddr, &BX_READ_YMM_REG(BX_VECTOR_TMP_REGISTER));
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}
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else
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#endif
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{
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if (len == BX_VL256) {
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read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
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}
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else {
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2013-12-10 00:36:24 +04:00
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Bit64u val_64 = read_virtual_qword(i->seg(), eaddr);
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BX_WRITE_XMM_REG_LO_QWORD(BX_VECTOR_TMP_REGISTER, val_64);
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}
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2013-09-05 22:29:50 +04:00
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}
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2013-10-05 23:35:00 +04:00
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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2013-09-05 22:29:50 +04:00
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}
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2018-02-16 10:57:32 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Quarter_Vector(bxInstruction_c *i)
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2014-02-02 23:56:08 +04:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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2014-02-11 20:10:31 +04:00
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unsigned len = i->getVL();
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2014-02-02 23:56:08 +04:00
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#if BX_SUPPORT_EVEX
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2022-07-30 14:31:16 +03:00
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if (len == BX_VL512) {
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read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
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}
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else
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#endif
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{
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if (len == BX_VL256) {
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2014-02-02 23:56:08 +04:00
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Bit64u val_64 = read_virtual_qword(i->seg(), eaddr);
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BX_WRITE_XMM_REG_LO_QWORD(BX_VECTOR_TMP_REGISTER, val_64);
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2022-07-30 14:31:16 +03:00
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}
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else {
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2014-02-02 23:56:08 +04:00
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Bit32u val_32 = read_virtual_dword(i->seg(), eaddr);
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BX_WRITE_XMM_REG_LO_DWORD(BX_VECTOR_TMP_REGISTER, val_32);
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}
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}
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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}
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2019-12-21 18:54:52 +03:00
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Eighth_Vector(bxInstruction_c *i)
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2014-02-02 23:56:08 +04:00
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{
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2015-05-17 00:06:59 +03:00
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bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
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2014-02-11 20:10:31 +04:00
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unsigned len = i->getVL();
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2014-02-02 23:56:08 +04:00
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#if BX_SUPPORT_EVEX
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2022-07-30 14:31:16 +03:00
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if (len == BX_VL512) {
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2014-02-02 23:56:08 +04:00
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Bit64u val_64 = read_virtual_qword(i->seg(), eaddr);
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BX_WRITE_XMM_REG_LO_QWORD(BX_VECTOR_TMP_REGISTER, val_64);
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2022-07-30 14:31:16 +03:00
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}
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else
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#endif
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{
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if (len == BX_VL256) {
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2014-02-02 23:56:08 +04:00
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Bit32u val_32 = read_virtual_dword(i->seg(), eaddr);
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BX_WRITE_XMM_REG_LO_DWORD(BX_VECTOR_TMP_REGISTER, val_32);
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2022-07-30 14:31:16 +03:00
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|
|
}
|
|
|
|
else {
|
2014-02-02 23:56:08 +04:00
|
|
|
Bit16u val_16 = read_virtual_word(i->seg(), eaddr);
|
|
|
|
BX_WRITE_XMM_REG_LO_WORD(BX_VECTOR_TMP_REGISTER, val_16);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i));
|
|
|
|
}
|
|
|
|
|
2011-03-19 23:09:34 +03:00
|
|
|
#endif
|
2013-09-16 00:48:39 +04:00
|
|
|
|
|
|
|
#if BX_SUPPORT_EVEX
|
|
|
|
|
|
|
|
#include "simd_int.h"
|
|
|
|
|
2019-12-19 23:08:49 +03:00
|
|
|
// load vector of bytes, support masked fault suppression, no broadcast
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_MASK_VectorB(bxInstruction_c *i)
|
|
|
|
{
|
2019-12-20 00:36:13 +03:00
|
|
|
Bit64u opmask = (i->opmask() != 0) ? BX_READ_OPMASK(i->opmask()) : BX_CONST64(0xffffffffffffffff);
|
2019-12-19 23:08:49 +03:00
|
|
|
|
|
|
|
if (opmask == 0) {
|
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i)); // for now let execute method to deal with zero/merge masking semantics
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
|
|
|
|
avx_masked_load8(i, eaddr, &BX_READ_AVX_REG(BX_VECTOR_TMP_REGISTER), opmask);
|
|
|
|
|
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i));
|
|
|
|
}
|
|
|
|
|
2014-07-26 01:45:09 +04:00
|
|
|
// load vector of words, support masked fault suppression, no broadcast
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_MASK_VectorW(bxInstruction_c *i)
|
2014-07-26 01:45:09 +04:00
|
|
|
{
|
|
|
|
Bit32u opmask = (i->opmask() != 0) ? BX_READ_32BIT_OPMASK(i->opmask()) : 0xffffffff;
|
|
|
|
|
|
|
|
if (opmask == 0) {
|
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i)); // for now let execute method to deal with zero/merge masking semantics
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2015-05-17 00:06:59 +03:00
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
|
2014-07-26 01:45:09 +04:00
|
|
|
avx_masked_load16(i, eaddr, &BX_READ_AVX_REG(BX_VECTOR_TMP_REGISTER), opmask);
|
|
|
|
|
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i));
|
|
|
|
}
|
|
|
|
|
2019-12-21 18:47:29 +03:00
|
|
|
// load vector of dwords, support masked fault suppression, no broadcast
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_MASK_VectorD(bxInstruction_c *i)
|
|
|
|
{
|
|
|
|
Bit32u opmask = (i->opmask() != 0) ? BX_READ_16BIT_OPMASK(i->opmask()) : 0xffff;
|
|
|
|
|
|
|
|
if (opmask == 0) {
|
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i)); // for now let execute method to deal with zero/merge masking semantics
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
|
|
|
|
avx_masked_load32(i, eaddr, &BX_READ_AVX_REG(BX_VECTOR_TMP_REGISTER), opmask);
|
|
|
|
|
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i));
|
|
|
|
}
|
|
|
|
|
|
|
|
// load vector of qwords, support masked fault suppression, no broadcast
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_MASK_VectorQ(bxInstruction_c *i)
|
|
|
|
{
|
|
|
|
Bit32u opmask = (i->opmask() != 0) ? BX_READ_8BIT_OPMASK(i->opmask()) : 0xff;
|
|
|
|
|
|
|
|
if (opmask == 0) {
|
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i)); // for now let execute method to deal with zero/merge masking semantics
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
|
|
|
|
avx_masked_load64(i, eaddr, &BX_READ_AVX_REG(BX_VECTOR_TMP_REGISTER), opmask);
|
|
|
|
|
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i));
|
|
|
|
}
|
|
|
|
|
2014-07-26 01:45:09 +04:00
|
|
|
// load vector of dwords, support broadcast, no fault suppression
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_BROADCAST_VectorD(bxInstruction_c *i)
|
2013-09-16 00:48:39 +04:00
|
|
|
{
|
2015-05-17 00:06:59 +03:00
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
|
2014-02-11 20:10:31 +04:00
|
|
|
unsigned len = i->getVL();
|
2013-09-16 00:48:39 +04:00
|
|
|
|
2013-09-19 22:31:30 +04:00
|
|
|
if (i->getEvexb()) {
|
2013-09-16 00:48:39 +04:00
|
|
|
Bit32u val_32 = read_virtual_dword(i->seg(), eaddr);
|
2014-02-11 20:10:31 +04:00
|
|
|
simd_pbroadcastd(&BX_AVX_REG(BX_VECTOR_TMP_REGISTER), val_32, len * 4);
|
2013-09-16 00:48:39 +04:00
|
|
|
}
|
|
|
|
else {
|
2022-07-30 14:31:16 +03:00
|
|
|
if (len == BX_VL512)
|
|
|
|
read_virtual_zmmword(i->seg(), eaddr, &BX_READ_AVX_REG(BX_VECTOR_TMP_REGISTER));
|
|
|
|
if (len == BX_VL256)
|
|
|
|
read_virtual_ymmword(i->seg(), eaddr, &BX_READ_YMM_REG(BX_VECTOR_TMP_REGISTER));
|
|
|
|
else
|
|
|
|
read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
|
|
|
|
}
|
|
|
|
|
2013-10-05 23:35:00 +04:00
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i));
|
2013-09-16 00:48:39 +04:00
|
|
|
}
|
|
|
|
|
2014-07-26 01:45:09 +04:00
|
|
|
// load vector of dwords, support broadcast and masked fault suppression
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_BROADCAST_MASK_VectorD(bxInstruction_c *i)
|
2013-09-16 00:48:39 +04:00
|
|
|
{
|
2019-12-13 17:57:32 +03:00
|
|
|
unsigned len = i->getVL();
|
2013-12-09 23:09:37 +04:00
|
|
|
Bit32u opmask = (i->opmask() != 0) ? BX_READ_16BIT_OPMASK(i->opmask()) : 0xffff;
|
2019-12-21 23:07:03 +03:00
|
|
|
opmask &= CUT_OPMASK_TO(DWORD_ELEMENTS(len));
|
2013-12-09 01:54:59 +04:00
|
|
|
|
|
|
|
if (opmask == 0) {
|
2013-12-03 19:44:23 +04:00
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i)); // for now let execute method to deal with zero/merge masking semantics
|
|
|
|
return;
|
2013-09-16 00:48:39 +04:00
|
|
|
}
|
|
|
|
|
2015-05-17 00:06:59 +03:00
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
|
2014-07-26 01:45:09 +04:00
|
|
|
|
2013-12-09 01:54:59 +04:00
|
|
|
if (i->getEvexb()) {
|
2019-12-13 17:57:32 +03:00
|
|
|
Bit32u val_32 = read_virtual_dword(i->seg(), eaddr);
|
2014-02-11 20:10:31 +04:00
|
|
|
simd_pbroadcastd(&BX_AVX_REG(BX_VECTOR_TMP_REGISTER), val_32, len * 4);
|
2013-12-09 01:54:59 +04:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
avx_masked_load32(i, eaddr, &BX_READ_AVX_REG(BX_VECTOR_TMP_REGISTER), opmask);
|
2022-07-30 14:31:16 +03:00
|
|
|
}
|
|
|
|
|
2013-12-09 01:54:59 +04:00
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i));
|
|
|
|
}
|
|
|
|
|
2014-07-26 01:45:09 +04:00
|
|
|
// load vector of qwords, support broadcast, no fault suppression
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_BROADCAST_VectorQ(bxInstruction_c *i)
|
2013-12-09 01:54:59 +04:00
|
|
|
{
|
2015-05-17 00:06:59 +03:00
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
|
2014-02-11 20:10:31 +04:00
|
|
|
unsigned len = i->getVL();
|
2013-12-09 01:54:59 +04:00
|
|
|
|
2013-09-19 22:31:30 +04:00
|
|
|
if (i->getEvexb()) {
|
2013-09-16 00:48:39 +04:00
|
|
|
Bit64u val_64 = read_virtual_qword(i->seg(), eaddr);
|
2014-02-11 20:10:31 +04:00
|
|
|
simd_pbroadcastq(&BX_AVX_REG(BX_VECTOR_TMP_REGISTER), val_64, len * 2);
|
2013-09-16 00:48:39 +04:00
|
|
|
}
|
|
|
|
else {
|
2022-07-30 14:31:16 +03:00
|
|
|
if (len == BX_VL512)
|
|
|
|
read_virtual_zmmword(i->seg(), eaddr, &BX_READ_AVX_REG(BX_VECTOR_TMP_REGISTER));
|
|
|
|
if (len == BX_VL256)
|
|
|
|
read_virtual_ymmword(i->seg(), eaddr, &BX_READ_YMM_REG(BX_VECTOR_TMP_REGISTER));
|
|
|
|
else
|
|
|
|
read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
|
|
|
|
}
|
|
|
|
|
2013-10-05 23:35:00 +04:00
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i));
|
2013-09-16 00:48:39 +04:00
|
|
|
}
|
|
|
|
|
2014-07-26 01:45:09 +04:00
|
|
|
// load vector of qwords, support broadcast and masked fault suppression
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_BROADCAST_MASK_VectorQ(bxInstruction_c *i)
|
2013-12-09 01:54:59 +04:00
|
|
|
{
|
2019-12-13 17:57:32 +03:00
|
|
|
unsigned len = i->getVL();
|
2013-12-09 23:09:37 +04:00
|
|
|
Bit32u opmask = (i->opmask() != 0) ? BX_READ_8BIT_OPMASK(i->opmask()) : 0xff;
|
2019-12-21 23:07:03 +03:00
|
|
|
opmask &= CUT_OPMASK_TO(QWORD_ELEMENTS(len));
|
2013-12-09 01:54:59 +04:00
|
|
|
|
|
|
|
if (opmask == 0) {
|
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i)); // for now let execute method to deal with zero/merge masking semantics
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2015-05-17 00:06:59 +03:00
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
|
2014-07-26 01:45:09 +04:00
|
|
|
|
2013-12-09 01:54:59 +04:00
|
|
|
if (i->getEvexb()) {
|
2019-12-13 17:57:32 +03:00
|
|
|
Bit64u val_64 = read_virtual_qword(i->seg(), eaddr);
|
2014-02-11 20:10:31 +04:00
|
|
|
simd_pbroadcastq(&BX_AVX_REG(BX_VECTOR_TMP_REGISTER), val_64, len * 2);
|
2013-12-09 01:54:59 +04:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
avx_masked_load64(i, eaddr, &BX_READ_AVX_REG(BX_VECTOR_TMP_REGISTER), opmask);
|
2022-07-30 14:31:16 +03:00
|
|
|
}
|
|
|
|
|
2013-12-09 01:54:59 +04:00
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i));
|
|
|
|
}
|
|
|
|
|
2014-07-26 01:45:09 +04:00
|
|
|
// load half vector of dwords, support broadcast, no fault suppression
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_BROADCAST_Half_VectorD(bxInstruction_c *i)
|
2014-02-11 20:10:31 +04:00
|
|
|
{
|
2015-05-17 00:06:59 +03:00
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
|
2014-02-11 20:10:31 +04:00
|
|
|
unsigned len = i->getVL();
|
|
|
|
|
|
|
|
if (i->getEvexb()) {
|
|
|
|
Bit32u val_32 = read_virtual_dword(i->seg(), eaddr);
|
|
|
|
simd_pbroadcastd(&BX_AVX_REG(BX_VECTOR_TMP_REGISTER), val_32, len * 2);
|
|
|
|
}
|
|
|
|
else {
|
2022-07-30 14:31:16 +03:00
|
|
|
if (len == BX_VL512) {
|
|
|
|
read_virtual_ymmword(i->seg(), eaddr, &BX_READ_YMM_REG(BX_VECTOR_TMP_REGISTER));
|
|
|
|
}
|
|
|
|
if (len == BX_VL256) {
|
|
|
|
read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
|
|
|
|
}
|
|
|
|
else {
|
2014-02-11 20:10:31 +04:00
|
|
|
Bit64u val_64 = read_virtual_qword(i->seg(), eaddr);
|
|
|
|
BX_WRITE_XMM_REG_LO_QWORD(BX_VECTOR_TMP_REGISTER, val_64);
|
|
|
|
}
|
2022-07-30 14:31:16 +03:00
|
|
|
}
|
|
|
|
|
2014-02-11 20:10:31 +04:00
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i));
|
|
|
|
}
|
|
|
|
|
2014-07-26 01:45:09 +04:00
|
|
|
// load half vector of dwords, support broadcast and masked fault suppression
|
2018-02-16 10:57:32 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_BROADCAST_MASK_Half_VectorD(bxInstruction_c *i)
|
2014-02-11 20:10:31 +04:00
|
|
|
{
|
|
|
|
unsigned len = i->getVL();
|
|
|
|
Bit32u opmask = (i->opmask() != 0) ? BX_READ_16BIT_OPMASK(i->opmask()) : 0xffff;
|
2019-12-21 23:07:03 +03:00
|
|
|
opmask &= CUT_OPMASK_TO(DWORD_ELEMENTS(len)-1);
|
2014-02-11 20:10:31 +04:00
|
|
|
|
|
|
|
if (opmask == 0) {
|
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i)); // for now let execute method to deal with zero/merge masking semantics
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2015-05-17 00:06:59 +03:00
|
|
|
bx_address eaddr = BX_CPU_RESOLVE_ADDR(i);
|
2014-07-26 01:45:09 +04:00
|
|
|
|
2014-02-11 20:10:31 +04:00
|
|
|
if (i->getEvexb()) {
|
2019-12-13 17:57:32 +03:00
|
|
|
Bit32u val_32 = read_virtual_dword(i->seg(), eaddr);
|
2014-02-11 20:10:31 +04:00
|
|
|
simd_pbroadcastd(&BX_AVX_REG(BX_VECTOR_TMP_REGISTER), val_32, len * 2);
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
avx_masked_load32(i, eaddr, &BX_READ_AVX_REG(BX_VECTOR_TMP_REGISTER), opmask);
|
2022-07-30 14:31:16 +03:00
|
|
|
}
|
|
|
|
|
2014-02-11 20:10:31 +04:00
|
|
|
BX_CPU_CALL_METHOD(i->execute2(), (i));
|
|
|
|
}
|
|
|
|
|
2013-09-16 00:48:39 +04:00
|
|
|
#endif
|