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code reorg : take laddr calculation out of 64-bit memory handlers. this creates generic linear address memory handlers which now could be used elsewhere

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This commit is contained in:
Stanislav Shwartsman 2014-10-20 21:08:29 +00:00
parent 59f5a03af6
commit ea91354b3b
18 changed files with 216 additions and 248 deletions
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91
bochs/cpu/access64.cc
View File

@ -29,11 +29,10 @@
#if BX_SUPPORT_X86_64
void BX_CPP_AttrRegparmN(3)
BX_CPU_C::write_virtual_byte_64(unsigned s, Bit64u offset, Bit8u data)
BX_CPU_C::write_linear_byte(unsigned s, Bit64u laddr, Bit8u data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
Bit64u lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -57,11 +56,10 @@ BX_CPU_C::write_virtual_byte_64(unsigned s, Bit64u offset, Bit8u data)
}
void BX_CPP_AttrRegparmN(3)
BX_CPU_C::write_virtual_word_64(unsigned s, Bit64u offset, Bit16u data)
BX_CPU_C::write_linear_word(unsigned s, Bit64u laddr, Bit16u data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
#if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
Bit64u lpf = AlignedAccessLPFOf(laddr, (1 & BX_CPU_THIS_PTR alignment_check_mask));
@ -89,11 +87,10 @@ BX_CPU_C::write_virtual_word_64(unsigned s, Bit64u offset, Bit16u data)
}
void BX_CPP_AttrRegparmN(3)
BX_CPU_C::write_virtual_dword_64(unsigned s, Bit64u offset, Bit32u data)
BX_CPU_C::write_linear_dword(unsigned s, Bit64u laddr, Bit32u data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
#if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
Bit64u lpf = AlignedAccessLPFOf(laddr, (3 & BX_CPU_THIS_PTR alignment_check_mask));
@ -117,7 +114,7 @@ BX_CPU_C::write_virtual_dword_64(unsigned s, Bit64u offset, Bit32u data)
}
if (! IsCanonical(laddr)) {
BX_ERROR(("write_virtual_dword_64(): canonical failure"));
BX_ERROR(("write_linear_dword(): canonical failure"));
exception(int_number(s), 0);
}
@ -126,11 +123,10 @@ BX_CPU_C::write_virtual_dword_64(unsigned s, Bit64u offset, Bit32u data)
}
void BX_CPP_AttrRegparmN(3)
BX_CPU_C::write_virtual_qword_64(unsigned s, Bit64u offset, Bit64u data)
BX_CPU_C::write_linear_qword(unsigned s, Bit64u laddr, Bit64u data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
#if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
Bit64u lpf = AlignedAccessLPFOf(laddr, (7 & BX_CPU_THIS_PTR alignment_check_mask));
@ -154,7 +150,7 @@ BX_CPU_C::write_virtual_qword_64(unsigned s, Bit64u offset, Bit64u data)
}
if (! IsCanonical(laddr)) {
BX_ERROR(("write_virtual_qword_64(): canonical failure"));
BX_ERROR(("write_linear_qword(): canonical failure"));
exception(int_number(s), 0);
}
@ -163,11 +159,10 @@ BX_CPU_C::write_virtual_qword_64(unsigned s, Bit64u offset, Bit64u data)
}
void BX_CPP_AttrRegparmN(3)
BX_CPU_C::write_virtual_xmmword_64(unsigned s, Bit64u offset, const BxPackedXmmRegister *data)
BX_CPU_C::write_linear_xmmword(unsigned s, Bit64u laddr, const BxPackedXmmRegister *data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 15);
Bit64u lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -192,11 +187,10 @@ BX_CPU_C::write_virtual_xmmword_64(unsigned s, Bit64u offset, const BxPackedXmmR
}
void BX_CPP_AttrRegparmN(3)
BX_CPU_C::write_virtual_xmmword_aligned_64(unsigned s, Bit64u offset, const BxPackedXmmRegister *data)
BX_CPU_C::write_linear_xmmword_aligned(unsigned s, Bit64u laddr, const BxPackedXmmRegister *data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
Bit64u lpf = AlignedAccessLPFOf(laddr, 15);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -217,7 +211,7 @@ BX_CPU_C::write_virtual_xmmword_aligned_64(unsigned s, Bit64u offset, const BxPa
}
if (laddr & 15) {
BX_ERROR(("write_virtual_xmmword_aligned_64(): #GP misaligned access"));
BX_ERROR(("write_linear_xmmword_aligned(): #GP misaligned access"));
exception(BX_GP_EXCEPTION, 0);
}
@ -227,11 +221,10 @@ BX_CPU_C::write_virtual_xmmword_aligned_64(unsigned s, Bit64u offset, const BxPa
#if BX_SUPPORT_AVX
void BX_CPU_C::write_virtual_ymmword_64(unsigned s, Bit64u offset, const BxPackedYmmRegister *data)
void BX_CPU_C::write_linear_ymmword(unsigned s, Bit64u laddr, const BxPackedYmmRegister *data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 31);
Bit64u lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -256,11 +249,10 @@ void BX_CPU_C::write_virtual_ymmword_64(unsigned s, Bit64u offset, const BxPacke
exception(int_number(s), 0);
}
void BX_CPU_C::write_virtual_ymmword_aligned_64(unsigned s, Bit64u offset, const BxPackedYmmRegister *data)
void BX_CPU_C::write_linear_ymmword_aligned(unsigned s, Bit64u laddr, const BxPackedYmmRegister *data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
Bit64u lpf = AlignedAccessLPFOf(laddr, 31);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -282,7 +274,7 @@ void BX_CPU_C::write_virtual_ymmword_aligned_64(unsigned s, Bit64u offset, const
}
if (laddr & 31) {
BX_ERROR(("write_virtual_ymmword_aligned_64(): #GP misaligned access"));
BX_ERROR(("write_linear_ymmword_aligned(): #GP misaligned access"));
exception(BX_GP_EXCEPTION, 0);
}
@ -294,11 +286,10 @@ void BX_CPU_C::write_virtual_ymmword_aligned_64(unsigned s, Bit64u offset, const
#if BX_SUPPORT_EVEX
void BX_CPU_C::write_virtual_zmmword_64(unsigned s, Bit64u offset, const BxPackedZmmRegister *data)
void BX_CPU_C::write_linear_zmmword(unsigned s, Bit64u laddr, const BxPackedZmmRegister *data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 63);
Bit64u lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -323,11 +314,10 @@ void BX_CPU_C::write_virtual_zmmword_64(unsigned s, Bit64u offset, const BxPacke
exception(int_number(s), 0);
}
void BX_CPU_C::write_virtual_zmmword_aligned_64(unsigned s, Bit64u offset, const BxPackedZmmRegister *data)
void BX_CPU_C::write_linear_zmmword_aligned(unsigned s, Bit64u laddr, const BxPackedZmmRegister *data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
Bit64u lpf = AlignedAccessLPFOf(laddr, 63);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -349,7 +339,7 @@ void BX_CPU_C::write_virtual_zmmword_aligned_64(unsigned s, Bit64u offset, const
}
if (laddr & 63) {
BX_ERROR(("write_virtual_zmmword_aligned_64(): #GP misaligned access"));
BX_ERROR(("write_linear_zmmword_aligned(): #GP misaligned access"));
exception(BX_GP_EXCEPTION, 0);
}
@ -360,12 +350,11 @@ void BX_CPU_C::write_virtual_zmmword_aligned_64(unsigned s, Bit64u offset, const
#endif
Bit8u BX_CPP_AttrRegparmN(2)
BX_CPU_C::read_virtual_byte_64(unsigned s, Bit64u offset)
BX_CPU_C::read_linear_byte(unsigned s, Bit64u laddr)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit8u data;
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
Bit64u lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -389,12 +378,11 @@ BX_CPU_C::read_virtual_byte_64(unsigned s, Bit64u offset)
}
Bit16u BX_CPP_AttrRegparmN(2)
BX_CPU_C::read_virtual_word_64(unsigned s, Bit64u offset)
BX_CPU_C::read_linear_word(unsigned s, Bit64u laddr)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit16u data;
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
#if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
Bit64u lpf = AlignedAccessLPFOf(laddr, (1 & BX_CPU_THIS_PTR alignment_check_mask));
@ -422,12 +410,11 @@ BX_CPU_C::read_virtual_word_64(unsigned s, Bit64u offset)
}
Bit32u BX_CPP_AttrRegparmN(2)
BX_CPU_C::read_virtual_dword_64(unsigned s, Bit64u offset)
BX_CPU_C::read_linear_dword(unsigned s, Bit64u laddr)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit32u data;
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
#if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
Bit64u lpf = AlignedAccessLPFOf(laddr, (3 & BX_CPU_THIS_PTR alignment_check_mask));
@ -455,12 +442,11 @@ BX_CPU_C::read_virtual_dword_64(unsigned s, Bit64u offset)
}
Bit64u BX_CPP_AttrRegparmN(2)
BX_CPU_C::read_virtual_qword_64(unsigned s, Bit64u offset)
BX_CPU_C::read_linear_qword(unsigned s, Bit64u laddr)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u data;
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
#if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
Bit64u lpf = AlignedAccessLPFOf(laddr, (7 & BX_CPU_THIS_PTR alignment_check_mask));
@ -488,11 +474,10 @@ BX_CPU_C::read_virtual_qword_64(unsigned s, Bit64u offset)
}
void BX_CPP_AttrRegparmN(3)
BX_CPU_C::read_virtual_xmmword_64(unsigned s, Bit64u offset, BxPackedXmmRegister *data)
BX_CPU_C::read_linear_xmmword(unsigned s, Bit64u laddr, BxPackedXmmRegister *data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 15);
Bit64u lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -515,11 +500,10 @@ BX_CPU_C::read_virtual_xmmword_64(unsigned s, Bit64u offset, BxPackedXmmRegister
}
void BX_CPP_AttrRegparmN(3)
BX_CPU_C::read_virtual_xmmword_aligned_64(unsigned s, Bit64u offset, BxPackedXmmRegister *data)
BX_CPU_C::read_linear_xmmword_aligned(unsigned s, Bit64u laddr, BxPackedXmmRegister *data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
Bit64u lpf = AlignedAccessLPFOf(laddr, 15);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -538,7 +522,7 @@ BX_CPU_C::read_virtual_xmmword_aligned_64(unsigned s, Bit64u offset, BxPackedXmm
}
if (laddr & 15) {
BX_ERROR(("read_virtual_xmmword_aligned_64(): #GP misaligned access"));
BX_ERROR(("read_linear_xmmword_aligned(): #GP misaligned access"));
exception(BX_GP_EXCEPTION, 0);
}
@ -548,11 +532,10 @@ BX_CPU_C::read_virtual_xmmword_aligned_64(unsigned s, Bit64u offset, BxPackedXmm
#if BX_SUPPORT_AVX
void BX_CPU_C::read_virtual_ymmword_64(unsigned s, Bit64u offset, BxPackedYmmRegister *data)
void BX_CPU_C::read_linear_ymmword(unsigned s, Bit64u laddr, BxPackedYmmRegister *data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 31);
Bit64u lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -575,11 +558,10 @@ void BX_CPU_C::read_virtual_ymmword_64(unsigned s, Bit64u offset, BxPackedYmmReg
exception(int_number(s), 0);
}
void BX_CPU_C::read_virtual_ymmword_aligned_64(unsigned s, Bit64u offset, BxPackedYmmRegister *data)
void BX_CPU_C::read_linear_ymmword_aligned(unsigned s, Bit64u laddr, BxPackedYmmRegister *data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
Bit64u lpf = AlignedAccessLPFOf(laddr, 31);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -599,7 +581,7 @@ void BX_CPU_C::read_virtual_ymmword_aligned_64(unsigned s, Bit64u offset, BxPack
}
if (laddr & 31) {
BX_ERROR(("read_virtual_ymmword_aligned_64(): #GP misaligned access"));
BX_ERROR(("read_linear_ymmword_aligned(): #GP misaligned access"));
exception(BX_GP_EXCEPTION, 0);
}
@ -611,11 +593,10 @@ void BX_CPU_C::read_virtual_ymmword_aligned_64(unsigned s, Bit64u offset, BxPack
#if BX_SUPPORT_EVEX
void BX_CPU_C::read_virtual_zmmword_64(unsigned s, Bit64u offset, BxPackedZmmRegister *data)
void BX_CPU_C::read_linear_zmmword(unsigned s, Bit64u laddr, BxPackedZmmRegister *data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 63);
Bit64u lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -638,11 +619,10 @@ void BX_CPU_C::read_virtual_zmmword_64(unsigned s, Bit64u offset, BxPackedZmmReg
exception(int_number(s), 0);
}
void BX_CPU_C::read_virtual_zmmword_aligned_64(unsigned s, Bit64u offset, BxPackedZmmRegister *data)
void BX_CPU_C::read_linear_zmmword_aligned(unsigned s, Bit64u laddr, BxPackedZmmRegister *data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
Bit64u lpf = AlignedAccessLPFOf(laddr, 63);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -662,7 +642,7 @@ void BX_CPU_C::read_virtual_zmmword_aligned_64(unsigned s, Bit64u offset, BxPack
}
if (laddr & 63) {
BX_ERROR(("read_virtual_zmmword_aligned_64(): #GP misaligned access"));
BX_ERROR(("read_linear_zmmword_aligned(): #GP misaligned access"));
exception(BX_GP_EXCEPTION, 0);
}
@ -678,12 +658,11 @@ void BX_CPU_C::read_virtual_zmmword_aligned_64(unsigned s, Bit64u offset, BxPack
//////////////////////////////////////////////////////////////
Bit8u BX_CPP_AttrRegparmN(2)
BX_CPU_C::read_RMW_virtual_byte_64(unsigned s, Bit64u offset)
BX_CPU_C::read_RMW_virtual_byte_64(unsigned s, Bit64u laddr)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit8u data;
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
Bit64u lpf = LPFOf(laddr);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];
@ -711,12 +690,11 @@ BX_CPU_C::read_RMW_virtual_byte_64(unsigned s, Bit64u offset)
}
Bit16u BX_CPP_AttrRegparmN(2)
BX_CPU_C::read_RMW_virtual_word_64(unsigned s, Bit64u offset)
BX_CPU_C::read_RMW_virtual_word_64(unsigned s, Bit64u laddr)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit16u data;
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
#if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
Bit64u lpf = AlignedAccessLPFOf(laddr, (1 & BX_CPU_THIS_PTR alignment_check_mask));
@ -748,12 +726,11 @@ BX_CPU_C::read_RMW_virtual_word_64(unsigned s, Bit64u offset)
}
Bit32u BX_CPP_AttrRegparmN(2)
BX_CPU_C::read_RMW_virtual_dword_64(unsigned s, Bit64u offset)
BX_CPU_C::read_RMW_virtual_dword_64(unsigned s, Bit64u laddr)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit32u data;
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
#if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
Bit64u lpf = AlignedAccessLPFOf(laddr, (3 & BX_CPU_THIS_PTR alignment_check_mask));
@ -785,12 +762,11 @@ BX_CPU_C::read_RMW_virtual_dword_64(unsigned s, Bit64u offset)
}
Bit64u BX_CPP_AttrRegparmN(2)
BX_CPU_C::read_RMW_virtual_qword_64(unsigned s, Bit64u offset)
BX_CPU_C::read_RMW_virtual_qword_64(unsigned s, Bit64u laddr)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u data;
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
#if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
Bit64u lpf = AlignedAccessLPFOf(laddr, (7 & BX_CPU_THIS_PTR alignment_check_mask));
@ -821,11 +797,10 @@ BX_CPU_C::read_RMW_virtual_qword_64(unsigned s, Bit64u offset)
return data;
}
void BX_CPU_C::read_RMW_virtual_dqword_aligned_64(unsigned s, Bit64u offset, Bit64u *hi, Bit64u *lo)
void BX_CPU_C::read_RMW_virtual_dqword_aligned_64(unsigned s, Bit64u laddr, Bit64u *hi, Bit64u *lo)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
Bit64u lpf = AlignedAccessLPFOf(laddr, 15);
bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[tlbIndex];

42
bochs/cpu/arith64.cc
View File

@ -33,7 +33,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EqGqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
sum_64 = op1_64 + op2_64;
write_RMW_virtual_qword(sum_64);
@ -64,7 +64,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_GqEqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = read_virtual_qword_64(i->seg(), eaddr);
op2_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
sum_64 = op1_64 + op2_64;
BX_WRITE_64BIT_REG(i->dst(), sum_64);
@ -80,7 +80,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EqGqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
sum_64 = op1_64 + op2_64 + getB_CF();
write_RMW_virtual_qword(sum_64);
@ -112,7 +112,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_GqEqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = read_virtual_qword_64(i->seg(), eaddr);
op2_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
sum_64 = op1_64 + op2_64 + getB_CF();
BX_WRITE_64BIT_REG(i->dst(), sum_64);
@ -129,7 +129,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EqGqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
diff_64 = op1_64 - (op2_64 + getB_CF());
write_RMW_virtual_qword(diff_64);
@ -161,7 +161,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_GqEqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = read_virtual_qword_64(i->seg(), eaddr);
op2_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
diff_64 = op1_64 - (op2_64 + getB_CF());
BX_WRITE_64BIT_REG(i->dst(), diff_64);
@ -178,7 +178,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EqIdM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = (Bit32s) i->Id();
diff_64 = op1_64 - (op2_64 + getB_CF());
write_RMW_virtual_qword(diff_64);
@ -209,7 +209,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EqGqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
diff_64 = op1_64 - op2_64;
write_RMW_virtual_qword(diff_64);
@ -241,7 +241,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_GqEqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = read_virtual_qword_64(i->seg(), eaddr);
op2_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
diff_64 = op1_64 - op2_64;
BX_WRITE_64BIT_REG(i->dst(), diff_64);
@ -257,7 +257,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EqGqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = read_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
diff_64 = op1_64 - op2_64;
@ -286,7 +286,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_GqEqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = read_virtual_qword_64(i->seg(), eaddr);
op2_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
diff_64 = op1_64 - op2_64;
SET_FLAGS_OSZAPC_SUB_64(op1_64, op2_64, diff_64);
@ -327,7 +327,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XADD_EqGqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
sum_64 = op1_64 + op2_64;
write_RMW_virtual_qword(sum_64);
@ -373,7 +373,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EqIdM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = (Bit32s) i->Id();
sum_64 = op1_64 + op2_64;
write_RMW_virtual_qword(sum_64);
@ -404,7 +404,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EqIdM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = (Bit32s) i->Id();
sum_64 = op1_64 + op2_64 + getB_CF();
write_RMW_virtual_qword(sum_64);
@ -435,7 +435,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EqIdM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = (Bit32s) i->Id();
diff_64 = op1_64 - op2_64;
write_RMW_virtual_qword(diff_64);
@ -465,7 +465,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EqIdM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = read_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = (Bit32s) i->Id();
diff_64 = op1_64 - op2_64;
@ -491,7 +491,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NEG_EqM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op1_64 = - (Bit64s)(op1_64);
write_RMW_virtual_qword(op1_64);
@ -515,7 +515,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::INC_EqM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op1_64++;
write_RMW_virtual_qword(op1_64);
@ -536,7 +536,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::DEC_EqM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op1_64--;
write_RMW_virtual_qword(op1_64);
@ -557,7 +557,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EqGqM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
Bit64u diff_64 = RAX - op1_64;
SET_FLAGS_OSZAPC_SUB_64(RAX, op1_64, diff_64);
@ -599,7 +599,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG16B(bxInstruction_c *i)
Bit64u op1_64_lo, op1_64_hi, diff;
// check write permission for following write
read_RMW_virtual_dqword_aligned_64(i->seg(), eaddr, &op1_64_hi, &op1_64_lo);
read_RMW_virtual_dqword_aligned_64(i->seg(), get_laddr64(i->seg(), eaddr), &op1_64_hi, &op1_64_lo);
diff = RAX - op1_64_lo;
diff |= RDX - op1_64_hi;

8
bochs/cpu/bit.cc
View File

@ -334,7 +334,6 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_GwMw(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16u val16 = read_virtual_word(i->seg(), eaddr);
BX_WRITE_16BIT_REG(i->dst(), bx_bswap16(val16));
BX_NEXT_INSTR(i);
@ -343,7 +342,6 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_GwMw(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_MwGw(bxInstruction_c *i)
{
Bit16u val16 = BX_READ_16BIT_REG(i->src());
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_word(i->seg(), eaddr, bx_bswap16(val16));
@ -354,7 +352,6 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_GdMd(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32u val32 = read_virtual_dword(i->seg(), eaddr);
BX_WRITE_32BIT_REGZ(i->dst(), bx_bswap32(val32));
BX_NEXT_INSTR(i);
@ -363,7 +360,6 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_GdMd(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_MdGd(bxInstruction_c *i)
{
Bit32u val32 = BX_READ_32BIT_REG(i->src());
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_dword(i->seg(), eaddr, bx_bswap32(val32));
@ -376,7 +372,6 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_GqMq(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u val64 = read_virtual_qword(i->seg(), eaddr);
BX_WRITE_64BIT_REG(i->dst(), bx_bswap64(val64));
BX_NEXT_INSTR(i);
@ -385,9 +380,8 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_GqMq(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVBE_MqGq(bxInstruction_c *i)
{
Bit64u val64 = BX_READ_64BIT_REG(i->src());
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_qword_64(i->seg(), eaddr, bx_bswap64(val64));
write_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr), bx_bswap64(val64));
BX_NEXT_INSTR(i);
}

16
bochs/cpu/bit64.cc
View File

@ -86,7 +86,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EqGqM(bxInstruction_c *i)
op1_addr = (Bit32u) op1_addr;
/* pointer, segment address pair */
op1_64 = read_virtual_qword_64(i->seg(), op1_addr);
op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), op1_addr));
set_CF((op1_64 >> index) & 0x01);
@ -122,7 +122,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqGqM(bxInstruction_c *i)
op1_addr = (Bit32u) op1_addr;
/* pointer, segment address pair */
op1_64 = read_RMW_virtual_qword_64(i->seg(), op1_addr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), op1_addr));
bit_i = (op1_64 >> index) & 0x01;
op1_64 |= (((Bit64u) 1) << index);
write_RMW_virtual_qword(op1_64);
@ -164,7 +164,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqGqM(bxInstruction_c *i)
op1_addr = (Bit32u) op1_addr;
/* pointer, segment address pair */
op1_64 = read_RMW_virtual_qword_64(i->seg(), op1_addr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), op1_addr));
bx_bool temp_cf = (op1_64 >> index) & 0x01;
op1_64 &= ~(((Bit64u) 1) << index);
/* now write back to destination */
@ -207,7 +207,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqGqM(bxInstruction_c *i)
if (! i->as64L())
op1_addr = (Bit32u) op1_addr;
op1_64 = read_RMW_virtual_qword_64(i->seg(), op1_addr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), op1_addr));
bx_bool temp_CF = (op1_64 >> index) & 0x01;
op1_64 ^= (((Bit64u) 1) << index); /* toggle bit */
set_CF(temp_CF);
@ -238,7 +238,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EqIbM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
Bit8u op2_8 = i->Ib() & 0x3f;
set_CF((op1_64 >> op2_8) & 0x01);
@ -262,7 +262,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqIbM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
op1_64 |= (((Bit64u) 1) << op2_8);
write_RMW_virtual_qword(op1_64);
@ -292,7 +292,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqIbM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
op1_64 ^= (((Bit64u) 1) << op2_8); /* toggle bit */
write_RMW_virtual_qword(op1_64);
@ -322,7 +322,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqIbM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
op1_64 &= ~(((Bit64u) 1) << op2_8);
write_RMW_virtual_qword(op1_64);

98
bochs/cpu/cpu.h
View File

@ -4490,42 +4490,42 @@ public: // for now...
BX_SMF void write_RMW_virtual_qword(Bit64u val64) BX_CPP_AttrRegparmN(1);
#if BX_SUPPORT_X86_64
BX_SMF void write_virtual_byte_64(unsigned seg, Bit64u offset, Bit8u data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_word_64(unsigned seg, Bit64u offset, Bit16u data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_dword_64(unsigned seg, Bit64u offset, Bit32u data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_qword_64(unsigned seg, Bit64u offset, Bit64u data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_xmmword_64(unsigned seg, Bit64u offset, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_virtual_xmmword_aligned_64(unsigned seg, Bit64u offset, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_linear_byte(unsigned seg, Bit64u laddr, Bit8u data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_linear_word(unsigned seg, Bit64u laddr, Bit16u data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_linear_dword(unsigned seg, Bit64u laddr, Bit32u data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_linear_qword(unsigned seg, Bit64u laddr, Bit64u data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_linear_xmmword(unsigned seg, Bit64u laddr, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
BX_SMF void write_linear_xmmword_aligned(unsigned seg, Bit64u laddr, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
#if BX_SUPPORT_AVX
BX_SMF void write_virtual_ymmword_64(unsigned seg, Bit64u offset, const BxPackedYmmRegister *data);
BX_SMF void write_virtual_ymmword_aligned_64(unsigned seg, Bit64u offset, const BxPackedYmmRegister *data);
BX_SMF void write_linear_ymmword(unsigned seg, Bit64u laddr, const BxPackedYmmRegister *data);
BX_SMF void write_linear_ymmword_aligned(unsigned seg, Bit64u laddr, const BxPackedYmmRegister *data);
#endif
#if BX_SUPPORT_EVEX
BX_SMF void write_virtual_zmmword_64(unsigned seg, Bit64u offset, const BxPackedZmmRegister *data);
BX_SMF void write_virtual_zmmword_aligned_64(unsigned seg, Bit64u offset, const BxPackedZmmRegister *data);
BX_SMF void write_linear_zmmword(unsigned seg, Bit64u laddr, const BxPackedZmmRegister *data);
BX_SMF void write_linear_zmmword_aligned(unsigned seg, Bit64u laddr, const BxPackedZmmRegister *data);
#endif
BX_SMF Bit8u read_virtual_byte_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
BX_SMF Bit16u read_virtual_word_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
BX_SMF Bit32u read_virtual_dword_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
BX_SMF Bit64u read_virtual_qword_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
BX_SMF void read_virtual_xmmword_64(unsigned seg, Bit64u off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
BX_SMF void read_virtual_xmmword_aligned_64(unsigned seg, Bit64u off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
BX_SMF Bit8u read_linear_byte(unsigned seg, Bit64u laddr) BX_CPP_AttrRegparmN(2);
BX_SMF Bit16u read_linear_word(unsigned seg, Bit64u laddr) BX_CPP_AttrRegparmN(2);
BX_SMF Bit32u read_linear_dword(unsigned seg, Bit64u laddr) BX_CPP_AttrRegparmN(2);
BX_SMF Bit64u read_linear_qword(unsigned seg, Bit64u laddr) BX_CPP_AttrRegparmN(2);
BX_SMF void read_linear_xmmword(unsigned seg, Bit64u off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
BX_SMF void read_linear_xmmword_aligned(unsigned seg, Bit64u off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
#if BX_SUPPORT_AVX
BX_SMF void read_virtual_ymmword_64(unsigned seg, Bit64u offset, BxPackedYmmRegister *data);
BX_SMF void read_virtual_ymmword_aligned_64(unsigned seg, Bit64u offset, BxPackedYmmRegister *data);
BX_SMF void read_linear_ymmword(unsigned seg, Bit64u laddr, BxPackedYmmRegister *data);
BX_SMF void read_linear_ymmword_aligned(unsigned seg, Bit64u laddr, BxPackedYmmRegister *data);
#endif
#if BX_SUPPORT_EVEX
BX_SMF void read_virtual_zmmword_64(unsigned seg, Bit64u offset, BxPackedZmmRegister *data);
BX_SMF void read_virtual_zmmword_aligned_64(unsigned seg, Bit64u offset, BxPackedZmmRegister *data);
BX_SMF void read_linear_zmmword(unsigned seg, Bit64u laddr, BxPackedZmmRegister *data);
BX_SMF void read_linear_zmmword_aligned(unsigned seg, Bit64u laddr, BxPackedZmmRegister *data);
#endif
BX_SMF Bit8u read_RMW_virtual_byte_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
BX_SMF Bit16u read_RMW_virtual_word_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
BX_SMF Bit32u read_RMW_virtual_dword_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
BX_SMF Bit64u read_RMW_virtual_qword_64(unsigned seg, Bit64u offset) BX_CPP_AttrRegparmN(2);
BX_SMF Bit8u read_RMW_virtual_byte_64(unsigned seg, Bit64u laddr) BX_CPP_AttrRegparmN(2);
BX_SMF Bit16u read_RMW_virtual_word_64(unsigned seg, Bit64u laddr) BX_CPP_AttrRegparmN(2);
BX_SMF Bit32u read_RMW_virtual_dword_64(unsigned seg, Bit64u laddr) BX_CPP_AttrRegparmN(2);
BX_SMF Bit64u read_RMW_virtual_qword_64(unsigned seg, Bit64u laddr) BX_CPP_AttrRegparmN(2);
BX_SMF void read_RMW_virtual_dqword_aligned_64(unsigned seg, Bit64u offset, Bit64u *hi, Bit64u *lo);
BX_SMF void read_RMW_virtual_dqword_aligned_64(unsigned seg, Bit64u laddr, Bit64u *hi, Bit64u *lo);
BX_SMF void write_RMW_virtual_dqword(Bit64u hi, Bit64u lo);
#endif
@ -4543,44 +4543,44 @@ public: // for now...
// write
#define write_virtual_byte(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
write_virtual_byte_64(seg, (Bit64u) offset, data) : \
write_linear_byte(seg, get_laddr64(seg, offset), data) : \
write_virtual_byte_32(seg, (Bit32u) offset, data)
#define write_virtual_word(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
write_virtual_word_64(seg, (Bit64u) offset, data) : \
write_linear_word(seg, get_laddr64(seg, offset), data) : \
write_virtual_word_32(seg, (Bit32u) offset, data)
#define write_virtual_dword(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
write_virtual_dword_64(seg, (Bit64u) offset, data) : \
write_linear_dword(seg, get_laddr64(seg, offset), data) : \
write_virtual_dword_32(seg, (Bit32u) offset, data)
#define write_virtual_qword(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
write_virtual_qword_64(seg, (Bit64u) offset, data) : \
write_linear_qword(seg, get_laddr64(seg, offset), data) : \
write_virtual_qword_32(seg, (Bit32u) offset, data)
#define write_virtual_xmmword(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
write_virtual_xmmword_64(seg, (Bit64u) offset, (const BxPackedXmmRegister*)(data)) : \
write_linear_xmmword(seg, get_laddr64(seg, offset), (const BxPackedXmmRegister*)(data)) : \
write_virtual_xmmword_32(seg, (Bit32u) offset, (const BxPackedXmmRegister*)(data))
#define write_virtual_xmmword_aligned(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
write_virtual_xmmword_aligned_64(seg, (Bit64u) offset, (const BxPackedXmmRegister*)(data)) : \
write_linear_xmmword_aligned(seg, get_laddr64(seg, offset), (const BxPackedXmmRegister*)(data)) : \
write_virtual_xmmword_aligned_32(seg, (Bit32u) offset, (const BxPackedXmmRegister*)(data))
#if BX_SUPPORT_AVX
#define write_virtual_ymmword(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
write_virtual_ymmword_64(seg, (Bit64u) offset, (const BxPackedYmmRegister*)(data)) : \
write_linear_ymmword(seg, get_laddr64(seg, offset), (const BxPackedYmmRegister*)(data)) : \
write_virtual_ymmword_32(seg, (Bit32u) offset, (const BxPackedYmmRegister*)(data))
#define write_virtual_ymmword_aligned(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
write_virtual_ymmword_aligned_64(seg, (Bit64u) offset, (const BxPackedYmmRegister*)(data)) : \
write_linear_ymmword_aligned(seg, get_laddr64(seg, offset), (const BxPackedYmmRegister*)(data)) : \
write_virtual_ymmword_aligned_32(seg, (Bit32u) offset, (const BxPackedYmmRegister*)(data))
#endif
@ -4589,12 +4589,12 @@ public: // for now...
#define write_virtual_zmmword(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
write_virtual_zmmword_64(seg, (Bit64u) offset, (const BxPackedZmmRegister*)(data)) : \
write_linear_zmmword(seg, get_laddr64(seg, offset), (const BxPackedZmmRegister*)(data)) : \
write_virtual_zmmword_32(seg, (Bit32u) offset, (const BxPackedZmmRegister*)(data))
#define write_virtual_zmmword_aligned(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
write_virtual_zmmword_aligned_64(seg, (Bit64u) offset, (const BxPackedZmmRegister*)(data)) : \
write_linear_zmmword_aligned(seg, get_laddr64(seg, offset), (const BxPackedZmmRegister*)(data)) : \
write_virtual_zmmword_aligned_32(seg, (Bit32u) offset, (const BxPackedZmmRegister*)(data))
#endif
@ -4602,44 +4602,44 @@ public: // for now...
// read
#define read_virtual_byte(seg, offset) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
read_virtual_byte_64(seg, (Bit64u) offset) : \
read_linear_byte(seg, get_laddr64(seg, offset)) : \
read_virtual_byte_32(seg, (Bit32u) offset)
#define read_virtual_word(seg, offset) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
read_virtual_word_64(seg, (Bit64u) offset) : \
read_linear_word(seg, get_laddr64(seg, offset)) : \
read_virtual_word_32(seg, (Bit32u) offset)
#define read_virtual_dword(seg, offset) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
read_virtual_dword_64(seg, (Bit64u) offset) : \
read_linear_dword(seg, get_laddr64(seg, offset)) : \
read_virtual_dword_32(seg, (Bit32u) offset)
#define read_virtual_qword(seg, offset) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
read_virtual_qword_64(seg, (Bit64u) offset) : \
read_linear_qword(seg, get_laddr64(seg, offset)) : \
read_virtual_qword_32(seg, (Bit32u) offset)
#define read_virtual_xmmword(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
read_virtual_xmmword_64(seg, (Bit64u) offset, (BxPackedXmmRegister*)(data)) : \
read_linear_xmmword(seg, get_laddr64(seg, offset), (BxPackedXmmRegister*)(data)) : \
read_virtual_xmmword_32(seg, (Bit32u) offset, (BxPackedXmmRegister*)(data))
#define read_virtual_xmmword_aligned(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
read_virtual_xmmword_aligned_64(seg, (Bit64u) offset, (BxPackedXmmRegister*)(data)) : \
read_linear_xmmword_aligned(seg, get_laddr64(seg, offset), (BxPackedXmmRegister*)(data)) : \
read_virtual_xmmword_aligned_32(seg, (Bit32u) offset, (BxPackedXmmRegister*)(data))
#if BX_SUPPORT_AVX
#define read_virtual_ymmword(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
read_virtual_ymmword_64(seg, (Bit64u) offset, (BxPackedYmmRegister*)(data)) : \
read_linear_ymmword(seg, get_laddr64(seg, offset), (BxPackedYmmRegister*)(data)) : \
read_virtual_ymmword_32(seg, (Bit32u) offset, (BxPackedYmmRegister*)(data))
#define read_virtual_ymmword_aligned(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
read_virtual_ymmword_aligned_64(seg, (Bit64u) offset, (BxPackedYmmRegister*)(data)) : \
read_linear_ymmword_aligned(seg, get_laddr64(seg, offset), (BxPackedYmmRegister*)(data)) : \
read_virtual_ymmword_aligned_32(seg, (Bit32u) offset, (BxPackedYmmRegister*)(data))
#endif
@ -4648,12 +4648,12 @@ public: // for now...
#define read_virtual_zmmword(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
read_virtual_zmmword_64(seg, (Bit64u) offset, (BxPackedZmmRegister*)(data)) : \
read_linear_zmmword(seg, get_laddr64(seg, offset), (BxPackedZmmRegister*)(data)) : \
read_virtual_zmmword_32(seg, (Bit32u) offset, (BxPackedZmmRegister*)(data))
#define read_virtual_zmmword_aligned(seg, offset, data) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
read_virtual_zmmword_aligned_64(seg, (Bit64u) offset, (BxPackedZmmRegister*)(data)) : \
read_linear_zmmword_aligned(seg, get_laddr64(seg, offset), (BxPackedZmmRegister*)(data)) : \
read_virtual_zmmword_aligned_32(seg, (Bit32u) offset, (BxPackedZmmRegister*)(data))
#endif
@ -4661,22 +4661,22 @@ public: // for now...
// RMW
#define read_RMW_virtual_byte(seg, offset) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
read_RMW_virtual_byte_64(seg, (Bit64u) offset) : \
read_RMW_virtual_byte_64(seg, get_laddr64(seg, offset)) : \
read_RMW_virtual_byte_32(seg, (Bit32u) offset)
#define read_RMW_virtual_word(seg, offset) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
read_RMW_virtual_word_64(seg, (Bit64u) offset) : \
read_RMW_virtual_word_64(seg, get_laddr64(seg, offset)) : \
read_RMW_virtual_word_32(seg, (Bit32u) offset)
#define read_RMW_virtual_dword(seg, offset) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
read_RMW_virtual_dword_64(seg, (Bit64u) offset) : \
read_RMW_virtual_dword_64(seg, get_laddr64(seg, offset)) : \
read_RMW_virtual_dword_32(seg, (Bit32u) offset)
#define read_RMW_virtual_qword(seg, offset) \
(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) ? \
read_RMW_virtual_qword_64(seg, (Bit64u) offset) : \
read_RMW_virtual_qword_64(seg, get_laddr64(seg, offset)) : \
read_RMW_virtual_qword_32(seg, (Bit32u) offset)
#else

8
bochs/cpu/ctrl_xfer64.cc
View File

@ -164,8 +164,8 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CALL64_Ep(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
Bit64u op1_64 = read_virtual_qword_64(i->seg(), eaddr);
Bit16u cs_raw = read_virtual_word_64(i->seg(), (eaddr+8) & i->asize_mask());
Bit64u op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
Bit16u cs_raw = read_linear_word(i->seg(), get_laddr64(i->seg(), (eaddr+8) & i->asize_mask()));
BX_ASSERT(protected_mode());
@ -409,8 +409,8 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JMP64_Ep(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_virtual_qword_64(i->seg(), eaddr);
Bit16u cs_raw = read_virtual_word_64(i->seg(), (eaddr+8) & i->asize_mask());
Bit64u op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
Bit16u cs_raw = read_linear_word(i->seg(), get_laddr64(i->seg(), (eaddr+8) & i->asize_mask()));
BX_ASSERT(protected_mode());

39
bochs/cpu/data_xfer64.cc
View File

@ -36,8 +36,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RRXIq(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV64_GdEdM(bxInstruction_c *i)
{
Bit64u eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32u val32 = read_virtual_dword_64(i->seg(), eaddr);
Bit32u val32 = read_linear_dword(i->seg(), get_laddr64(i->seg(), eaddr));
BX_WRITE_32BIT_REGZ(i->dst(), val32);
BX_NEXT_INSTR(i);
@ -47,7 +46,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV64_EdGdM(bxInstruction_c *i)
{
Bit64u eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_dword_64(i->seg(), eaddr, BX_READ_32BIT_REG(i->src()));
write_linear_dword(i->seg(), get_laddr64(i->seg(), eaddr), BX_READ_32BIT_REG(i->src()));
BX_NEXT_INSTR(i);
}
@ -56,7 +55,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EqGqM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_qword_64(i->seg(), eaddr, BX_READ_64BIT_REG(i->src()));
write_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr), BX_READ_64BIT_REG(i->src()));
BX_NEXT_INSTR(i);
}
@ -73,7 +72,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV64S_EqGqM(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GqEqM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u val64 = read_virtual_qword_64(i->seg(), eaddr);
Bit64u val64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
BX_WRITE_64BIT_REG(i->dst(), val64);
@ -107,56 +106,56 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LEA_GqM(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_ALOq(bxInstruction_c *i)
{
AL = read_virtual_byte_64(i->seg(), i->Iq());
AL = read_linear_byte(i->seg(), get_laddr64(i->seg(), i->Iq()));
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OqAL(bxInstruction_c *i)
{
write_virtual_byte_64(i->seg(), i->Iq(), AL);
write_linear_byte(i->seg(), get_laddr64(i->seg(), i->Iq()), AL);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_AXOq(bxInstruction_c *i)
{
AX = read_virtual_word_64(i->seg(), i->Iq());
AX = read_linear_word(i->seg(), get_laddr64(i->seg(), i->Iq()));
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OqAX(bxInstruction_c *i)
{
write_virtual_word_64(i->seg(), i->Iq(), AX);
write_linear_word(i->seg(), get_laddr64(i->seg(), i->Iq()), AX);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EAXOq(bxInstruction_c *i)
{
RAX = read_virtual_dword_64(i->seg(), i->Iq());
RAX = read_linear_dword(i->seg(), get_laddr64(i->seg(), i->Iq()));
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OqEAX(bxInstruction_c *i)
{
write_virtual_dword_64(i->seg(), i->Iq(), EAX);
write_linear_dword(i->seg(), get_laddr64(i->seg(), i->Iq()), EAX);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RAXOq(bxInstruction_c *i)
{
RAX = read_virtual_qword_64(i->seg(), i->Iq());
RAX = read_linear_qword(i->seg(), get_laddr64(i->seg(), i->Iq()));
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OqRAX(bxInstruction_c *i)
{
write_virtual_qword_64(i->seg(), i->Iq(), RAX);
write_linear_qword(i->seg(), get_laddr64(i->seg(), i->Iq()), RAX);
BX_NEXT_INSTR(i);
}
@ -167,7 +166,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EqIdM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_qword_64(i->seg(), eaddr, op_64);
write_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr), op_64);
BX_NEXT_INSTR(i);
}
@ -184,7 +183,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GqEbM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit8u op2_8 = read_virtual_byte_64(i->seg(), eaddr);
Bit8u op2_8 = read_linear_byte(i->seg(), get_laddr64(i->seg(), eaddr));
/* zero extend byte op2 into qword op1 */
BX_WRITE_64BIT_REG(i->dst(), (Bit64u) op2_8);
@ -206,7 +205,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GqEwM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16u op2_16 = read_virtual_word_64(i->seg(), eaddr);
Bit16u op2_16 = read_linear_word(i->seg(), get_laddr64(i->seg(), eaddr));
/* zero extend word op2 into qword op1 */
BX_WRITE_64BIT_REG(i->dst(), (Bit64u) op2_16);
@ -228,7 +227,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEbM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit8u op2_8 = read_virtual_byte_64(i->seg(), eaddr);
Bit8u op2_8 = read_linear_byte(i->seg(), get_laddr64(i->seg(), eaddr));
/* sign extend byte op2 into qword op1 */
BX_WRITE_64BIT_REG(i->dst(), (Bit8s) op2_8);
@ -250,7 +249,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEwM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16u op2_16 = read_virtual_word_64(i->seg(), eaddr);
Bit16u op2_16 = read_linear_word(i->seg(), get_laddr64(i->seg(), eaddr));
/* sign extend word op2 into qword op1 */
BX_WRITE_64BIT_REG(i->dst(), (Bit16s) op2_16);
@ -272,7 +271,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GqEdM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32u op2_32 = read_virtual_dword_64(i->seg(), eaddr);
Bit32u op2_32 = read_linear_dword(i->seg(), get_laddr64(i->seg(), eaddr));
/* sign extend word op2 into qword op1 */
BX_WRITE_64BIT_REG(i->dst(), (Bit32s) op2_32);
@ -294,7 +293,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EqGqM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
Bit64u op2_64 = BX_READ_64BIT_REG(i->src());
write_RMW_virtual_qword(op2_64);

2
bochs/cpu/data_xfer8.cc
View File

@ -85,7 +85,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XLAT(bxInstruction_c *i)
{
#if BX_SUPPORT_X86_64
if (i->as64L()) {
AL = read_virtual_byte_64(i->seg(), RBX + AL);
AL = read_linear_byte(i->seg(), get_laddr64(i->seg(), RBX + AL));
}
else
#endif

6
bochs/cpu/io.cc
View File

@ -509,7 +509,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::OUTSB32_DXXb(bxInstruction_c *i)
// 64-bit address size
void BX_CPP_AttrRegparmN(1) BX_CPU_C::OUTSB64_DXXb(bxInstruction_c *i)
{
Bit8u value8 = read_virtual_byte_64(i->seg(), RSI);
Bit8u value8 = read_linear_byte(i->seg(), get_laddr64(i->seg(), RSI));
BX_OUTP(DX, value8, 1);
if (BX_CPU_THIS_PTR get_DF())
@ -600,7 +600,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::OUTSW32_DXXw(bxInstruction_c *i)
// 16-bit operand size, 64-bit address size
void BX_CPP_AttrRegparmN(1) BX_CPU_C::OUTSW64_DXXw(bxInstruction_c *i)
{
Bit16u value16 = read_virtual_word_64(i->seg(), RSI);
Bit16u value16 = read_linear_word(i->seg(), get_laddr64(i->seg(), RSI));
BX_OUTP(DX, value16, 2);
if (BX_CPU_THIS_PTR get_DF())
@ -664,7 +664,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::OUTSD32_DXXd(bxInstruction_c *i)
// 32-bit operand size, 64-bit address size
void BX_CPP_AttrRegparmN(1) BX_CPU_C::OUTSD64_DXXd(bxInstruction_c *i)
{
Bit32u value32 = read_virtual_dword_64(i->seg(), RSI);
Bit32u value32 = read_linear_dword(i->seg(), get_laddr64(i->seg(), RSI));
BX_OUTP(DX, value32, 4);
if (BX_CPU_THIS_PTR get_DF())

2
bochs/cpu/load.cc
View File

@ -51,7 +51,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Ed(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Eq(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
TMP64 = read_virtual_qword_64(i->seg(), eaddr);
TMP64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
BX_CPU_CALL_METHOD(i->execute2(), (i));
}
#endif

22
bochs/cpu/logical64.cc
View File

@ -32,7 +32,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EqGqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
op1_64 ^= op2_64;
write_RMW_virtual_qword(op1_64);
@ -64,7 +64,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_GqEqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = read_virtual_qword_64(i->seg(), eaddr);
op2_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op1_64 ^= op2_64;
BX_WRITE_64BIT_REG(i->dst(), op1_64);
@ -80,7 +80,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XOR_EqIdM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op1_64 ^= op2_64;
write_RMW_virtual_qword(op1_64);
@ -108,7 +108,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_EqIdM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op1_64 |= op2_64;
write_RMW_virtual_qword(op1_64);
@ -134,7 +134,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NOT_EqM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op1_64 = ~op1_64;
write_RMW_virtual_qword(op1_64);
@ -188,7 +188,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::OR_GqEqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = read_virtual_qword_64(i->seg(), eaddr);
op2_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op1_64 |= op2_64;
BX_WRITE_64BIT_REG(i->dst(), op1_64);
@ -204,7 +204,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EqGqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
op1_64 &= op2_64;
write_RMW_virtual_qword(op1_64);
@ -236,7 +236,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_GqEqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = BX_READ_64BIT_REG(i->dst());
op2_64 = read_virtual_qword_64(i->seg(), eaddr);
op2_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op1_64 &= op2_64;
BX_WRITE_64BIT_REG(i->dst(), op1_64);
@ -252,7 +252,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::AND_EqIdM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
op1_64 &= op2_64;
write_RMW_virtual_qword(op1_64);
@ -293,7 +293,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EqGqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = read_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = BX_READ_64BIT_REG(i->src());
op1_64 &= op2_64;
@ -321,7 +321,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TEST_EqIdM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_64 = read_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op2_64 = (Bit32s) i->Id();
op1_64 &= op2_64;

16
bochs/cpu/protect_ctrl.cc
View File

@ -889,8 +889,8 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SGDT64_Ms(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_word_64(i->seg(), eaddr, limit_16);
write_virtual_qword_64(i->seg(), (eaddr+2) & i->asize_mask(), base_64);
write_linear_word(i->seg(), get_laddr64(i->seg(), eaddr), limit_16);
write_linear_qword(i->seg(), get_laddr64(i->seg(), (eaddr+2) & i->asize_mask()), base_64);
BX_NEXT_INSTR(i);
}
@ -916,8 +916,8 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SIDT64_Ms(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_word_64(i->seg(), eaddr, limit_16);
write_virtual_qword_64(i->seg(), (eaddr+2) & i->asize_mask(), base_64);
write_linear_word(i->seg(), get_laddr64(i->seg(), eaddr), limit_16);
write_linear_qword(i->seg(), get_laddr64(i->seg(), (eaddr+2) & i->asize_mask()), base_64);
BX_NEXT_INSTR(i);
}
@ -945,12 +945,12 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LGDT64_Ms(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u base_64 = read_virtual_qword_64(i->seg(), (eaddr + 2) & i->asize_mask());
Bit64u base_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), (eaddr + 2) & i->asize_mask()));
if (! IsCanonical(base_64)) {
BX_ERROR(("LGDT64_Ms: loaded base64 address is not in canonical form!"));
exception(BX_GP_EXCEPTION, 0);
}
Bit16u limit_16 = read_virtual_word_64(i->seg(), eaddr);
Bit16u limit_16 = read_linear_word(i->seg(), get_laddr64(i->seg(), eaddr));
BX_CPU_THIS_PTR gdtr.limit = limit_16;
BX_CPU_THIS_PTR gdtr.base = base_64;
@ -981,12 +981,12 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LIDT64_Ms(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u base_64 = read_virtual_qword_64(i->seg(), (eaddr + 2) & i->asize_mask());
Bit64u base_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), (eaddr + 2) & i->asize_mask()));
if (! IsCanonical(base_64)) {
BX_ERROR(("LIDT64_Ms: loaded base64 address is not in canonical form!"));
exception(BX_GP_EXCEPTION, 0);
}
Bit16u limit_16 = read_virtual_word_64(i->seg(), eaddr);
Bit16u limit_16 = read_linear_word(i->seg(), get_laddr64(i->seg(), eaddr));
BX_CPU_THIS_PTR idtr.limit = limit_16;
BX_CPU_THIS_PTR idtr.base = base_64;

12
bochs/cpu/segment_ctrl.cc
View File

@ -126,8 +126,8 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LFS_GqMp(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16u fs = read_virtual_word_64(i->seg(), (eaddr + 8) & i->asize_mask());
Bit64u reg_64 = read_virtual_qword_64(i->seg(), eaddr);
Bit16u fs = read_linear_word(i->seg(), get_laddr64(i->seg(), (eaddr + 8) & i->asize_mask()));
Bit64u reg_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], fs);
@ -170,8 +170,8 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LGS_GqMp(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16u gs = read_virtual_word_64(i->seg(), (eaddr + 8) & i->asize_mask());
Bit64u reg_64 = read_virtual_qword_64(i->seg(), eaddr);
Bit16u gs = read_linear_word(i->seg(), get_laddr64(i->seg(), (eaddr + 8) & i->asize_mask()));
Bit64u reg_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], gs);
@ -214,8 +214,8 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LSS_GqMp(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16u ss = read_virtual_word_64(i->seg(), (eaddr + 8) & i->asize_mask());
Bit64u reg_64 = read_virtual_qword_64(i->seg(), eaddr);
Bit16u ss = read_linear_word(i->seg(), get_laddr64(i->seg(), (eaddr + 8) & i->asize_mask()));
Bit64u reg_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], ss);

18
bochs/cpu/shift64.cc
View File

@ -35,7 +35,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SHLD_EqGqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
if (i->getIaOpcode() == BX_IA_SHLD_EqGq)
count = CL;
@ -101,7 +101,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SHRD_EqGqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
/* pointer, segment address pair */
op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
if (i->getIaOpcode() == BX_IA_SHRD_EqGq)
count = CL;
@ -164,7 +164,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ROL_EqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
if (i->getIaOpcode() == BX_IA_ROL_Eq)
count = CL;
@ -218,7 +218,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ROR_EqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
if (i->getIaOpcode() == BX_IA_ROR_Eq)
count = CL;
@ -274,7 +274,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::RCL_EqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
if (i->getIaOpcode() == BX_IA_RCL_Eq)
count = CL;
@ -348,7 +348,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::RCR_EqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
if (i->getIaOpcode() == BX_IA_RCR_Eq)
count = CL;
@ -420,7 +420,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SHL_EqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
if (i->getIaOpcode() == BX_IA_SHL_Eq)
count = CL;
@ -479,7 +479,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SHR_EqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
if (i->getIaOpcode() == BX_IA_SHR_Eq)
count = CL;
@ -539,7 +539,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SAR_EqM(bxInstruction_c *i)
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), get_laddr64(i->seg(), eaddr));
if (i->getIaOpcode() == BX_IA_SAR_Eq)
count = CL;

6
bochs/cpu/sse.cc
View File

@ -344,7 +344,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::PEXTRD_EdVdqIbM(bxInstruction_c *i
if (i->os64L()) /* 64 bit operand size mode */
{
Bit64u result = op.xmm64u(i->Ib() & 1);
write_virtual_qword_64(i->seg(), eaddr, result);
write_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr), result);
}
else
#endif
@ -363,7 +363,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::PEXTRQ_EqVdqIbM(bxInstruction_c *i
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
Bit64u result = op.xmm64u(i->Ib() & 1);
write_virtual_qword_64(i->seg(), eaddr, result);
write_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr), result);
BX_NEXT_INSTR(i);
}
@ -468,7 +468,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::PINSRD_VdqHdqEdIbM(bxInstruction_c
#if BX_SUPPORT_X86_64
if (i->os64L()) { /* 64 bit operand size mode */
Bit64u op2 = read_virtual_qword_64(i->seg(), eaddr);
Bit64u op2 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
op1.xmm64u(i->Ib() & 1) = op2;
}
else

4
bochs/cpu/stack64.cc
View File

@ -37,7 +37,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::POP_EqM(bxInstruction_c *i)
// pop is used to calculate the address.
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_qword_64(i->seg(), eaddr, val64);
write_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr), val64);
RSP_COMMIT;
@ -86,7 +86,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::PUSH_EqM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit64u op1_64 = read_virtual_qword_64(i->seg(), eaddr);
Bit64u op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
push_64(op1_64);

70
bochs/cpu/string.cc
View File

@ -568,8 +568,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSB64_YbXb(bxInstruction_c *i)
Bit64u rsi = RSI;
Bit64u rdi = RDI;
temp8 = read_virtual_byte_64(i->seg(), rsi);
write_virtual_byte_64(BX_SEG_REG_ES, rdi, temp8);
temp8 = read_linear_byte(i->seg(), get_laddr64(i->seg(), rsi));
write_linear_byte(BX_SEG_REG_ES, rdi, temp8);
if (BX_CPU_THIS_PTR get_DF()) {
/* decrement RSI, RDI */
@ -645,8 +645,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSW64_YwXw(bxInstruction_c *i)
Bit64u rsi = RSI;
Bit64u rdi = RDI;
temp16 = read_virtual_word_64(i->seg(), rsi);
write_virtual_word_64(BX_SEG_REG_ES, rdi, temp16);
temp16 = read_linear_word(i->seg(), get_laddr64(i->seg(), rsi));
write_linear_word(BX_SEG_REG_ES, rdi, temp16);
if (BX_CPU_THIS_PTR get_DF()) {
rsi -= 2;
@ -752,8 +752,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSD64_YdXd(bxInstruction_c *i)
Bit64u rsi = RSI;
Bit64u rdi = RDI;
temp32 = read_virtual_dword_64(i->seg(), rsi);
write_virtual_dword_64(BX_SEG_REG_ES, rdi, temp32);
temp32 = read_linear_dword(i->seg(), get_laddr64(i->seg(), rsi));
write_linear_dword(BX_SEG_REG_ES, rdi, temp32);
if (BX_CPU_THIS_PTR get_DF()) {
rsi -= 4;
@ -776,8 +776,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSQ32_YqXq(bxInstruction_c *i)
Bit32u esi = ESI;
Bit32u edi = EDI;
temp64 = read_virtual_qword_64(i->seg(), esi);
write_virtual_qword_64(BX_SEG_REG_ES, edi, temp64);
temp64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), esi));
write_linear_qword(BX_SEG_REG_ES, edi, temp64);
if (BX_CPU_THIS_PTR get_DF()) {
esi -= 8;
@ -801,8 +801,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSQ64_YqXq(bxInstruction_c *i)
Bit64u rsi = RSI;
Bit64u rdi = RDI;
temp64 = read_virtual_qword_64(i->seg(), rsi);
write_virtual_qword_64(BX_SEG_REG_ES, rdi, temp64);
temp64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), rsi));
write_linear_qword(BX_SEG_REG_ES, rdi, temp64);
if (BX_CPU_THIS_PTR get_DF()) {
rsi -= 8;
@ -969,8 +969,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPSB64_XbYb(bxInstruction_c *i)
Bit64u rsi = RSI;
Bit64u rdi = RDI;
op1_8 = read_virtual_byte_64(i->seg(), rsi);
op2_8 = read_virtual_byte_64(BX_SEG_REG_ES, rdi);
op1_8 = read_linear_byte(i->seg(), get_laddr64(i->seg(), rsi));
op2_8 = read_linear_byte(BX_SEG_REG_ES, rdi);
diff_8 = op1_8 - op2_8;
@ -1056,8 +1056,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPSW64_XwYw(bxInstruction_c *i)
Bit64u rsi = RSI;
Bit64u rdi = RDI;
op1_16 = read_virtual_word_64(i->seg(), rsi);
op2_16 = read_virtual_word_64(BX_SEG_REG_ES, rdi);
op1_16 = read_linear_word(i->seg(), get_laddr64(i->seg(), rsi));
op2_16 = read_linear_word(BX_SEG_REG_ES, rdi);
diff_16 = op1_16 - op2_16;
@ -1144,8 +1144,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPSD64_XdYd(bxInstruction_c *i)
Bit64u rsi = RSI;
Bit64u rdi = RDI;
op1_32 = read_virtual_dword_64(i->seg(), rsi);
op2_32 = read_virtual_dword_64(BX_SEG_REG_ES, rdi);
op1_32 = read_linear_dword(i->seg(), get_laddr64(i->seg(), rsi));
op2_32 = read_linear_dword(BX_SEG_REG_ES, rdi);
diff_32 = op1_32 - op2_32;
@ -1172,8 +1172,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPSQ32_XqYq(bxInstruction_c *i)
Bit32u esi = ESI;
Bit32u edi = EDI;
op1_64 = read_virtual_qword_64(i->seg(), esi);
op2_64 = read_virtual_qword_64(BX_SEG_REG_ES, edi);
op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), esi));
op2_64 = read_linear_qword(BX_SEG_REG_ES, edi);
diff_64 = op1_64 - op2_64;
@ -1201,8 +1201,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPSQ64_XqYq(bxInstruction_c *i)
Bit64u rsi = RSI;
Bit64u rdi = RDI;
op1_64 = read_virtual_qword_64(i->seg(), rsi);
op2_64 = read_virtual_qword_64(BX_SEG_REG_ES, rdi);
op1_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), rsi));
op2_64 = read_linear_qword(BX_SEG_REG_ES, rdi);
diff_64 = op1_64 - op2_64;
@ -1357,7 +1357,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SCASB64_ALYb(bxInstruction_c *i)
Bit64u rdi = RDI;
op2_8 = read_virtual_byte_64(BX_SEG_REG_ES, rdi);
op2_8 = read_virtual_byte(BX_SEG_REG_ES, rdi);
diff_8 = op1_8 - op2_8;
@ -1427,7 +1427,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SCASW64_AXYw(bxInstruction_c *i)
Bit64u rdi = RDI;
op2_16 = read_virtual_word_64(BX_SEG_REG_ES, rdi);
op2_16 = read_virtual_word(BX_SEG_REG_ES, rdi);
diff_16 = op1_16 - op2_16;
@ -1498,7 +1498,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SCASD64_EAXYd(bxInstruction_c *i)
Bit64u rdi = RDI;
op2_32 = read_virtual_dword_64(BX_SEG_REG_ES, rdi);
op2_32 = read_virtual_dword(BX_SEG_REG_ES, rdi);
diff_32 = op1_32 - op2_32;
@ -1521,7 +1521,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SCASQ32_RAXYq(bxInstruction_c *i)
Bit32u edi = EDI;
op2_64 = read_virtual_qword_64(BX_SEG_REG_ES, edi);
op2_64 = read_virtual_qword(BX_SEG_REG_ES, edi);
diff_64 = op1_64 - op2_64;
@ -1545,7 +1545,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SCASQ64_RAXYq(bxInstruction_c *i)
Bit64u rdi = RDI;
op2_64 = read_virtual_qword_64(BX_SEG_REG_ES, rdi);
op2_64 = read_virtual_qword(BX_SEG_REG_ES, rdi);
diff_64 = op1_64 - op2_64;
@ -1710,7 +1710,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::STOSB64_YbAL(bxInstruction_c *i)
{
Bit64u rdi = RDI;
write_virtual_byte_64(BX_SEG_REG_ES, rdi, AL);
write_linear_byte(BX_SEG_REG_ES, rdi, AL);
if (BX_CPU_THIS_PTR get_DF()) {
rdi--;
@ -1764,7 +1764,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::STOSW64_YwAX(bxInstruction_c *i)
{
Bit64u rdi = RDI;
write_virtual_word_64(BX_SEG_REG_ES, rdi, AX);
write_linear_word(BX_SEG_REG_ES, rdi, AX);
if (BX_CPU_THIS_PTR get_DF()) {
rdi -= 2;
@ -1819,7 +1819,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::STOSD64_YdEAX(bxInstruction_c *i)
{
Bit64u rdi = RDI;
write_virtual_dword_64(BX_SEG_REG_ES, rdi, EAX);
write_linear_dword(BX_SEG_REG_ES, rdi, EAX);
if (BX_CPU_THIS_PTR get_DF()) {
rdi -= 4;
@ -1836,7 +1836,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::STOSQ32_YqRAX(bxInstruction_c *i)
{
Bit32u edi = EDI;
write_virtual_qword_64(BX_SEG_REG_ES, edi, RAX);
write_linear_qword(BX_SEG_REG_ES, edi, RAX);
if (BX_CPU_THIS_PTR get_DF()) {
edi -= 8;
@ -1854,7 +1854,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::STOSQ64_YqRAX(bxInstruction_c *i)
{
Bit64u rdi = RDI;
write_virtual_qword_64(BX_SEG_REG_ES, rdi, RAX);
write_linear_qword(BX_SEG_REG_ES, rdi, RAX);
if (BX_CPU_THIS_PTR get_DF()) {
rdi -= 8;
@ -1986,7 +1986,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::LODSB64_ALXb(bxInstruction_c *i)
{
Bit64u rsi = RSI;
AL = read_virtual_byte_64(i->seg(), rsi);
AL = read_linear_byte(i->seg(), get_laddr64(i->seg(), rsi));
if (BX_CPU_THIS_PTR get_DF()) {
rsi--;
@ -2040,7 +2040,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::LODSW64_AXXw(bxInstruction_c *i)
{
Bit64u rsi = RSI;
AX = read_virtual_word_64(i->seg(), rsi);
AX = read_linear_word(i->seg(), get_laddr64(i->seg(), rsi));
if (BX_CPU_THIS_PTR get_DF()) {
rsi -= 2;
@ -2095,7 +2095,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::LODSD64_EAXXd(bxInstruction_c *i)
{
Bit64u rsi = RSI;
RAX = read_virtual_dword_64(i->seg(), rsi);
RAX = read_linear_dword(i->seg(), get_laddr64(i->seg(), rsi));
if (BX_CPU_THIS_PTR get_DF()) {
rsi -= 4;
@ -2112,7 +2112,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::LODSQ32_RAXXq(bxInstruction_c *i)
{
Bit32u esi = ESI;
RAX = read_virtual_qword_64(i->seg(), esi);
RAX = read_linear_qword(i->seg(), get_laddr64(i->seg(), esi));
if (BX_CPU_THIS_PTR get_DF()) {
esi -= 8;
@ -2130,7 +2130,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::LODSQ64_RAXXq(bxInstruction_c *i)
{
Bit64u rsi = RSI;
RAX = read_virtual_qword_64(i->seg(), rsi);
RAX = read_linear_qword(i->seg(), get_laddr64(i->seg(), rsi));
if (BX_CPU_THIS_PTR get_DF()) {
rsi -= 8;

4
bochs/cpu/vmx.cc
View File

@ -3189,7 +3189,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VMREAD_EqGq(bxInstruction_c *i)
}
else {
Bit64u eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_qword_64(i->seg(), eaddr, field_64);
write_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr), field_64);
}
VMsucceed();
@ -3305,7 +3305,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VMWRITE_GqEq(bxInstruction_c *i)
}
else {
Bit64u eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
val_64 = read_virtual_qword_64(i->seg(), eaddr);
val_64 = read_linear_qword(i->seg(), get_laddr64(i->seg(), eaddr));
}
if (BX_READ_64BIT_REG_HIGH(i->dst())) {