Volker Ruppert
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c78026a9a2
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- deleted executable properties from source files
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2011-04-03 10:29:19 +00:00 |
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Stanislav Shwartsman
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f0a3cce1e2
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added XSAVEOPT instruction emulation (for now with no state tracking according to Intel docs, just alias it to XSAVE)
update CHANGES
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2011-03-25 20:32:07 +00:00 |
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Stanislav Shwartsman
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7ced718040
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implemented AVX instructions support
many changes - some cleanup will follow
please report ay found bugs !
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2011-03-19 20:09:34 +00:00 |
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Stanislav Shwartsman
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5a8c57fe65
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end trace on setbv instruction
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2011-02-25 15:19:12 +00:00 |
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Stanislav Shwartsman
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7d80a6ebe0
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Adding Id and Rev property to all files
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2011-02-24 21:54:04 +00:00 |
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Stanislav Shwartsman
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2d3f3668c7
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Fixed IRET 64-bit mode bug
Support for 32 float copare methods for AVX
ckeanups in fetchdecode
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2011-02-13 06:10:11 +00:00 |
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Stanislav Shwartsman
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a31103e7d8
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optimize fetchdecode tables - part2
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2011-01-21 16:07:51 +00:00 |
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Stanislav Shwartsman
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fbc9b8b190
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phase1 of opcode tables optimization
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2011-01-20 16:24:42 +00:00 |
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Stanislav Shwartsman
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040a8e1a3a
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split bunch of SSE opcodes
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2010-12-24 08:35:00 +00:00 |
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Stanislav Shwartsman
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43600f3756
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complete rework of SSE code
next step - split all SSE opcodes by ModC0
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2010-12-22 21:16:02 +00:00 |
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Stanislav Shwartsman
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29a674e520
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split rd/wr CR opcodes for simplicity
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2010-12-19 22:36:19 +00:00 |
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Stanislav Shwartsman
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91ac0df65c
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implemented GS/FS BASE access instructions published in _319433-007.pdf document
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2010-07-22 16:41:59 +00:00 |
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Stanislav Shwartsman
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3dfcfd0ccd
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Split shift opcodes | optimize SAR opcode
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2010-05-18 07:28:05 +00:00 |
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Stanislav Shwartsman
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7319d2eee1
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FENCE instructions are SSE2 only
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2010-04-18 09:21:24 +00:00 |
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Stanislav Shwartsman
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62b5c27e1b
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compilation fixes
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2010-04-07 14:49:18 +00:00 |
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Stanislav Shwartsman
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9cece96d14
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fixes
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2010-04-04 18:46:03 +00:00 |
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Stanislav Shwartsman
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c201a53c76
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cleanup and optimization
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2010-02-15 14:04:48 +00:00 |
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Stanislav Shwartsman
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7f7b2cfcf0
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cleanup
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2010-02-08 15:22:53 +00:00 |
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Stanislav Shwartsman
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a2a080894b
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split fetchdecode.h for better readability
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2010-02-08 10:39:30 +00:00 |
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Stanislav Shwartsman
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eae084920a
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optimized decode tables
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2010-01-31 09:45:27 +00:00 |
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Stanislav Shwartsman
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dc02d836ce
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Fix POPCNT decode tables
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2010-01-29 10:16:28 +00:00 |
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Stanislav Shwartsman
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c403090327
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! Implemented PCLMULQDQ AES instruction
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2009-12-20 09:00:40 +00:00 |
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Stanislav Shwartsman
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553ca8af01
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split more SSE ops
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2009-11-25 20:49:47 +00:00 |
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Stanislav Shwartsman
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6819ab4eb7
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split sse opcodes
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2009-11-23 18:21:23 +00:00 |
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Stanislav Shwartsman
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868e716411
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instrumentation fixes + new example
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2009-11-04 15:48:28 +00:00 |
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Stanislav Shwartsman
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78e4b3d616
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split SSE move instructions
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2009-10-24 11:17:51 +00:00 |
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Stanislav Shwartsman
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7254ea36a1
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copyright fixes + small optimization
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2009-10-14 20:45:29 +00:00 |
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Stanislav Shwartsman
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8e3276cf14
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split opcodes by ModC0
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2009-08-22 11:47:42 +00:00 |
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Stanislav Shwartsman
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d5b93041e4
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added prefixSSE for few opcodes
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2009-08-15 15:43:40 +00:00 |
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Stanislav Shwartsman
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867ef05705
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The same for G15R
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2009-05-16 09:26:16 +00:00 |
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Stanislav Shwartsman
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9339740d8b
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G15M have SSE prefix style
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2009-05-16 09:11:14 +00:00 |
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Stanislav Shwartsman
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6dac964b27
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Two more prefix66 opcodes
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2009-02-28 09:28:18 +00:00 |
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Stanislav Shwartsman
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b9de22961c
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minimize SSE tables, minor speedup in SSE code
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2009-02-26 21:57:01 +00:00 |
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Stanislav Shwartsman
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de5814a22d
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Fixed compilation err
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2009-01-31 15:01:29 +00:00 |
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Stanislav Shwartsman
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f8185a6bc6
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Added Intel VMX emulation to Bochs CPU
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2009-01-31 10:43:24 +00:00 |
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Stanislav Shwartsman
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0325c120b2
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Separate PAUSE instruction from regular NOP
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2009-01-27 20:29:05 +00:00 |
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Stanislav Shwartsman
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9929e6ed78
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- updated FSF address
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2009-01-16 18:18:59 +00:00 |
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Stanislav Shwartsman
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0ff68a2aa2
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Fixed XSAVE decode in x86-64 mode
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2009-01-10 16:01:55 +00:00 |
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Stanislav Shwartsman
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7566faf948
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A bit simplify FPU decoding
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2008-09-16 18:28:53 +00:00 |
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Stanislav Shwartsman
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a0e395188f
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Fixed merge error
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2008-08-29 20:43:05 +00:00 |
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Stanislav Shwartsman
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b96f78dc0a
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Some kind of big change in fetchdecode tables invented in order to compress the tables for better host data cache utilization
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2008-08-29 19:23:03 +00:00 |
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Stanislav Shwartsman
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70c7c5ceca
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Use LOAD_Eb approach to remove duplicated GbEb methods
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2008-08-11 20:34:05 +00:00 |
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Stanislav Shwartsman
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a8adb36dc2
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Implemented MOVBE Intel Atom(R) instruction
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2008-08-11 18:53:24 +00:00 |
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Stanislav Shwartsman
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b61017e5b6
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Split more opcodes using new LOAD technique
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2008-08-10 21:16:12 +00:00 |
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Stanislav Shwartsman
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0d90ab0478
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Completely new way to handle LD+OP cases - allows to significantly reduce number of BX_CPU_C methods
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2008-08-09 21:05:07 +00:00 |
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Stanislav Shwartsman
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0127415ba6
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Clear some duplicated arithmetic opcodes - difference only in operands order
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2008-07-13 09:59:59 +00:00 |
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Stanislav Shwartsman
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7494b8823b
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- Support of AES CPU extensions, to enable configure with
--enable-aes option
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2008-05-30 20:35:08 +00:00 |
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Stanislav Shwartsman
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ed4be45a8b
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Split shift/rotate opcodes in 32-bit mode and 64-bit mode
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2008-05-02 22:47:07 +00:00 |
|
Stanislav Shwartsman
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81deffd65d
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More fetchdecode fixes
|
2008-04-30 21:32:33 +00:00 |
|
Stanislav Shwartsman
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e5b6f90b62
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some fetchdecode fixes
|
2008-04-30 21:07:12 +00:00 |
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