optimize fetchdecode tables - part2
This commit is contained in:
Stanislav Shwartsman
parent
cf4e7f5b5d
commit
a31103e7d8
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.710 2011-01-20 16:24:42 sshwarts Exp $
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// $Id: cpu.h,v 1.711 2011-01-21 16:07:51 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2011 The Bochs Project
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@ -2752,7 +2752,6 @@ public: // for now...
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BX_SMF void SYSCALL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void SYSRET(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void RDTSCP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void CMPXCHG16B(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void SWAPGS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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@ -2773,6 +2772,8 @@ public: // for now...
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BX_SMF void MOVNTI_MqGq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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#endif // #if BX_SUPPORT_X86_64
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BX_SMF void RDTSCP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void INVLPG(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void RSM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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@ -3888,9 +3889,10 @@ enum {
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#define BxPrefixSSEF2 0x0030 // Group encoding: 0011, SSE_PREFIX_F2
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#define BxPrefixSSE 0x0040 // Group encoding: 0100
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#define BxGroupN 0x0050 // Group encoding: 0101
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#define BxFPEscape 0x0060 // Group encoding: 0110
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#define Bx3ByteOp 0x0070 // Group encoding: 0111
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#define BxOSizeGrp 0x0080 // Group encoding: 1000
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#define BxSplitGroupN 0x0060 // Group encoding: 0110
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#define BxFPEscape 0x0070 // Group encoding: 0111
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#define Bx3ByteOp 0x0080 // Group encoding: 1000
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#define BxOSizeGrp 0x0090 // Group encoding: 1001
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// The BxImmediate2 mask specifies kind of second immediate data
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// required by instruction.
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@ -3921,7 +3923,7 @@ enum {
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#define BxGroup4 BxGroupN
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#define BxGroup5 BxGroupN
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#define BxGroup6 BxGroupN
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#define BxGroup7 BxGroupN
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#define BxGroup7 BxFPEscape
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#define BxGroup8 BxGroupN
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#define BxGroup9 BxGroupN
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@ -3929,10 +3931,9 @@ enum {
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#define BxGroup12 BxGroupN
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#define BxGroup13 BxGroupN
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#define BxGroup14 BxGroupN
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#define BxGroup15 BxGroupN
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#define BxGroup16 BxGroupN
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#define BxGroup15 BxSplitGroupN
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#define BxGroupFP BxGroupN
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#define BxGroupFP BxSplitGroupN
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// <TAG-DEFINES-DECODE-END>
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File diff suppressed because it is too large
Load Diff
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode.h,v 1.108 2011-01-20 16:24:42 sshwarts Exp $
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// $Id: fetchdecode.h,v 1.109 2011-01-21 16:07:51 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2005-2011 Stanislav Shwartsman
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@ -375,7 +375,18 @@ static const BxOpcodeInfo_t BxOpcodeInfoG6[8] = {
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/* Group 7 */
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/* ******* */
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static const BxOpcodeInfo_t BxOpcodeInfoG7R[64] = {
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static const BxOpcodeInfo_t BxOpcodeInfoG7[64+8] = {
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/* /m form */
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/* 0 */ { 0, BX_IA_SGDT_Ms },
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/* 1 */ { 0, BX_IA_SIDT_Ms },
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/* 2 */ { 0, BX_IA_LGDT_Ms },
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/* 3 */ { 0, BX_IA_LIDT_Ms },
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/* 4 */ { 0, BX_IA_SMSW_Ew },
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/* 5 */ { 0, BX_IA_ERROR },
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/* 6 */ { BxTraceEnd, BX_IA_LMSW_Ew },
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/* 7 */ { BxTraceEnd, BX_IA_INVLPG },
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/* /r form */
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/* 0F 01 C0 */ { 0, BX_IA_ERROR },
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/* 0F 01 C1 */ { BxTraceEnd | BxPrefixSSE, BX_IA_VMCALL, BxOpcodeGroupSSE_ERR },
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/* 0F 01 C2 */ { BxTraceEnd | BxPrefixSSE, BX_IA_VMLAUNCH, BxOpcodeGroupSSE_ERR },
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@ -432,13 +443,8 @@ static const BxOpcodeInfo_t BxOpcodeInfoG7R[64] = {
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/* 0F 01 F5 */ { BxTraceEnd, BX_IA_LMSW_Ew },
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/* 0F 01 F6 */ { BxTraceEnd, BX_IA_LMSW_Ew },
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/* 0F 01 F7 */ { BxTraceEnd, BX_IA_LMSW_Ew },
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#if BX_SUPPORT_X86_64
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/* 0F 01 F8 */ { 0, BX_IA_SWAPGS },
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/* 0F 01 F9 */ { 0, BX_IA_RDTSCP },
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#else
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/* 0F 01 F8 */ { 0, BX_IA_ERROR },
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/* 0F 01 F9 */ { 0, BX_IA_ERROR },
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#endif
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/* 0F 01 F9 */ { 0, BX_IA_RDTSCP },
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/* 0F 01 FA */ { 0, BX_IA_ERROR },
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/* 0F 01 FB */ { 0, BX_IA_ERROR },
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/* 0F 01 FC */ { 0, BX_IA_ERROR },
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@ -447,20 +453,9 @@ static const BxOpcodeInfo_t BxOpcodeInfoG7R[64] = {
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/* 0F 01 FF */ { 0, BX_IA_ERROR }
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};
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static const BxOpcodeInfo_t BxOpcodeInfoG7M[8] = {
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// attributes defined in main area
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/* 0 */ { 0, BX_IA_SGDT_Ms },
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/* 1 */ { 0, BX_IA_SIDT_Ms },
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/* 2 */ { 0, BX_IA_LGDT_Ms },
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/* 3 */ { 0, BX_IA_LIDT_Ms },
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/* 4 */ { 0, BX_IA_SMSW_Ew },
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/* 5 */ { 0, BX_IA_ERROR },
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/* 6 */ { BxTraceEnd, BX_IA_LMSW_Ew },
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/* 7 */ { BxTraceEnd, BX_IA_INVLPG }
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};
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#if BX_SUPPORT_X86_64
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static const BxOpcodeInfo_t BxOpcodeInfo64G7M[8] = {
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static const BxOpcodeInfo_t BxOpcodeInfoG7q[64+8] = {
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/* /m form */
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/* 0 */ { 0, BX_IA_SGDT64_Ms },
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/* 1 */ { 0, BX_IA_SIDT64_Ms },
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/* 2 */ { 0, BX_IA_LGDT64_Ms },
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@ -468,7 +463,73 @@ static const BxOpcodeInfo_t BxOpcodeInfo64G7M[8] = {
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/* 4 */ { 0, BX_IA_SMSW_Ew },
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/* 5 */ { 0, BX_IA_ERROR },
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/* 6 */ { BxTraceEnd, BX_IA_LMSW_Ew },
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/* 7 */ { BxTraceEnd, BX_IA_INVLPG }
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/* 7 */ { BxTraceEnd, BX_IA_INVLPG },
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/* /r form */
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/* 0F 01 C0 */ { 0, BX_IA_ERROR },
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/* 0F 01 C1 */ { BxTraceEnd | BxPrefixSSE, BX_IA_VMCALL, BxOpcodeGroupSSE_ERR },
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/* 0F 01 C2 */ { BxTraceEnd | BxPrefixSSE, BX_IA_VMLAUNCH, BxOpcodeGroupSSE_ERR },
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/* 0F 01 C3 */ { BxTraceEnd | BxPrefixSSE, BX_IA_VMRESUME, BxOpcodeGroupSSE_ERR },
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/* 0F 01 C4 */ { BxTraceEnd | BxPrefixSSE, BX_IA_VMXOFF, BxOpcodeGroupSSE_ERR },
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/* 0F 01 C5 */ { 0, BX_IA_ERROR },
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/* 0F 01 C6 */ { 0, BX_IA_ERROR },
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/* 0F 01 C7 */ { 0, BX_IA_ERROR },
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/* 0F 01 C8 */ { BxPrefixSSE, BX_IA_MONITOR, BxOpcodeGroupSSE_ERR },
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/* 0F 01 C9 */ { BxPrefixSSE | BxTraceEnd, BX_IA_MWAIT, BxOpcodeGroupSSE_ERR },
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/* 0F 01 CA */ { 0, BX_IA_ERROR },
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/* 0F 01 CB */ { 0, BX_IA_ERROR },
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/* 0F 01 CC */ { 0, BX_IA_ERROR },
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/* 0F 01 CD */ { 0, BX_IA_ERROR },
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/* 0F 01 CE */ { 0, BX_IA_ERROR },
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/* 0F 01 CF */ { 0, BX_IA_ERROR },
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/* 0F 01 D0 */ { BxPrefixSSE, BX_IA_XGETBV, BxOpcodeGroupSSE_ERR },
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/* 0F 01 D1 */ { BxPrefixSSE, BX_IA_XSETBV, BxOpcodeGroupSSE_ERR },
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/* 0F 01 D2 */ { 0, BX_IA_ERROR },
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/* 0F 01 D3 */ { 0, BX_IA_ERROR },
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/* 0F 01 D4 */ { 0, BX_IA_ERROR },
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/* 0F 01 D5 */ { 0, BX_IA_ERROR },
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/* 0F 01 D6 */ { 0, BX_IA_ERROR },
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/* 0F 01 D7 */ { 0, BX_IA_ERROR },
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/* 0F 01 D8 */ { 0, BX_IA_ERROR },
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/* 0F 01 D9 */ { 0, BX_IA_ERROR },
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/* 0F 01 DA */ { 0, BX_IA_ERROR },
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/* 0F 01 DB */ { 0, BX_IA_ERROR },
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/* 0F 01 DC */ { 0, BX_IA_ERROR },
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/* 0F 01 DD */ { 0, BX_IA_ERROR },
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/* 0F 01 DE */ { 0, BX_IA_ERROR },
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/* 0F 01 DF */ { 0, BX_IA_ERROR },
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/* 0F 01 E0 */ { 0, BX_IA_SMSW_Ew },
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/* 0F 01 E1 */ { 0, BX_IA_SMSW_Ew },
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/* 0F 01 E2 */ { 0, BX_IA_SMSW_Ew },
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/* 0F 01 E3 */ { 0, BX_IA_SMSW_Ew },
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/* 0F 01 E4 */ { 0, BX_IA_SMSW_Ew },
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/* 0F 01 E5 */ { 0, BX_IA_SMSW_Ew },
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/* 0F 01 E6 */ { 0, BX_IA_SMSW_Ew },
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/* 0F 01 E7 */ { 0, BX_IA_SMSW_Ew },
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/* 0F 01 E8 */ { 0, BX_IA_ERROR },
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/* 0F 01 E9 */ { 0, BX_IA_ERROR },
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/* 0F 01 EA */ { 0, BX_IA_ERROR },
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/* 0F 01 EB */ { 0, BX_IA_ERROR },
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/* 0F 01 EC */ { 0, BX_IA_ERROR },
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/* 0F 01 ED */ { 0, BX_IA_ERROR },
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/* 0F 01 EE */ { 0, BX_IA_ERROR },
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/* 0F 01 EF */ { 0, BX_IA_ERROR },
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/* 0F 01 F0 */ { BxTraceEnd, BX_IA_LMSW_Ew },
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/* 0F 01 F1 */ { BxTraceEnd, BX_IA_LMSW_Ew },
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/* 0F 01 F2 */ { BxTraceEnd, BX_IA_LMSW_Ew },
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/* 0F 01 F3 */ { BxTraceEnd, BX_IA_LMSW_Ew },
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/* 0F 01 F4 */ { BxTraceEnd, BX_IA_LMSW_Ew },
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/* 0F 01 F5 */ { BxTraceEnd, BX_IA_LMSW_Ew },
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/* 0F 01 F6 */ { BxTraceEnd, BX_IA_LMSW_Ew },
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/* 0F 01 F7 */ { BxTraceEnd, BX_IA_LMSW_Ew },
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/* 0F 01 F8 */ { 0, BX_IA_SWAPGS },
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/* 0F 01 F9 */ { 0, BX_IA_RDTSCP },
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/* 0F 01 FA */ { 0, BX_IA_ERROR },
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/* 0F 01 FB */ { 0, BX_IA_ERROR },
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/* 0F 01 FC */ { 0, BX_IA_ERROR },
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/* 0F 01 FD */ { 0, BX_IA_ERROR },
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/* 0F 01 FE */ { 0, BX_IA_ERROR },
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/* 0F 01 FF */ { 0, BX_IA_ERROR }
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};
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#endif
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@ -638,7 +699,18 @@ static const BxOpcodeInfo_t BxOpcodeInfoG14R[8] = {
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/* Group 15 */
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/* ******** */
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static const BxOpcodeInfo_t BxOpcodeInfoG15M[8] = {
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static const BxOpcodeInfo_t BxOpcodeInfoG15[8*2] = {
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/* /r form */
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/* 0 */ { 0, BX_IA_ERROR },
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/* 1 */ { 0, BX_IA_ERROR },
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/* 2 */ { 0, BX_IA_ERROR },
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/* 3 */ { 0, BX_IA_ERROR },
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/* 4 */ { 0, BX_IA_ERROR },
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/* 5 */ { BxPrefixSSE, BX_IA_LFENCE, BxOpcodeGroupSSE_ERR },
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/* 6 */ { BxPrefixSSE, BX_IA_MFENCE, BxOpcodeGroupSSE_ERR },
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/* 7 */ { BxPrefixSSE, BX_IA_SFENCE, BxOpcodeGroupSSE_ERR },
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/* /m form */
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/* 0 */ { BxPrefixSSE, BX_IA_FXSAVE, BxOpcodeGroupSSE_ERR },
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/* 1 */ { BxPrefixSSE, BX_IA_FXRSTOR, BxOpcodeGroupSSE_ERR },
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/* 2 */ { BxPrefixSSE, BX_IA_LDMXCSR, BxOpcodeGroupSSE_ERR },
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@ -649,19 +721,9 @@ static const BxOpcodeInfo_t BxOpcodeInfoG15M[8] = {
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/* 7 */ { BxPrefixSSE, BX_IA_CLFLUSH, BxOpcodeGroupSSE_ERR }
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};
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static const BxOpcodeInfo_t BxOpcodeInfoG15R[8] = {
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/* 0 */ { 0, BX_IA_ERROR },
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/* 1 */ { 0, BX_IA_ERROR },
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/* 2 */ { 0, BX_IA_ERROR },
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/* 3 */ { 0, BX_IA_ERROR },
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/* 4 */ { 0, BX_IA_ERROR },
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/* 5 */ { BxPrefixSSE, BX_IA_LFENCE, BxOpcodeGroupSSE_ERR },
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/* 6 */ { BxPrefixSSE, BX_IA_MFENCE, BxOpcodeGroupSSE_ERR },
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/* 7 */ { BxPrefixSSE, BX_IA_SFENCE, BxOpcodeGroupSSE_ERR }
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};
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#if BX_SUPPORT_X86_64
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static const BxOpcodeInfo_t BxOpcodeInfoG15R64[8] = {
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static const BxOpcodeInfo_t BxOpcodeInfoG15q[8*2] = {
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/* /r form */
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/* 0 */ { BxPrefixSSEF3, BX_IA_RDFSBASE },
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/* 1 */ { BxPrefixSSEF3, BX_IA_RDGSBASE },
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/* 2 */ { BxPrefixSSEF3, BX_IA_WRFSBASE },
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@ -669,7 +731,17 @@ static const BxOpcodeInfo_t BxOpcodeInfoG15R64[8] = {
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/* 4 */ { 0, BX_IA_ERROR },
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/* 5 */ { BxPrefixSSE, BX_IA_LFENCE, BxOpcodeGroupSSE_ERR },
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/* 6 */ { BxPrefixSSE, BX_IA_MFENCE, BxOpcodeGroupSSE_ERR },
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/* 7 */ { BxPrefixSSE, BX_IA_SFENCE, BxOpcodeGroupSSE_ERR }
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/* 7 */ { BxPrefixSSE, BX_IA_SFENCE, BxOpcodeGroupSSE_ERR },
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/* /m form */
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/* 0 */ { BxPrefixSSE, BX_IA_FXSAVE, BxOpcodeGroupSSE_ERR },
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/* 1 */ { BxPrefixSSE, BX_IA_FXRSTOR, BxOpcodeGroupSSE_ERR },
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/* 2 */ { BxPrefixSSE, BX_IA_LDMXCSR, BxOpcodeGroupSSE_ERR },
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/* 3 */ { BxPrefixSSE, BX_IA_STMXCSR, BxOpcodeGroupSSE_ERR },
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/* 4 */ { BxPrefixSSE, BX_IA_XSAVE, BxOpcodeGroupSSE_ERR },
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/* 5 */ { BxPrefixSSE, BX_IA_XRSTOR, BxOpcodeGroupSSE_ERR },
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/* 6 */ { 0, BX_IA_ERROR },
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/* 7 */ { BxPrefixSSE, BX_IA_CLFLUSH, BxOpcodeGroupSSE_ERR }
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};
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#endif
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File diff suppressed because it is too large
Load Diff
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode_sse.h,v 1.28 2011-01-20 16:24:42 sshwarts Exp $
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// $Id: fetchdecode_sse.h,v 1.29 2011-01-21 16:07:51 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2005-2011 Stanislav Shwartsman
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@ -447,7 +447,7 @@ static const BxOpcodeInfo_t BxOpcodeGroupSSE_0fd6[6] = {
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/* F2 */ { 0, BX_IA_MOVDQ2Q_PqVRq }
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};
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static const BxOpcodeInfo_t BxOpcodeGroupSSE_0fd7[6] = {
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static const BxOpcodeInfo_t BxOpcodeGroupSSE_0fd7R[6] = {
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/* 66 */ { 0, BX_IA_PMOVMSKB_GdUdq },
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/* F3 */ { 0, BX_IA_ERROR },
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/* F2 */ { 0, BX_IA_ERROR }
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode_x87.h,v 1.3 2010-04-16 20:09:23 sshwarts Exp $
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// $Id: fetchdecode_x87.h,v 1.4 2011-01-21 16:07:51 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2005-2010 Stanislav Shwartsman
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@ -33,32 +33,32 @@
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/* ************************************************************************ */
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/* FPU Opcodes */
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// D8 (modrm is outside 00h - BFh) (mod != 11)
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static const BxOpcodeInfo_t BxOpcodeInfo_FPGroupD8[8] = {
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/* 0 */ { 0, BX_IA_FADD_SINGLE_REAL },
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/* 1 */ { 0, BX_IA_FMUL_SINGLE_REAL },
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/* 2 */ { 0, BX_IA_FCOM_SINGLE_REAL },
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// D8 (modrm is outside 00h - BFh)
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static const BxOpcodeInfo_t BxOpcodeInfo_FPGroupD8[8*2] = {
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/* /r form */
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/* 0 */ { 0, BX_IA_FADD_ST0_STj },
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/* 1 */ { 0, BX_IA_FMUL_ST0_STj },
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/* 2 */ { 0, BX_IA_FCOM_STi },
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/* 3 */ { 0, BX_IA_FCOMP_STi },
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/* 4 */ { 0, BX_IA_FSUB_ST0_STj },
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/* 5 */ { 0, BX_IA_FSUBR_ST0_STj },
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/* 6 */ { 0, BX_IA_FDIV_ST0_STj },
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/* 7 */ { 0, BX_IA_FDIVR_ST0_STj },
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/* /m form */
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/* 0 */ { 0, BX_IA_FADD_SINGLE_REAL },
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/* 1 */ { 0, BX_IA_FMUL_SINGLE_REAL },
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/* 2 */ { 0, BX_IA_FCOM_SINGLE_REAL },
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/* 3 */ { 0, BX_IA_FCOMP_SINGLE_REAL },
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/* 4 */ { 0, BX_IA_FSUB_SINGLE_REAL },
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/* 4 */ { 0, BX_IA_FSUB_SINGLE_REAL },
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/* 5 */ { 0, BX_IA_FSUBR_SINGLE_REAL },
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/* 6 */ { 0, BX_IA_FDIV_SINGLE_REAL },
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/* 6 */ { 0, BX_IA_FDIV_SINGLE_REAL },
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/* 7 */ { 0, BX_IA_FDIVR_SINGLE_REAL }
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};
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// D8 (modrm is outside 00h - BFh) (mod == 11)
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static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointD8[8] = {
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/* 0 */ { 0, BX_IA_FADD_ST0_STj },
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/* 1 */ { 0, BX_IA_FMUL_ST0_STj },
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/* 2 */ { 0, BX_IA_FCOM_STi },
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/* 3 */ { 0, BX_IA_FCOMP_STi },
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/* 4 */ { 0, BX_IA_FSUB_ST0_STj },
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/* 5 */ { 0, BX_IA_FSUBR_ST0_STj },
|
||||
/* 6 */ { 0, BX_IA_FDIV_ST0_STj },
|
||||
/* 7 */ { 0, BX_IA_FDIVR_ST0_STj }
|
||||
};
|
||||
|
||||
// D9 (modrm is outside 00h - BFh) (mod != 11)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FPGroupD9[8] = {
|
||||
// D9 (modrm is outside 00h - BFh)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointD9[64+8] = {
|
||||
/* /m form */
|
||||
/* 0 */ { 0, BX_IA_FLD_SINGLE_REAL },
|
||||
/* 1 */ { 0, BX_IA_ERROR },
|
||||
/* 2 */ { 0, BX_IA_FST_SINGLE_REAL },
|
||||
@ -66,19 +66,17 @@ static const BxOpcodeInfo_t BxOpcodeInfo_FPGroupD9[8] = {
|
||||
/* 4 */ { 0, BX_IA_FLDENV },
|
||||
/* 5 */ { 0, BX_IA_FLDCW },
|
||||
/* 6 */ { 0, BX_IA_FNSTENV },
|
||||
/* 7 */ { 0, BX_IA_FNSTCW }
|
||||
};
|
||||
/* 7 */ { 0, BX_IA_FNSTCW },
|
||||
|
||||
// D9 (modrm is outside 00h - BFh) (mod == 11)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointD9[64] = {
|
||||
/* D9 C0 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C1 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C2 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C3 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C4 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C5 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C6 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C7 */ { 0, BX_IA_FLD_STi },
|
||||
/* /r form */
|
||||
/* D9 C0 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C1 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C2 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C3 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C4 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C5 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C6 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C7 */ { 0, BX_IA_FLD_STi },
|
||||
/* D9 C8 */ { 0, BX_IA_FXCH_STi },
|
||||
/* D9 C9 */ { 0, BX_IA_FXCH_STi },
|
||||
/* D9 CA */ { 0, BX_IA_FXCH_STi },
|
||||
@ -87,7 +85,7 @@ static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointD9[64] = {
|
||||
/* D9 CD */ { 0, BX_IA_FXCH_STi },
|
||||
/* D9 CE */ { 0, BX_IA_FXCH_STi },
|
||||
/* D9 CF */ { 0, BX_IA_FXCH_STi },
|
||||
/* D9 D0 */ { 0, BX_IA_FNOP },
|
||||
/* D9 D0 */ { 0, BX_IA_FNOP },
|
||||
/* D9 D1 */ { 0, BX_IA_ERROR },
|
||||
/* D9 D2 */ { 0, BX_IA_ERROR },
|
||||
/* D9 D3 */ { 0, BX_IA_ERROR },
|
||||
@ -103,54 +101,53 @@ static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointD9[64] = {
|
||||
/* D9 DD */ { 0, BX_IA_FSTP_STi }, // undocumented
|
||||
/* D9 DE */ { 0, BX_IA_FSTP_STi }, // undocumented
|
||||
/* D9 DF */ { 0, BX_IA_FSTP_STi }, // undocumented
|
||||
/* D9 E0 */ { 0, BX_IA_FCHS },
|
||||
/* D9 E1 */ { 0, BX_IA_FABS },
|
||||
/* D9 E0 */ { 0, BX_IA_FCHS },
|
||||
/* D9 E1 */ { 0, BX_IA_FABS },
|
||||
/* D9 E2 */ { 0, BX_IA_ERROR },
|
||||
/* D9 E3 */ { 0, BX_IA_ERROR },
|
||||
/* D9 E4 */ { 0, BX_IA_FTST },
|
||||
/* D9 E5 */ { 0, BX_IA_FXAM },
|
||||
/* D9 E6 */ { 0, BX_IA_ERROR },
|
||||
/* D9 E7 */ { 0, BX_IA_ERROR },
|
||||
/* D9 E8 */ { 0, BX_IA_FLD1 },
|
||||
/* D9 E9 */ { 0, BX_IA_FLDL2T },
|
||||
/* D9 EA */ { 0, BX_IA_FLDL2E },
|
||||
/* D9 EB */ { 0, BX_IA_FLDPI },
|
||||
/* D9 EC */ { 0, BX_IA_FLDLG2 },
|
||||
/* D9 ED */ { 0, BX_IA_FLDLN2 },
|
||||
/* D9 EE */ { 0, BX_IA_FLDZ },
|
||||
/* D9 EF */ { 0, BX_IA_ERROR },
|
||||
/* D9 F0 */ { 0, BX_IA_F2XM1 },
|
||||
/* D9 F1 */ { 0, BX_IA_FYL2X },
|
||||
/* D9 F2 */ { 0, BX_IA_FPTAN },
|
||||
/* D9 F3 */ { 0, BX_IA_FPATAN },
|
||||
/* D9 E4 */ { 0, BX_IA_FTST },
|
||||
/* D9 E5 */ { 0, BX_IA_FXAM },
|
||||
/* D9 E6 */ { 0, BX_IA_ERROR },
|
||||
/* D9 E7 */ { 0, BX_IA_ERROR },
|
||||
/* D9 E8 */ { 0, BX_IA_FLD1 },
|
||||
/* D9 E9 */ { 0, BX_IA_FLDL2T },
|
||||
/* D9 EA */ { 0, BX_IA_FLDL2E },
|
||||
/* D9 EB */ { 0, BX_IA_FLDPI },
|
||||
/* D9 EC */ { 0, BX_IA_FLDLG2 },
|
||||
/* D9 ED */ { 0, BX_IA_FLDLN2 },
|
||||
/* D9 EE */ { 0, BX_IA_FLDZ },
|
||||
/* D9 EF */ { 0, BX_IA_ERROR },
|
||||
/* D9 F0 */ { 0, BX_IA_F2XM1 },
|
||||
/* D9 F1 */ { 0, BX_IA_FYL2X },
|
||||
/* D9 F2 */ { 0, BX_IA_FPTAN },
|
||||
/* D9 F3 */ { 0, BX_IA_FPATAN },
|
||||
/* D9 F4 */ { 0, BX_IA_FXTRACT },
|
||||
/* D9 F5 */ { 0, BX_IA_FPREM1 },
|
||||
/* D9 F5 */ { 0, BX_IA_FPREM1 },
|
||||
/* D9 F6 */ { 0, BX_IA_FDECSTP },
|
||||
/* D9 F7 */ { 0, BX_IA_FINCSTP },
|
||||
/* D9 F8 */ { 0, BX_IA_FPREM },
|
||||
/* D9 F8 */ { 0, BX_IA_FPREM },
|
||||
/* D9 F9 */ { 0, BX_IA_FYL2XP1 },
|
||||
/* D9 FA */ { 0, BX_IA_FSQRT },
|
||||
/* D9 FA */ { 0, BX_IA_FSQRT },
|
||||
/* D9 FB */ { 0, BX_IA_FSINCOS },
|
||||
/* D9 FC */ { 0, BX_IA_FRNDINT },
|
||||
/* D9 FD */ { 0, BX_IA_FSCALE },
|
||||
/* D9 FE */ { 0, BX_IA_FSIN },
|
||||
/* D9 FF */ { 0, BX_IA_FCOS }
|
||||
/* D9 FD */ { 0, BX_IA_FSCALE },
|
||||
/* D9 FE */ { 0, BX_IA_FSIN },
|
||||
/* D9 FF */ { 0, BX_IA_FCOS }
|
||||
};
|
||||
|
||||
// DA (modrm is outside 00h - BFh) (mod != 11)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FPGroupDA[8] = {
|
||||
/* 0 */ { 0, BX_IA_FIADD_DWORD_INTEGER },
|
||||
/* 1 */ { 0, BX_IA_FIMUL_DWORD_INTEGER },
|
||||
/* 2 */ { 0, BX_IA_FICOM_DWORD_INTEGER },
|
||||
// DA (modrm is outside 00h - BFh)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDA[64+8] = {
|
||||
/* /m form */
|
||||
/* 0 */ { 0, BX_IA_FIADD_DWORD_INTEGER },
|
||||
/* 1 */ { 0, BX_IA_FIMUL_DWORD_INTEGER },
|
||||
/* 2 */ { 0, BX_IA_FICOM_DWORD_INTEGER },
|
||||
/* 3 */ { 0, BX_IA_FICOMP_DWORD_INTEGER },
|
||||
/* 4 */ { 0, BX_IA_FISUB_DWORD_INTEGER },
|
||||
/* 4 */ { 0, BX_IA_FISUB_DWORD_INTEGER },
|
||||
/* 5 */ { 0, BX_IA_FISUBR_DWORD_INTEGER },
|
||||
/* 6 */ { 0, BX_IA_FIDIV_DWORD_INTEGER },
|
||||
/* 7 */ { 0, BX_IA_FIDIVR_DWORD_INTEGER }
|
||||
};
|
||||
/* 6 */ { 0, BX_IA_FIDIV_DWORD_INTEGER },
|
||||
/* 7 */ { 0, BX_IA_FIDIVR_DWORD_INTEGER },
|
||||
|
||||
// DA (modrm is outside 00h - BFh) (mod == 11)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDA[64] = {
|
||||
/* /r form */
|
||||
/* DA C0 */ { 0, BX_IA_FCMOV_ST0_STj },
|
||||
/* DA C1 */ { 0, BX_IA_FCMOV_ST0_STj },
|
||||
/* DA C2 */ { 0, BX_IA_FCMOV_ST0_STj },
|
||||
@ -217,8 +214,9 @@ static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDA[64] = {
|
||||
/* DA FF */ { 0, BX_IA_ERROR }
|
||||
};
|
||||
|
||||
// DB (modrm is outside 00h - BFh) (mod != 11)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FPGroupDB[8] = {
|
||||
// DB (modrm is outside 00h - BFh)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDB[64+8] = {
|
||||
/* /m form */
|
||||
/* 0 */ { 0, BX_IA_FILD_DWORD_INTEGER },
|
||||
/* 1 */ { 0, BX_IA_FISTTP32 },
|
||||
/* 2 */ { 0, BX_IA_FIST_DWORD_INTEGER },
|
||||
@ -226,11 +224,9 @@ static const BxOpcodeInfo_t BxOpcodeInfo_FPGroupDB[8] = {
|
||||
/* 4 */ { 0, BX_IA_ERROR },
|
||||
/* 5 */ { 0, BX_IA_FLD_EXTENDED_REAL },
|
||||
/* 6 */ { 0, BX_IA_ERROR },
|
||||
/* 7 */ { 0, BX_IA_FSTP_EXTENDED_REAL }
|
||||
};
|
||||
/* 7 */ { 0, BX_IA_FSTP_EXTENDED_REAL },
|
||||
|
||||
// DB (modrm is outside 00h - BFh) (mod == 11)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDB[64] = {
|
||||
/* /r form */
|
||||
/* DB C0 */ { 0, BX_IA_FCMOV_ST0_STj },
|
||||
/* DB C1 */ { 0, BX_IA_FCMOV_ST0_STj },
|
||||
/* DB C2 */ { 0, BX_IA_FCMOV_ST0_STj },
|
||||
@ -265,12 +261,12 @@ static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDB[64] = {
|
||||
/* DB DF */ { 0, BX_IA_FCMOV_ST0_STj },
|
||||
/* DB E0 */ { 0, BX_IA_FPLEGACY }, // feni (287 only)
|
||||
/* DB E1 */ { 0, BX_IA_FPLEGACY }, // fdisi (287 only)
|
||||
/* DB E2 */ { 0, BX_IA_FNCLEX },
|
||||
/* DB E3 */ { 0, BX_IA_FNINIT },
|
||||
/* DB E2 */ { 0, BX_IA_FNCLEX },
|
||||
/* DB E3 */ { 0, BX_IA_FNINIT },
|
||||
/* DB E4 */ { 0, BX_IA_FPLEGACY }, // fsetpm (287 only)
|
||||
/* DB E5 */ { 0, BX_IA_ERROR },
|
||||
/* DB E6 */ { 0, BX_IA_ERROR },
|
||||
/* DB E7 */ { 0, BX_IA_ERROR },
|
||||
/* DB E5 */ { 0, BX_IA_ERROR },
|
||||
/* DB E6 */ { 0, BX_IA_ERROR },
|
||||
/* DB E7 */ { 0, BX_IA_ERROR },
|
||||
/* DB E8 */ { 0, BX_IA_FUCOMI_ST0_STj },
|
||||
/* DB E9 */ { 0, BX_IA_FUCOMI_ST0_STj },
|
||||
/* DB EA */ { 0, BX_IA_FUCOMI_ST0_STj },
|
||||
@ -279,14 +275,14 @@ static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDB[64] = {
|
||||
/* DB ED */ { 0, BX_IA_FUCOMI_ST0_STj },
|
||||
/* DB EE */ { 0, BX_IA_FUCOMI_ST0_STj },
|
||||
/* DB EF */ { 0, BX_IA_FUCOMI_ST0_STj },
|
||||
/* DB F0 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F1 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F2 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F3 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F4 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F5 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F6 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F7 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F0 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F1 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F2 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F3 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F4 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F5 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F6 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F7 */ { 0, BX_IA_FCOMI_ST0_STj },
|
||||
/* DB F8 */ { 0, BX_IA_ERROR },
|
||||
/* DB F9 */ { 0, BX_IA_ERROR },
|
||||
/* DB FA */ { 0, BX_IA_ERROR },
|
||||
@ -296,33 +292,42 @@ static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDB[64] = {
|
||||
/* DB FE */ { 0, BX_IA_ERROR },
|
||||
/* DB FF */ { 0, BX_IA_ERROR }
|
||||
};
|
||||
|
||||
// DC (modrm is outside 00h - BFh) (mod != 11)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FPGroupDC[8] = {
|
||||
/* 0 */ { 0, BX_IA_FADD_DOUBLE_REAL },
|
||||
/* 1 */ { 0, BX_IA_FMUL_DOUBLE_REAL },
|
||||
/* 2 */ { 0, BX_IA_FCOM_DOUBLE_REAL },
|
||||
/* 3 */ { 0, BX_IA_FCOMP_DOUBLE_REAL },
|
||||
/* 4 */ { 0, BX_IA_FSUB_DOUBLE_REAL },
|
||||
/* 5 */ { 0, BX_IA_FSUBR_DOUBLE_REAL },
|
||||
/* 6 */ { 0, BX_IA_FDIV_DOUBLE_REAL },
|
||||
/* 7 */ { 0, BX_IA_FDIVR_DOUBLE_REAL }
|
||||
};
|
||||
|
||||
// DC (modrm is outside 00h - BFh) (mod == 11)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDC[8] = {
|
||||
// DC (modrm is outside 00h - BFh)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FPGroupDC[8*2] = {
|
||||
/* /r form */
|
||||
/* 0 */ { 0, BX_IA_FADD_STi_ST0 },
|
||||
/* 1 */ { 0, BX_IA_FMUL_STi_ST0 },
|
||||
/* 2 */ { 0, BX_IA_FCOM_STi }, // undocumented
|
||||
/* 3 */ { 0, BX_IA_FCOMP_STi }, // undocumented
|
||||
/* 4 */ { 0, BX_IA_FSUBR_STi_ST0 },
|
||||
/* 5 */ { 0, BX_IA_FSUB_STi_ST0 },
|
||||
/* 5 */ { 0, BX_IA_FSUB_STi_ST0 },
|
||||
/* 6 */ { 0, BX_IA_FDIVR_STi_ST0 },
|
||||
/* 7 */ { 0, BX_IA_FDIV_STi_ST0 }
|
||||
/* 7 */ { 0, BX_IA_FDIV_STi_ST0 },
|
||||
|
||||
/* /m form */
|
||||
/* 0 */ { 0, BX_IA_FADD_DOUBLE_REAL },
|
||||
/* 1 */ { 0, BX_IA_FMUL_DOUBLE_REAL },
|
||||
/* 2 */ { 0, BX_IA_FCOM_DOUBLE_REAL },
|
||||
/* 3 */ { 0, BX_IA_FCOMP_DOUBLE_REAL },
|
||||
/* 4 */ { 0, BX_IA_FSUB_DOUBLE_REAL },
|
||||
/* 5 */ { 0, BX_IA_FSUBR_DOUBLE_REAL },
|
||||
/* 6 */ { 0, BX_IA_FDIV_DOUBLE_REAL },
|
||||
/* 7 */ { 0, BX_IA_FDIVR_DOUBLE_REAL }
|
||||
};
|
||||
|
||||
// DD (modrm is outside 00h - BFh) (mod != 11)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FPGroupDD[8] = {
|
||||
// DD (modrm is outside 00h - BFh)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FPGroupDD[8*2] = {
|
||||
/* /r form */
|
||||
/* 0 */ { 0, BX_IA_FFREE_STi },
|
||||
/* 1 */ { 0, BX_IA_FXCH_STi }, // undocumented
|
||||
/* 2 */ { 0, BX_IA_FST_STi },
|
||||
/* 3 */ { 0, BX_IA_FSTP_STi },
|
||||
/* 4 */ { 0, BX_IA_FUCOM_STi },
|
||||
/* 5 */ { 0, BX_IA_FUCOMP_STi },
|
||||
/* 6 */ { 0, BX_IA_ERROR },
|
||||
/* 7 */ { 0, BX_IA_ERROR },
|
||||
|
||||
/* /m form */
|
||||
/* 0 */ { 0, BX_IA_FLD_DOUBLE_REAL },
|
||||
/* 1 */ { 0, BX_IA_FISTTP64 },
|
||||
/* 2 */ { 0, BX_IA_FST_DOUBLE_REAL },
|
||||
@ -333,33 +338,19 @@ static const BxOpcodeInfo_t BxOpcodeInfo_FPGroupDD[8] = {
|
||||
/* 7 */ { 0, BX_IA_FNSTSW }
|
||||
};
|
||||
|
||||
// DD (modrm is outside 00h - BFh) (mod == 11)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDD[8] = {
|
||||
/* 0 */ { 0, BX_IA_FFREE_STi },
|
||||
/* 1 */ { 0, BX_IA_FXCH_STi }, // undocumented
|
||||
/* 2 */ { 0, BX_IA_FST_STi },
|
||||
/* 3 */ { 0, BX_IA_FSTP_STi },
|
||||
/* 4 */ { 0, BX_IA_FUCOM_STi },
|
||||
/* 5 */ { 0, BX_IA_FUCOMP_STi },
|
||||
/* 6 */ { 0, BX_IA_ERROR },
|
||||
/* 7 */ { 0, BX_IA_ERROR }
|
||||
};
|
||||
|
||||
// DE (modrm is outside 00h - BFh) (mod != 11)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FPGroupDE[8] = {
|
||||
/* 0 */ { 0, BX_IA_FIADD_WORD_INTEGER },
|
||||
/* 1 */ { 0, BX_IA_FIMUL_WORD_INTEGER },
|
||||
/* 2 */ { 0, BX_IA_FICOM_WORD_INTEGER },
|
||||
// DE (modrm is outside 00h - BFh)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDE[64+8] = {
|
||||
/* /m form */
|
||||
/* 0 */ { 0, BX_IA_FIADD_WORD_INTEGER },
|
||||
/* 1 */ { 0, BX_IA_FIMUL_WORD_INTEGER },
|
||||
/* 2 */ { 0, BX_IA_FICOM_WORD_INTEGER },
|
||||
/* 3 */ { 0, BX_IA_FICOMP_WORD_INTEGER },
|
||||
/* 4 */ { 0, BX_IA_FISUB_WORD_INTEGER },
|
||||
/* 4 */ { 0, BX_IA_FISUB_WORD_INTEGER },
|
||||
/* 5 */ { 0, BX_IA_FISUBR_WORD_INTEGER },
|
||||
/* 6 */ { 0, BX_IA_FIDIV_WORD_INTEGER },
|
||||
/* 7 */ { 0, BX_IA_FIDIVR_WORD_INTEGER }
|
||||
};
|
||||
/* 6 */ { 0, BX_IA_FIDIV_WORD_INTEGER },
|
||||
/* 7 */ { 0, BX_IA_FIDIVR_WORD_INTEGER },
|
||||
|
||||
// DE (modrm is outside 00h - BFh) (mod == 11)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDE[64] = {
|
||||
// all instructions pop FPU stack
|
||||
/* /r form */ // all instructions pop FPU stack
|
||||
/* DE C0 */ { 0, BX_IA_FADD_STi_ST0 },
|
||||
/* DE C1 */ { 0, BX_IA_FADD_STi_ST0 },
|
||||
/* DE C2 */ { 0, BX_IA_FADD_STi_ST0 },
|
||||
@ -426,20 +417,19 @@ static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDE[64] = {
|
||||
/* DE FF */ { 0, BX_IA_FDIV_STi_ST0 }
|
||||
};
|
||||
|
||||
// DF (modrm is outside 00h - BFh) (mod != 11)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FPGroupDF[8] = {
|
||||
/* 0 */ { 0, BX_IA_FILD_WORD_INTEGER },
|
||||
/* 1 */ { 0, BX_IA_FISTTP16 },
|
||||
/* 2 */ { 0, BX_IA_FIST_WORD_INTEGER },
|
||||
/* 3 */ { 0, BX_IA_FISTP_WORD_INTEGER },
|
||||
/* 4 */ { 0, BX_IA_FBLD_PACKED_BCD },
|
||||
/* 5 */ { 0, BX_IA_FILD_QWORD_INTEGER },
|
||||
/* 6 */ { 0, BX_IA_FBSTP_PACKED_BCD },
|
||||
/* 7 */ { 0, BX_IA_FISTP_QWORD_INTEGER }
|
||||
};
|
||||
// DF (modrm is outside 00h - BFh)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDF[64+8] = {
|
||||
/* /m form */
|
||||
/* 0 */ { 0, BX_IA_FILD_WORD_INTEGER },
|
||||
/* 1 */ { 0, BX_IA_FISTTP16 },
|
||||
/* 2 */ { 0, BX_IA_FIST_WORD_INTEGER },
|
||||
/* 3 */ { 0, BX_IA_FISTP_WORD_INTEGER },
|
||||
/* 4 */ { 0, BX_IA_FBLD_PACKED_BCD },
|
||||
/* 5 */ { 0, BX_IA_FILD_QWORD_INTEGER },
|
||||
/* 6 */ { 0, BX_IA_FBSTP_PACKED_BCD },
|
||||
/* 7 */ { 0, BX_IA_FISTP_QWORD_INTEGER },
|
||||
|
||||
// DF (modrm is outside 00h - BFh) (mod == 11)
|
||||
static const BxOpcodeInfo_t BxOpcodeInfo_FloatingPointDF[64] = {
|
||||
/* /r form */
|
||||
/* DF C0 */ { 0, BX_IA_FFREEP_STi }, // 287+ compatibility opcode
|
||||
/* DF C1 */ { 0, BX_IA_FFREEP_STi },
|
||||
/* DF C2 */ { 0, BX_IA_FFREEP_STi },
|
||||
|
||||
@ -1,23 +1,23 @@
|
||||
/////////////////////////////////////////////////////////////////////////,,,,
|
||||
// $Id: ia_opcodes.h,v 1.69 2011-01-20 16:24:42 sshwarts Exp $,,,
|
||||
// $Id: ia_opcodes.h,v 1.70 2011-01-21 16:07:51 sshwarts Exp $,,,
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (c) 2008-2011 Stanislav Shwartsman
|
||||
// Copyright (c) 2008-2010 Stanislav Shwartsman
|
||||
// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
|
||||
//
|
||||
// This library is free software; you can redistribute it and/or
|
||||
// modify it under the terms of the GNU Lesser General Public
|
||||
// License as published by the Free Software Foundation; either
|
||||
// version 2 of the License, or (at your option) any later version.,,,
|
||||
// version 2 of the License, or (at your option) any later version.
|
||||
//
|
||||
// This library is distributed in the hope that it will be useful
|
||||
// This library is distributed in the hope that it will be useful,
|
||||
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
// Lesser General Public License for more details.
|
||||
//
|
||||
// You should have received a copy of the GNU Lesser General Public
|
||||
// License along with this library; if not, write to the Free Software,,,
|
||||
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston
|
||||
// License along with this library; if not, write to the Free Software
|
||||
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
|
||||
//
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
|
||||
@ -120,22 +120,14 @@ bx_define_opcode(BX_IA_BT_EdIb, &BX_CPU_C::BT_EdIbM, &BX_CPU_C::BT_EdIbR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTS_EdIb, &BX_CPU_C::BTS_EdIbM, &BX_CPU_C::BTS_EdIbR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTR_EdIb, &BX_CPU_C::BTR_EdIbM, &BX_CPU_C::BTR_EdIbR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTC_EdIb, &BX_CPU_C::BTC_EdIbM, &BX_CPU_C::BTC_EdIbR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BT_EdGdM, &BX_CPU_C::BT_EdGdM, &BX_CPU_C::BT_EdGdM, 0, 0)
|
||||
bx_define_opcode(BX_IA_BT_EdGdR, &BX_CPU_C::BT_EdGdR, &BX_CPU_C::BT_EdGdR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BT_EwGwM, &BX_CPU_C::BT_EwGwM, &BX_CPU_C::BT_EwGwM, 0, 0)
|
||||
bx_define_opcode(BX_IA_BT_EwGwR, &BX_CPU_C::BT_EwGwR, &BX_CPU_C::BT_EwGwR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTC_EdGdM, &BX_CPU_C::BTC_EdGdM, &BX_CPU_C::BTC_EdGdM, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTC_EdGdR, &BX_CPU_C::BTC_EdGdR, &BX_CPU_C::BTC_EdGdR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTC_EwGwM, &BX_CPU_C::BTC_EwGwM, &BX_CPU_C::BTC_EwGwM, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTC_EwGwR, &BX_CPU_C::BTC_EwGwR, &BX_CPU_C::BTC_EwGwR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTR_EdGdM, &BX_CPU_C::BTR_EdGdM, &BX_CPU_C::BTR_EdGdM, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTR_EdGdR, &BX_CPU_C::BTR_EdGdR, &BX_CPU_C::BTR_EdGdR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTR_EwGwM, &BX_CPU_C::BTR_EwGwM, &BX_CPU_C::BTR_EwGwM, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTR_EwGwR, &BX_CPU_C::BTR_EwGwR, &BX_CPU_C::BTR_EwGwR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTS_EdGdM, &BX_CPU_C::BTS_EdGdM, &BX_CPU_C::BTS_EdGdM, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTS_EdGdR, &BX_CPU_C::BTS_EdGdR, &BX_CPU_C::BTS_EdGdR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTS_EwGwM, &BX_CPU_C::BTS_EwGwM, &BX_CPU_C::BTS_EwGwM, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTS_EwGwR, &BX_CPU_C::BTS_EwGwR, &BX_CPU_C::BTS_EwGwR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BT_EdGd, &BX_CPU_C::BT_EdGdM, &BX_CPU_C::BT_EdGdR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BT_EwGw, &BX_CPU_C::BT_EwGwM, &BX_CPU_C::BT_EwGwR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTC_EdGd, &BX_CPU_C::BTC_EdGdM, &BX_CPU_C::BTC_EdGdR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTC_EwGw, &BX_CPU_C::BTC_EwGwM, &BX_CPU_C::BTC_EwGwR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTR_EdGd, &BX_CPU_C::BTR_EdGdM, &BX_CPU_C::BTR_EdGdR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTR_EwGw, &BX_CPU_C::BTR_EwGwM, &BX_CPU_C::BTR_EwGwR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTS_EdGd, &BX_CPU_C::BTS_EdGdM, &BX_CPU_C::BTS_EdGdR, 0, 0)
|
||||
bx_define_opcode(BX_IA_BTS_EwGw, &BX_CPU_C::BTS_EwGwM, &BX_CPU_C::BTS_EwGwR, 0, 0)
|
||||
bx_define_opcode(BX_IA_CALL_Ed, &BX_CPU_C::LOAD_Ed, &BX_CPU_C::CALL_EdR, 0, 0)
|
||||
bx_define_opcode(BX_IA_CALL_Ew, &BX_CPU_C::LOAD_Ew, &BX_CPU_C::CALL_EwR, 0, 0)
|
||||
bx_define_opcode(BX_IA_CALL_Jd, NULL, &BX_CPU_C::CALL_Jd, 0, 0)
|
||||
@ -273,21 +265,17 @@ bx_define_opcode(BX_IA_MOV_RdCR4, NULL, &BX_CPU_C::MOV_RdCR4, BX_CPU_486, 0)
|
||||
bx_define_opcode(BX_IA_MOV_RdDd, NULL, &BX_CPU_C::MOV_RdDd, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_DdRd, NULL, &BX_CPU_C::MOV_DdRd, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EAXOd, NULL, &BX_CPU_C::MOV_EAXOd, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EbGbM, &BX_CPU_C::MOV_EbGbM, &BX_CPU_C::MOV_EbGbM, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EbIb, &BX_CPU_C::MOV_EbIbM, &BX_CPU_C::MOV_RLIb, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EdId, &BX_CPU_C::MOV_EdIdM, &BX_CPU_C::MOV_ERXId, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EwIw, &BX_CPU_C::MOV_EwIwM, &BX_CPU_C::MOV_RXIw, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_ERXId, NULL, &BX_CPU_C::MOV_ERXId, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EwGwM, &BX_CPU_C::MOV_EwGwM, &BX_CPU_C::MOV_EwGwM, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EwSwM, &BX_CPU_C::MOV_EwSwM, &BX_CPU_C::MOV_EwSwM, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EwSwR, &BX_CPU_C::MOV_EwSwR, &BX_CPU_C::MOV_EwSwR, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_GbEbM, &BX_CPU_C::MOV_GbEbM, &BX_CPU_C::MOV_GbEbM, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_GbEbR, &BX_CPU_C::MOV_GbEbR, &BX_CPU_C::MOV_GbEbR, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV32_EdGdM, &BX_CPU_C::MOV32_EdGdM, &BX_CPU_C::MOV32_EdGdM, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV32_GdEdM, &BX_CPU_C::MOV32_GdEdM, &BX_CPU_C::MOV32_GdEdM, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_GdEdR, &BX_CPU_C::MOV_GdEdR, &BX_CPU_C::MOV_GdEdR, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_GwEwM, &BX_CPU_C::MOV_GwEwM, &BX_CPU_C::MOV_GwEwM, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_GwEwR, &BX_CPU_C::MOV_GwEwR, &BX_CPU_C::MOV_GwEwR, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EwSw, &BX_CPU_C::MOV_EwSwM, &BX_CPU_C::MOV_EwSwR, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_GbEb, &BX_CPU_C::MOV_GbEbM, &BX_CPU_C::MOV_GbEbR, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EbGb, &BX_CPU_C::MOV_EbGbM, &BX_CPU_C::MOV_GbEbR, 0, 0) /* dstRM */
|
||||
bx_define_opcode(BX_IA_MOV_GwEw, &BX_CPU_C::MOV_GwEwM, &BX_CPU_C::MOV_GwEwR, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EwGw, &BX_CPU_C::MOV_EwGwM, &BX_CPU_C::MOV_GwEwR, 0, 0) /* dstRM */
|
||||
bx_define_opcode(BX_IA_MOV32_GdEd, &BX_CPU_C::MOV32_GdEdM, &BX_CPU_C::MOV_GdEdR, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV32_EdGd, &BX_CPU_C::MOV32_EdGdM, &BX_CPU_C::MOV_GdEdR, 0, 0) /* dstRM */
|
||||
bx_define_opcode(BX_IA_MOV_OdAL, NULL, &BX_CPU_C::MOV_OdAL, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_OdAX, NULL, &BX_CPU_C::MOV_OdAX, 0, 0)
|
||||
bx_define_opcode(BX_IA_MOV_OdEAX, NULL, &BX_CPU_C::MOV_OdEAX, 0, 0)
|
||||
@ -784,7 +772,7 @@ bx_define_opcode(BX_IA_FXRSTOR, &BX_CPU_C::FXRSTOR, &BX_CPU_C::BxError, BX_CPU_F
|
||||
// SSE
|
||||
bx_define_opcode(BX_IA_LDMXCSR, &BX_CPU_C::LDMXCSR, &BX_CPU_C::BxError, BX_CPU_SSE, BX_PREPARE_SSE)
|
||||
bx_define_opcode(BX_IA_STMXCSR, &BX_CPU_C::STMXCSR, &BX_CPU_C::BxError, BX_CPU_SSE, BX_PREPARE_SSE)
|
||||
bx_define_opcode(BX_IA_PREFETCH, &BX_CPU_C::PREFETCH, &BX_CPU_C::PREFETCH, BX_CPU_SSE, 0)
|
||||
bx_define_opcode(BX_IA_PREFETCH, &BX_CPU_C::PREFETCH, &BX_CPU_C::NOP, BX_CPU_SSE, 0)
|
||||
// SSE
|
||||
|
||||
// SSE
|
||||
@ -1185,8 +1173,8 @@ bx_define_opcode(BX_IA_TEST_EqGq, &BX_CPU_C::LOAD_Eq, &BX_CPU_C::TEST_EqGqR, BX_
|
||||
bx_define_opcode(BX_IA_TEST_RAXId, NULL, &BX_CPU_C::TEST_RAXId, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_XCHG_EqGq, &BX_CPU_C::XCHG_EqGqM, &BX_CPU_C::XCHG_EqGqR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_LEA_GqM, &BX_CPU_C::LEA_GqM, &BX_CPU_C::BxError, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_MOV64_EdGdM, &BX_CPU_C::MOV64_EdGdM, &BX_CPU_C::MOV64_EdGdM, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_MOV64_GdEdM, &BX_CPU_C::MOV64_GdEdM, &BX_CPU_C::MOV64_GdEdM, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_MOV64_GdEd, &BX_CPU_C::MOV64_GdEdM, &BX_CPU_C::MOV_GdEdR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_MOV64_EdGd, &BX_CPU_C::MOV64_EdGdM, &BX_CPU_C::MOV_GdEdR, BX_CPU_X86_64, 0) /* dstRM */
|
||||
bx_define_opcode(BX_IA_MOV_RAXOq, NULL, &BX_CPU_C::MOV_RAXOq, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_MOV_OqRAX, NULL, &BX_CPU_C::MOV_OqRAX, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EAXOq, NULL, &BX_CPU_C::MOV_EAXOq, BX_CPU_X86_64, 0)
|
||||
@ -1195,9 +1183,8 @@ bx_define_opcode(BX_IA_MOV_AXOq, NULL, &BX_CPU_C::MOV_AXOq, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_MOV_OqAX, NULL, &BX_CPU_C::MOV_OqAX, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_MOV_ALOq, NULL, &BX_CPU_C::MOV_ALOq, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_MOV_OqAL, NULL, &BX_CPU_C::MOV_OqAL, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EqGqM, &BX_CPU_C::MOV_EqGqM, &BX_CPU_C::MOV_EqGqM, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_MOV_GqEqR, &BX_CPU_C::MOV_GqEqR, &BX_CPU_C::MOV_GqEqR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_MOV_GqEqM, &BX_CPU_C::MOV_GqEqM, &BX_CPU_C::MOV_GqEqM, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EqGq, &BX_CPU_C::MOV_EqGqM, &BX_CPU_C::MOV_GqEqR, BX_CPU_X86_64, 0) /* dstRM */
|
||||
bx_define_opcode(BX_IA_MOV_GqEq, &BX_CPU_C::MOV_GqEqM, &BX_CPU_C::MOV_GqEqR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_MOV_EqId, &BX_CPU_C::MOV_EqIdM, &BX_CPU_C::MOV_EqIdR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_REP_MOVSQ_XqYq, NULL, &BX_CPU_C::REP_MOVSQ_XqYq, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_REP_CMPSQ_XqYq, NULL, &BX_CPU_C::REP_CMPSQ_XqYq, BX_CPU_X86_64, 0)
|
||||
@ -1237,14 +1224,10 @@ bx_define_opcode(BX_IA_MOVSX_GqEd, &BX_CPU_C::MOVSX_GqEdM, &BX_CPU_C::MOVSX_GqEd
|
||||
bx_define_opcode(BX_IA_BSWAP_RRX, NULL, &BX_CPU_C::BSWAP_RRX, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BSF_GqEq, &BX_CPU_C::LOAD_Eq, &BX_CPU_C::BSF_GqEqR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BSR_GqEq, &BX_CPU_C::LOAD_Eq, &BX_CPU_C::BSR_GqEqR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BT_EqGqM, &BX_CPU_C::BT_EqGqM, &BX_CPU_C::BT_EqGqM, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BTS_EqGqM, &BX_CPU_C::BTS_EqGqM, &BX_CPU_C::BTS_EqGqM, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BTR_EqGqM, &BX_CPU_C::BTR_EqGqM, &BX_CPU_C::BTR_EqGqM, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BTC_EqGqM, &BX_CPU_C::BTC_EqGqM, &BX_CPU_C::BTC_EqGqM, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BT_EqGqR, &BX_CPU_C::BT_EqGqR, &BX_CPU_C::BT_EqGqR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BTS_EqGqR, &BX_CPU_C::BTS_EqGqR, &BX_CPU_C::BTS_EqGqR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BTR_EqGqR, &BX_CPU_C::BTR_EqGqR, &BX_CPU_C::BTR_EqGqR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BTC_EqGqR, &BX_CPU_C::BTC_EqGqR, &BX_CPU_C::BTC_EqGqR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BT_EqGq, &BX_CPU_C::BT_EqGqM, &BX_CPU_C::BT_EqGqR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BTS_EqGq, &BX_CPU_C::BTS_EqGqM, &BX_CPU_C::BTS_EqGqR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BTR_EqGq, &BX_CPU_C::BTR_EqGqM, &BX_CPU_C::BTR_EqGqR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BTC_EqGq, &BX_CPU_C::BTC_EqGqM, &BX_CPU_C::BTC_EqGqR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BT_EqIb, &BX_CPU_C::BT_EqIbM, &BX_CPU_C::BT_EqIbR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BTS_EqIb, &BX_CPU_C::BTS_EqIbM, &BX_CPU_C::BTS_EqIbR, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_BTR_EqIb, &BX_CPU_C::BTR_EqIbM, &BX_CPU_C::BTR_EqIbR, BX_CPU_X86_64, 0)
|
||||
@ -1313,7 +1296,6 @@ bx_define_opcode(BX_IA_SGDT64_Ms, &BX_CPU_C::SGDT64_Ms, &BX_CPU_C::BxError, BX_C
|
||||
bx_define_opcode(BX_IA_SIDT64_Ms, &BX_CPU_C::SIDT64_Ms, &BX_CPU_C::BxError, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_LGDT64_Ms, &BX_CPU_C::LGDT64_Ms, &BX_CPU_C::BxError, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_LIDT64_Ms, &BX_CPU_C::LIDT64_Ms, &BX_CPU_C::BxError, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_RDTSCP, &BX_CPU_C::BxError, &BX_CPU_C::RDTSCP, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_CMPXCHG16B, &BX_CPU_C::CMPXCHG16B, &BX_CPU_C::BxError, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_LOOPNE64_Jb, NULL, &BX_CPU_C::LOOPNE64_Jb, BX_CPU_X86_64, 0)
|
||||
bx_define_opcode(BX_IA_LOOPE64_Jb, NULL, &BX_CPU_C::LOOPE64_Jb, BX_CPU_X86_64, 0)
|
||||
@ -1342,6 +1324,8 @@ bx_define_opcode(BX_IA_WRFSBASE, &BX_CPU_C::BxError, &BX_CPU_C::WRFSBASE, BX_CPU
|
||||
bx_define_opcode(BX_IA_WRGSBASE, &BX_CPU_C::BxError, &BX_CPU_C::WRGSBASE, BX_CPU_X86_64 | BX_CPU_FSGSBASE, 0)
|
||||
#endif
|
||||
|
||||
bx_define_opcode(BX_IA_RDTSCP, &BX_CPU_C::BxError, &BX_CPU_C::RDTSCP, BX_CPU_X86_64, 0)
|
||||
|
||||
// VMX
|
||||
bx_define_opcode(BX_IA_VMXON_Mq, &BX_CPU_C::VMXON, &BX_CPU_C::BxError, BX_CPU_VMX, 0)
|
||||
bx_define_opcode(BX_IA_VMXOFF, &BX_CPU_C::BxError, &BX_CPU_C::VMXOFF, BX_CPU_VMX, 0)
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
// $Id: proc_ctrl.cc,v 1.341 2010-12-25 17:04:36 sshwarts Exp $
|
||||
// $Id: proc_ctrl.cc,v 1.342 2011-01-21 16:07:51 sshwarts Exp $
|
||||
/////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// Copyright (C) 2001-2010 The Bochs Project
|
||||
@ -401,9 +401,10 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::RDTSC(bxInstruction_c *i)
|
||||
#endif
|
||||
}
|
||||
|
||||
#if BX_SUPPORT_X86_64
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::RDTSCP(bxInstruction_c *i)
|
||||
{
|
||||
#if BX_SUPPORT_X86_64
|
||||
|
||||
#if BX_SUPPORT_VMX
|
||||
// RDTSCP will always #UD in legacy VMX mode
|
||||
if (BX_CPU_THIS_PTR in_vmx_guest) {
|
||||
@ -416,8 +417,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::RDTSCP(bxInstruction_c *i)
|
||||
|
||||
RDTSC(i);
|
||||
RCX = MSR_TSC_AUX;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#if BX_SUPPORT_MONITOR_MWAIT
|
||||
bx_bool BX_CPU_C::is_monitor(bx_phy_address begin_addr, unsigned len)
|
||||
@ -1023,9 +1024,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::SYSRET(bxInstruction_c *i)
|
||||
|
||||
void BX_CPP_AttrRegparmN(1) BX_CPU_C::SWAPGS(bxInstruction_c *i)
|
||||
{
|
||||
if(! long64_mode())
|
||||
exception(BX_UD_EXCEPTION, 0);
|
||||
|
||||
if(CPL != 0)
|
||||
exception(BX_GP_EXCEPTION, 0);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user