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97 Commits

Author SHA1 Message Date
Stanislav Shwartsman
8ff1b3c15e Update MEM_ACCESS instrumentation 2008-04-19 10:13:04 +00:00
Stanislav Shwartsman
fea49bb270 Fixed linear address wrap in legacy (not long64) mode 2008-04-07 18:39:17 +00:00
Stanislav Shwartsman
5826e2843a Inline pop/push functions 
Store only single byte of opcode in b1() - speedup shift instructions
Code cleanups
 2008-04-05 17:51:55 +00:00
Stanislav Shwartsman
f3a91710e4 Split access_linear to access_read_linear and access_write_linear 2008-03-29 18:18:08 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
680a588575 Fixed compilation error when alignment check is disabled 2008-02-12 06:47:03 +00:00
Stanislav Shwartsman
8d7410a852 Canonical check have higher priority than #AC check 2008-02-11 20:52:10 +00:00
Stanislav Shwartsman
a2897933a3 white space cleanup 2008-02-02 21:46:54 +00:00
Stanislav Shwartsman
9ec2c87aaa cleanups and optimizations 2008-01-22 16:20:30 +00:00
Stanislav Shwartsman
31bab8e058 Fixed compilation error with instrumentation enabled 2008-01-16 22:20:21 +00:00
Stanislav Shwartsman
79fc57dec8 Fixed more VCPP2008 warnings 2007-12-26 23:07:44 +00:00
Stanislav Shwartsman
a93b0afdbe Merge page split detection method suggested by Darek Mihocka 2007-12-21 10:33:39 +00:00
Stanislav Shwartsman
5d4e32b8da Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads 2007-12-20 20:58:38 +00:00
Stanislav Shwartsman
b516589e4e Changes in write_virtual_* and pop_* functions -> avoid moving parameteres by pointer 2007-12-20 18:29:42 +00:00
Stanislav Shwartsman
46366b5064 Speedup simulation by eliminating CPL==3 check from read/write_virtual* functions 2007-12-16 21:03:46 +00:00
Stanislav Shwartsman
de5838ce80 cleanups and fixes for Immediate_IbIb of SSE4A 2007-12-16 20:47:10 +00:00
Stanislav Shwartsman
f145f4c847 Unify BX_INSTR_MEM_READ and BX_INSTR_MEM_WRITE callbacks to single callback BX_INSTR_MEM_ACCESS 
Enable the callback with guest-to-host TLB enabled
Update instrumentation docs
 2007-12-13 21:30:05 +00:00
Stanislav Shwartsman
e15f7445f8 Faster memory access for 4G limit cases 
A bit slower for <4G but usually it is 4G
 2007-12-10 19:08:13 +00:00
Stanislav Shwartsman
48650a70b4 Optimized alignment check 2007-11-20 21:22:03 +00:00
Stanislav Shwartsman
1af7010e50 Optimized memory access for 64-bit mode 
Starting convergence to new lazy flags scheme by Darek Mihocka (www.emulators.com). The new flags code is still being validated and perfected but I try to minimize the diff between 2 versionS
 2007-11-20 17:15:33 +00:00
Stanislav Shwartsman
9dc471bbe5 Simplify Guest2HostTLB code 
Fixed APIC CPUID bit
 2007-11-11 20:44:07 +00:00
Stanislav Shwartsman
ce0e0287fb Naturally speedup repeat execution functions, fix TLB index calculations 2007-10-30 22:15:42 +00:00
Stanislav Shwartsman
a4e20e9d29 warnings fixed 2007-10-24 23:02:09 +00:00
Stanislav Shwartsman
679110caa9 fixed push to new stack for long mode 2007-10-19 12:40:19 +00:00
Stanislav Shwartsman
0fc32d3c81 Fixed except_chk issue in more clean way - added 3 new methods for pushing to new, still not loaded stack 2007-10-19 10:14:33 +00:00
Stanislav Shwartsman
f8317d2dcd Unwrap all memory access functions, speed is still more important that code duplication in Bochs :) 2007-10-17 18:09:42 +00:00
Stanislav Shwartsman
c6efc84149 Optimize building of segment ROK/WOK cache 2007-10-10 22:00:51 +00:00
Stanislav Shwartsman
82b7eaabd5 CLFLUSH do not fault when checking execute only segment 2007-10-10 21:48:46 +00:00
Stanislav Shwartsman
895891b673 Implemented #AC check under configure option 
Fixes in misaligned SSE support
 2007-07-31 20:25:52 +00:00
Stanislav Shwartsman
58a2595bca Misaligned SSE support 2007-07-15 19:03:39 +00:00
Stanislav Shwartsman
3886e35bcb Clean code duplication 2007-04-09 21:55:07 +00:00
Stanislav Shwartsman
6c3420a18b Add debug prints before any #GP excepion which only possible to be generated 2006-06-09 22:29:07 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU 
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
 2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
24077c071b Fixed exception generated when accessing memory w/o right permissions 2006-02-26 21:44:03 +00:00
Stanislav Shwartsman
0150904e9d Improve debug messages and optimize 2006-02-22 20:58:16 +00:00
Stanislav Shwartsman
8247b94245 Another fix for INIT/RESET state 2005-11-19 19:38:45 +00:00
Stanislav Shwartsman
7022be46f5 Fix undefined flags handling for ROR and RCR instructions 2005-10-13 19:28:10 +00:00
Stanislav Shwartsman
823dfa6f40 This code will be required for dynamic translation in future. 
For now it is no more than code duplication fix ...
 2005-08-23 20:01:54 +00:00
Stanislav Shwartsman
f096a80716 Fix code duplication for check_cs descriptor 
The function will execute
 - segment is executable code segment
 - conforming/non-conforming segment priviledge checks
 - segment is present
 2005-08-01 21:40:17 +00:00
Stanislav Shwartsman
0b60100a0d Merged patch for Hkan T. Johansson 
TLB access bit optimizations
 2005-06-14 20:55:57 +00:00
Stanislav Shwartsman
6fa52214b0 Canonical address check for RIP in x86-64 2005-04-17 18:54:54 +00:00
Stanislav Shwartsman
1755589376 Separate pageWriteStamp from ICACHE. The pageWriteStamp has totally independant structure and could be used in future with icache structure. Also it could be significantly speeded up using BX_SMF analog constructions. 2005-04-10 19:42:48 +00:00
Stanislav Shwartsman
52041f60d4 Support for X86_64 in debug CPU method 
Fixed debug messages printed from read_virtual_checks
 2005-03-30 19:56:02 +00:00
Stanislav Shwartsman
fd13784231 Small cleanup in access.cc 
VME feature code should be valid only for CPU LEVEL >= 4
 2005-03-12 19:34:18 +00:00
Stanislav Shwartsman
c30e89289b Fixed R/O pages access in CPL=3 (TLB accessBits bug) 2005-03-03 20:24:52 +00:00
Stanislav Shwartsman
b25088bf2f Merge patch [1153327] ignore segment bases in x86-64 by Avi Kivity 2005-02-28 18:56:05 +00:00
Stanislav Shwartsman
42a5a899c2 Improvement in the speed of general memory access. 
The idea was taken from patch written by
LightCone
 2005-01-25 20:41:43 +00:00
Stanislav Shwartsman
0d09a8c8a8 fix code duplication 2004-11-26 19:53:04 +00:00
Stanislav Shwartsman
69c0b06955 fixes in disassembler 
split REPEAT instructions according to opsize to speedup execution
now each REPEATABLE instruction splitted to 3 different instructions, one for 16-bit operand size, one for 32-bit and one for 64-bit. Choosing of correct instruction occure in fetchdecode step.
 2004-11-20 23:26:32 +00:00
Stanislav Shwartsman
645e04860e For now : disable fetching from physical address 0xFFFFFFF0 after #RESET 
because ICACHE do not support physical address > mem.len.
This is the first part of the fix, the rest coming soon
 2004-11-18 23:16:36 +00:00